Abstract: An integrated circuit (IC) having a fin field effect transistor (FinFET) includes a substrate with a fin extending from a surface of the substrate. The fin includes a source region, a drain region, a drift region, and field plating oxide layer. The drift region is adjacent the drain region. The field plating oxide layer is on a first side, a second side, and a third side of the drift region.

Abstract: A holster for docking a portable radio is provided. The holster is configured with a GND extension path that provides an antenna counterpoise for an external antenna of the portable radio. The holster is formed of a housing (121) having a belt attachment element (122) extending therefrom and a GND contact (124) integrated into therein, the a GND contact for coupling to a corresponding radio GND of the docked radio. The GND extension path extends from GND contact (124) through a first conductive element (126) of the holster housing to a second conductive element (128) embedded in the belt attachment element of the holster.

Abstract: A system and method for enhancing a collaborative camera installation experience is disclosed. The method includes running an at least substantially similar test analytic on each of the first video and the second video to generate: first analytic output data corresponding to analytic processing of the first video; and second analytic output data corresponding to analytic processing of the second video. The method also includes assembling for Graphical User Interface (GUI) display to the security camera acquirer, the first and second analytic output data, or performance data derived therefrom. The method also includes, after the assembling for the GUI display, receiving input that one of a plurality of three-dimensionally defined points is selected, thereby identifying a confirmed installation point where a video security camera, different than an at least one substitutional camera, will be permanently installed.

Abstract: A current generator includes a startup circuit and a bandgap reference circuit coupled to the startup circuit. The startup circuit is for generating a first voltage. The bandgap reference circuit is for generating a second voltage. The bandgap reference circuit includes an operational amplifier. The operational amplifier includes a bias source circuit and a bias generator circuit. The bias source circuit is for generating a reference current according to the first voltage and the second voltage. The bias generator circuit is for generating bias voltages according to the reference current. The startup circuit and the bandgap reference circuit receive a supply voltage.

Abstract: The application relates to a polymerization vessel and a method for manufacturing the same. An interior surface of the polymerization vessel has a specific structure, so that the polymerization vessel has better heat transfer efficiency. Closed cooling channels are constructed from the specific structure, and therefore cooling fluid flows in the closed cooling channels. Furthermore, there won't be any by-pass defects in the cooling channels of the polymerization vessel, thereby improving cooling efficiency of the cooling fluid.

Abstract: The application relates to a method for developing the agitation system of a scale-up polymerization vessel. A simulated prediction model is obtained by use of a small polymerization vessel and by integrating Taguchi experimental design method with artificial intelligence (AI) neural network. Accordingly, vessel parameters for the agitation system of a scale-up polymerization vessel can be rapidly and accurately predicted based on simulation qualities thereof, further facilitating a construction of the agitation system of a scale-up polymerization vessel.

Abstract: A computing device obtains a video and obtains a target facial image, where the target facial image comprises a target face to be edited. The computing device determines a target facial feature vector from the target facial image to be edited. For each of a plurality of frames in the video, the computing device is further configured to: identify facial regions of individuals depicted in the video, generate candidate facial feature vectors for each of the identified facial regions, compare each of the candidate facial feature vectors to the target facial feature vector, and apply a mask effect to facial regions of corresponding facial feature vectors based on the comparison to generate an edited video.

Abstract: A semiconductor device includes an extended drain finFET. The drain drift region of the finFET extends between a drain contact region and a body of the finFET. The drain drift region includes an enhanced portion of the drain drift region between the drain contact region and the body. The drain drift region also includes a first charge balance region and a second charge balance region laterally adjacent to, and on opposite sides of, the enhanced portion of the drain drift region. The enhanced portion of the drain drift region and the drain contact region have a first conductivity type; the body, the first charge balance region, and the second charge balance region have a second, opposite, conductivity type. The drain drift region is wider than the body.

Abstract: A semiconductor package carrier board structure includes a plurality of carrier board bodies and a plurality of supporting bumps. The carrier board body includes a build-up circuit structure and a plurality of conductive blocks bonded to the build-up circuit structure. Adjacent ones of the carrier board bodies are connected to each other with their corresponding conductive blocks. An area formed by the adjacent conductive blocks defines a cutting path. An opening is formed on a surface of each of the conductive blocks at the cutting path. The supporting bumps are erected between the adjacent openings. As such, each of the supporting bumps corresponds to a position overlapping the cutting path to provide the support function of the semiconductor package carrier board structure when performing the semiconductor packaging operation. After performing the singulation operation, the supporting bumps can be completely removed and one side of the openings can be exposed.

Abstract: A method of manufacturing an electronic device includes providing a substrate, providing an intermediate layer on the substrate, and providing an isolation layer on the intermediate layer. The substrate includes an active region and a peripheral region. The peripheral region is adjacent to the active region, and the ratio of the area of the active region to the area of the substrate surface is between 75% and 92%. The isolation layer includes a first surface and at least one slope. The first surface of the isolation layer is correspondingly disposed in the active region. The at least one slope of the isolation layer is correspondingly disposed in the peripheral region and at a first angle with respect to the substrate surface.

Abstract: The embodiment of the disclosure provides a composite layer circuit element of an electronic device. The composite layer circuit element includes a first dielectric layer, a first circuit layer and a second dielectric layer. The first circuit layer is disposed on the first dielectric layer, and the second dielectric layer is disposed on the first circuit layer. A thickness of the first dielectric layer is greater than a thickness of the second dielectric layer in a cross section view.

Abstract: A word line driving circuit includes a first circuit and a second circuit. The first circuit is configured to provide a first word line driving voltage and a second word line driving voltage based on a first control signal, a second control signal, a first bias voltage, a second bias voltage and a base voltage. The second circuit is configured to provide the first control signal and the second control signal based on a third control signal, a fourth control signal, a word line control signal, a reverse word line control signal, the first bias voltage, the second bias voltage and the base voltage. The first bias voltage and the second bias voltage have different levels during the read mode and the program mode for adaptively adjusting the read voltage and the program voltage, thereby improving the data access time.

Abstract: A portable radio is provided that performs an impedance measurement to determine a radio frequency (RF) load type connected to an antenna port of the portable radio. The portable radio includes an impedance measurement circuit and a tunable matching circuit operatively coupled thereto through an RF switch A sweep generator injects an LMR frequency sweep to the RF load during non-transmit or non-receive time slots for the impedance measurement. The tunable matching circuit is configured as a radio frequency (RF) bypass during the impedance measurement, thereby enabling the impedance measurement circuit to directly measure the impedance of the RF load coupled to the RF port and identify the RF load as either a land mobile radio (LMR) antenna or equipment (wideband load). When the RF load is determined to be an LMR antenna, then the matching circuitry is tuned for the identified antenna. When the RF load is determined to be wideband equipment, then the matching circuitry remains bypassed.

Abstract: An antenna apparatus and a control method are provided. The antenna apparatus includes a first antenna, a second antenna, and a movable mechanism. The first antenna is operated on a first frequency band. The second antenna surrounds the first antenna and is operated on a second frequency band. The first and second antennas are disposed on the movable mechanism. The movable mechanism is further configured to steer a direction of the first and second antennas. Accordingly, the requirements of multiple frequency bands and beam scanning may be fulfilled.

Abstract: A method of fabricating a transistor includes forming a gate structure over a semiconductor substrate having a first conductivity type. A photoresist layer is patterned over the gate structure to remove the photoresist layer from over an uncovered portion of the gate structure and an adjacent region of the semiconductor substrate abutting the uncovered portion of the gate structure. A deep well region having the first conductivity type is formed using a first dopant such that the first dopant penetrates through the uncovered portion of the gate structure and is blocked by the photoresist layer. A shallow well region is formed by implanting a second dopant such that the second dopant penetrates the adjacent region and is blocked by the uncovered portion of the gate structure.

Abstract: The present invention relates to a composition of subunit dengue vaccine comprising a fusion protein of conjugating or connecting delta C nonstructural protein 1 (NS1?C or truncated NS1?C) to at least one polypeptides of NS3c (or truncated NS3c) and/or consensus envelope protein domain III (cEDIII), thereby enhancing better protection against DENV challenge and alleviating associated pathological effects.

Abstract: The embodiment of the disclosure provides a composite layer circuit element and a manufacturing method thereof. The manufacturing method of the composite layer circuit element includes the following. A carrier is provided. A first dielectric layer is formed on the carrier, and the first dielectric layer is patterned. The carrier on which the first dielectric layer is formed is disposed on a first curved-surface mold, and the first dielectric layer is cured. A second dielectric layer is formed on the first dielectric layer. The second dielectric layer is patterned. The carrier on which the first dielectric layer and the second dielectric layer are formed is disposed on a second curved-surface mold, and the second dielectric layer is cured. A thickness of a projection of the first curved-surface mold is smaller than a thickness of a projection of the second curved-surface mold.

Abstract: A display device is provided. The display device includes a substrate, a light-shielding layer, a plurality of first light-emitting elements, and a plurality of second light-emitting elements. The light-shielding layer is disposed on the substrate. The first light-emitting elements are disposed on the substrate. The second light-emitting elements are disposed between the light-shielding layer and the substrate. One of the second light-emitting elements is alternately disposed between any two adjacent first light-emitting elements.

Abstract: A method for processing a semiconductor wafer is provided. The method includes polishing the semiconductor wafer with a chemical mechanical polishing (CMP) tool. The method includes transferring the polished semiconductor wafer to an interface tool from the CMP tool. The method includes discharging a mist spray over the polished semiconductor wafer in the interface tool. The method includes transferring the semiconductor wafer form the interface tool to a cleaning tool for a cleaning process.

Abstract: A device, system and method for routing botnet calls to a botnet call-answer queue. A device, such as a call answering point (CAP) and/or a public-safety answering point (PSAP) router device, receives a call and determines an audio signature of the call. The device compares the audio signature of the call with one or more botnet audio signatures stored at a memory. In response to the audio signature of the call matching at least one of the one or more botnet audio signatures, the device: identifies the call as a botnet call that has been placed by a botnet; and cause the call to be routed to a botnet call-answer queue.