Patents by Inventor Ming Yu

Ming Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240097842
    Abstract: A method includes: A station receives a trigger frame from an access point. The trigger frame is used to trigger the station to perform EHT TB PPDU transmission, the trigger frame further indicates a resource unit allocated to the station, and the trigger frame includes first indication information indicating that the station can perform EHT TB PPDU transmission on a portion of the allocated resource unit. The station sends an EHT TB PPDU based on an indication of the first indication information.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Inventors: Yuxin LU, Ming GAN, Jian YU, Yunbo LI, Chenchen LIU, Bo GONG
  • Publication number: 20240098753
    Abstract: A method comprises: a second communication apparatus sends a trigger frame, to trigger at least one first communication apparatus that includes a first communication apparatus to transmit an uplink PPDU. After receiving the trigger frame, the at least one first communication apparatus sends the PPDU to the second communication apparatus based on the trigger frame. The PPDU includes a data field and an STF sequence, the data field is carried in a distributed RU, the distributed RU includes a plurality of subcarrier groups that are discrete in frequency domain, one of the subcarrier groups includes one subcarrier or includes at least two consecutive subcarriers, the STF sequence is carried on all subcarriers of a plurality of consecutive RUs, the plurality of consecutive RUs are consecutive RUs corresponding to the distributed RU, and each of the consecutive RUs includes a plurality of subcarriers that are consecutive in frequency domain.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Bo GONG, Chenchen LIU, Mengshi HU, Jian YU, Ming GAN
  • Publication number: 20240098959
    Abstract: A method includes etching a first semiconductor fin and a second semiconductor fin to form first recesses. The first and the second semiconductor fins have a first distance. A third semiconductor fin and a fourth semiconductor fin are etched to form second recesses. The third and the fourth semiconductor fins have a second distance equal to or smaller than the first distance. An epitaxy is performed to simultaneously grow first epitaxy semiconductor regions from the first recesses and second epitaxy semiconductor regions from the second recesses. The first epitaxy semiconductor regions are merged with each other, and the second epitaxy semiconductor regions are separated from each other.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 21, 2024
    Inventors: Kai-Hsuan Lee, Chia-Ta Yu, Cheng-Yu Yang, Sheng-Chen Wang, Sai-Hooi Yeong, Feng-Cheng Yang, Yen-Ming Chen
  • Publication number: 20240096893
    Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Ming-Ching Chang, Wei-Liang Lu, Kuei-Yu Kao
  • Patent number: 11932534
    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
  • Patent number: 11931417
    Abstract: Methods are provided for producing a PEGylated interleukin 11 (IL-11) by treating a recombinant IL-11 PEGylated with an equimolar to low molar excess of PEG carrying an amine-reactive group to achieve a highly pure monoconjugate preparation, which provides improved half-life in serum while having desirable therapeutic activity and presenting fewer side-effects. Most preferably, the IL-11 is an N-terminally truncated human or humanized IL-11 and has a 20 Kd or 40 Kd branched PEG moiety, Y- or comb-shaped in particular, coupled to the N-terminal amino group. Such compounds are characterized by substantially increased stability in serum and sustained biological activity while exhibiting significantly reduced plasma expansion.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: March 19, 2024
    Assignee: Nansha Biologics (Hong Kong) Limited
    Inventors: Kuo-Ming Yu, Qui-Lim Choo, Manson Fok, Johnson Yiu-Nam Lau
  • Patent number: 11934959
    Abstract: Apparatuses, systems, and techniques are presented to synthesize consistent images or video. In at least one embodiment, one or more neural networks are used to generate one or more second images based, at least in part, on one or more point cloud representations of one or more first images.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: March 19, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Arun Mallya, Ting-Chun Wang, Ming-Yu Liu, Karan Sapra
  • Patent number: 11937266
    Abstract: A method and apparatus are disclosed. In an example from the perspective of a first device, a grant is received from a network node. The grant allocates a set of sidelink data resources. One or more sidelink data transmissions are performed on the set of sidelink data resources. A second feedback information associated with the one or more sidelink data transmissions is received and/or detected. An uplink resource is derived. A first feedback information is transmitted on the uplink resource to the network node. The first feedback information is set based upon the second feedback information.
    Type: Grant
    Filed: October 17, 2022
    Date of Patent: March 19, 2024
    Assignee: ASUSTek Computer Inc.
    Inventors: Ming-Che Li, Li-Chih Tseng, Wei-Yu Chen, Li-Te Pan
  • Publication number: 20240087949
    Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes a substrate. A gate electrode is over the substrate and a spacer structure laterally surrounds the gate electrode. A conductive via is disposed on the gate electrode. A liner is arranged along one or more sidewalls of the spacer structure. The conductive via has a bottommost surface that has a larger width than a part of the conductive via that is laterally adjacent to one or more interior sidewalls of the liner.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Li-Zhen Yu, Cheng-Chi Chuang, Chih-Hao Wang, Yu-Ming Lin, Lin-Yu Huang
  • Publication number: 20240089815
    Abstract: This application relates to the field of wireless communication, and in particular, to individually addressed traffic indication methods and apparatuses applicable to multiple links, for example, in a wireless local area network supporting an 802.11be standard. In an example method, a first access point (AP) of a first access point multi-link device (AP MLD) generates and sends individually addressed traffic indication information. The individually addressed traffic indication information is used to indicate whether a non-AP MLD associated with the first AP MLD has a downlink individually addressed traffic and whether a non-AP MLD associated with a second AP MLD has a downlink individually addressed traffic. The second AP MLD is an AP MLD to which a non-transmitted AP belongs. The non-transmitted AP is in a multiple basic service set identifier (BSSID) set in which the first AP is located.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Inventors: Ming GAN, Yiqing LI, Chenchen LIU, Jian YU, Mengshi HU, Yunbo LI, Yuchen GUO
  • Publication number: 20240088119
    Abstract: Provided are a package structure and a method of forming the same. The method includes providing a first package having a plurality of first dies and a plurality of second dies therein; performing a first sawing process to cut the first package into a plurality of second packages, wherein one of the plurality of second packages comprises three first dies and one second die; and performing a second sawing process to remove the second die of the one of the plurality of second packages, so that a cut second package is formed into a polygonal structure with the number of nodes greater than or equal to 5.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Hung Lin, Hui-Min Huang, Chang-Jung Hsueh, Wan-Yu Chiang, Ming-Da Cheng, Mirng-Ji Lii
  • Publication number: 20240090059
    Abstract: A STA in a STA MLD sends an information frame on a link corresponding to the station, and the information frame is used to indicate a STA in an awake state in the STA MLD. An AP MLD receives the information frame, and sends a downlink message frame on a one or more links corresponding to a part of or all of STAs in the awake state in the STA MLD.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Ming Gan, Yifan Zhou, Yunbo Li, Yuchen Guo, Jian Yu, Dandan Liang
  • Publication number: 20240090294
    Abstract: A display substrate and a display device are provided, the display substrate includes a first display region, and the display substrate includes a plurality of first pixel structures arranged on a base substrate in an array in a first direction and a second direction, where the plurality of first pixel structures are in the first display region, at least one first pixel structure includes at least two first sub-pixels and at least two second sub-pixels, the first sub-pixel includes a first opening, and the second sub-pixel includes a second opening.
    Type: Application
    Filed: August 10, 2022
    Publication date: March 14, 2024
    Inventors: Chi Yu, Benlian Wang, Hongli Wang, Weiyun Huang, Ming Hu, Youngyik Ko
  • Publication number: 20240088285
    Abstract: Various embodiments of the present application are directed towards a group III-V device including a rough buffer layer. The rough buffer layer overlies a silicon substrate, a buffer structure overlies the rough buffer layer, and a heterojunction structure overlies the buffer structure. The buffer structure causes band bending and formation of a two-dimensional hole gas (2DHG) in the rough buffer layer. The rough buffer layer includes silicon or some other suitable semiconductor material and, in some embodiments, is doped. A top surface of the rough buffer layer and/or a bottom surface of the rough buffer layer is/are rough to promote carrier scattering along the top and bottom surfaces. The carrier scattering reduces carrier mobility and increases resistance at the 2DHG. The increased resistance increases an overall resistance of the silicon substrate, which reduces substrate loses and increases a power added efficiency (PAE).
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Kuei-Ming Chen, Chi-Ming Chen, Chung-Yi Yu
  • Patent number: 11929321
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first insulating layer over a substrate. A first metal feature is formed in the first insulating layer and a second insulating layer is formed over the first insulating layer. A first metal via is formed through the second insulating layer to connect the first metal feature. A second metal feature is formed over the second insulating layer. The second metal feature has a convex top surface and a plane bottom surface, and the plane bottom is electrically connected to the first metal feature through the first metal via.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Zhen Yu, Lin-Yu Huang, Cheng-Chi Chuang, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 11929319
    Abstract: Integrated fan-out packages and methods of forming the same are disclosed. An integrated fan-out package includes two dies, an encapsulant, a first metal line and a plurality of dummy vias. The encapsulant is disposed between the two dies. The first metal line is disposed over the two dies and the encapsulant, and electrically connected to the two dies. The plurality of dummy vias is disposed over the encapsulant and aside the first metal line.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Huang, Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang, Yu-Sheng Hsieh
  • Patent number: 11929561
    Abstract: An antenna module includes a first antenna radiator including a feeding terminal, a second antenna radiator, a first ground radiator, a second ground radiator and a capacitive element. The second antenna radiator is disposed on one side of the first antenna radiator, and a first gap is formed between a main portion of the second antenna radiator and the first antenna radiator. The first ground radiator is disposed on another side of the first antenna radiator, and a second gap is formed between the first antenna radiator and the first antenna radiator. The second ground radiator is disposed between the second antenna radiator and the first ground radiator, and a third gap is formed between the second ground radiator and a first branch of the second antenna radiator. The capacitive element is disposed on the third gap and connects the second antenna radiator and the second ground radiator.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: March 12, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: I-Shu Lee, Chih-Hung Cho, Hau Yuen Tan, Chien-Yi Wu, Po-Sheng Chen, Chao-Hsu Wu, Yi Chen, Hung-Ming Yu, Chih-Chien Hsieh
  • Patent number: 11926787
    Abstract: A well cementing method is described for improving cementing quality by controlling the hydration heat of cement slurry. By controlling the degree and/or rate of hydration heat release from cement slurry, the method improves the hydration heat release during formation of cement with curing of cement slurry, improves the binding quality between the cement and the interfaces, and in turn improves the cementing quality at the open hole section and/or the overlap section. The cementing method improves cementing quality of oil and gas wells and reduces the risk of annular pressure.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: March 12, 2024
    Assignees: PetroChina Company Limited, CNPC Engineering Technology R&D Company Limited
    Inventors: Shuoqiong Liu, Hua Zhang, Jianzhou Jin, Ming Xu, Yongjin Yu, Fengzhong Qi, Congfeng Qu, Hong Yue, Youcheng Zheng, Wei Li, Yong Ma, Youzhi Zheng, Zhao Huang, Jinping Yuan, Zhiwei Ding, Chongfeng Zhou, Chi Zhang, Zishuai Liu, Hongfei Ji, Yuchao Guo, Xiujian Xia, Yong Li, Jiyun Shen, Huiting Liu, Yusi Feng, Bin Lyu
  • Patent number: 11930403
    Abstract: When a first device is an EHT site, a second device generates a frame in a first non-HT format or a frame in a first non-HT duplicated format, where at least three bits in the first seven bits of a scrambling sequence of the frame in the first non-HT format or the frame in the first non-HT duplicated format indicate a bandwidth mode of a channel; or when a first device is a VHT site or an HE site that does not support an EHT, a second device generates a frame in a second non-HT format or a frame in a second non-HT duplicated format, where two bits in the first seven bits of a scrambling sequence of the frame in the second non-HT format or the frame in the second non-HT duplicated format indicate a bandwidth mode of a channel.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: March 12, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yunbo Li, Jian Yu, Ming Gan
  • Publication number: 20240080127
    Abstract: The present disclosure relates to communication methods and apparatuses, and relates to the field of communication technologies. In one example method, a first communication apparatus generates a physical layer protocol data unit (PPDU), and sends the PPDU to a second communication apparatus. The PPDU includes a first field with 26 bits, and the first field includes a one-bit unsolicited modulation and coding scheme (MCS) feedback (MFB) subfield and a one-bit first indication information. When a value of the unsolicited MFB subfield is a first value, the first indication information indicates an MCS request (MRQ). When a value of the unsolicited MFB subfield is a second value, the first indication information indicates an uplink extremely high throughput trigger-based PPDU MFB (UL EHT TB PPDU MFB).
    Type: Application
    Filed: November 15, 2023
    Publication date: March 7, 2024
    Inventors: Bo GONG, Jian YU, Chenchen LIU, Ming GAN