Abstract: A method of manufacturing an interconnect structure includes forming an opening through a dielectric layer. The opening exposes a top surface of a first conductive feature. The method further includes forming a barrier layer on sidewalls of the opening, passivating the exposed top surface of the first conductive feature with a treatment process, forming a liner layer over the barrier layer, and filling the opening with a conductive material. The liner layer may include ruthenium.

Abstract: A strip-line structure includes a first ground plane formed on a first layer; a second ground plane formed on a second layer; a first power plane formed on the first layer, wherein the first ground plane and the first power plane are separated by a dielectric material; a stipe line formed on a third layer for signal transmission, wherein the third layer is between the first layer and the second layer; a ground line formed on the third layer, wherein the ground line and the strip line are separated by the dielectric material; a first via for electrically connecting the first ground plane and the second ground plane; and a second via for electrically connecting the ground line and the second ground plane.

Abstract: A memory device and a memory circuit is provided. The memory device includes a spin-orbit torque (SOT) layer, a magnetic tunnel junction (MTJ), a read word line, a selector and a write word line. The MTJ stands on the SOT layer. The read word line is electrically connected to the MTJ. The write word line is connected to the SOT layer through the selector. The write word line is electrically connected to the SOT layer when the selector is turned on, and the write word line is electrically isolated from the SOT layer when the selector is in an off state.

Abstract: A semiconductor device including a semiconductor substrate and an interconnect structure is provided. The semiconductor substrate includes a transistor, wherein the transistor has a source region and a drain region. The interconnect structure is disposed over the semiconductor substrate, wherein the interconnect structure includes a plurality of interlayer dielectric layers, a first via and a memory cell. The plurality of interlayer dielectric layers are over the semiconductor substrate. The first via is embedded in at least two interlayer dielectric layers among the plurality of interlayer dielectric layers and electrically connected with the drain region of the transistor. The memory cell is disposed over the at least two interlayer dielectric layers among the plurality of interlayer dielectric layers and electrically connected with the first via.

Abstract: A method for supporting Sidelink (SL) Discontinuous Reception (DRX) operation is provided. A User Equipment (UE) maintains SL DRX configuration which includes one of a transmission pattern and a reception pattern that the UE expects to perform transmission and reception to a peer UE. The UE exchanges the SL DRX configuration with the peer UE. Based on the exchange of the SL DRX configuration, the UE determines when to perform transmission or reception to or from the peer UE during an SL DRX operation. Based on the determination, the UE performs transmission or reception to or from the peer UE during the SL DRX operation.

Abstract: This disclosure provides an apparatus operated as a relay node in a wireless mesh network for packet routing. The apparatus comprises processing circuitry that receives a packet including indications of a source node and a destination node. When the relay node is not the destination node, the processing circuitry determines whether the packet includes a path ID identifying a delivery route for the packet. When the packet includes the path ID and a routing table of the relay node includes a first next-hop node associated with the path ID, the processing circuitry transmits the packet to the first next-hop node. When the packet does not include the path ID or the routing table does not include the first next-hop node, the processing circuitry transmits the packet to one of a second next-hop node associated with the destination node and a third next-hop node associated with an intermediate destination node.

Abstract: An electronic system is provided, which includes a host device and a display device. The host device includes a first signal conversion circuit and a first signal transmission circuit. The first signal conversion circuit is utilized for converting signals associated with the host device into a first universal serial bus signal. The display device includes a display panel, a second signal conversion circuit and a second signal transmission circuit. The second signal transmission circuit is utilized for receiving the first universal serial bus signal. The second signal conversion circuit is coupled to the second signal transmission circuit for converting the first universal serial bus signal into the signals associated with the host device. The first universal serial bus signal conforms to universal serial bus 4.0 or above version standard specification.

Abstract: Provided is a modified virus Ad5 which is capable of expressing a cytokine, and the modified virus Ad5 is capable of expressing an A20. And also provided are a vector and a cell comprising the modified virus Ad5. The modified virus may be used in cancer treatment.

Abstract: A method executed by a relay UE is provided. The relay UE establishes a first Radio Link Control (RLC) channel between a first remote UE and the relay UE, in which the first RLC channel is associated with a first end-to-end identifier. The relay UE establishes a second RLC channel between a second remote UE and the relay UE, in which the second RLC channel is associated with the first end-to-end identifier or a second end-to-end identifier. The relay UE receives an incoming SideLink (SL) transmission from the first remote UE on the first RLC channel, in which the incoming SL transmission includes the first end-to-end identifier. The relay UE sends an outgoing SL transmission to the second remote UE on the second RLC channel, in which the outgoing SL transmission includes one of the first end-to-end identifier and the second end-to-end identifier.

Abstract: The present disclosure provides a method that includes providing a substrate including a first circuit region and a second circuit region; forming a semiconductor stack on the substrate, wherein the semiconductor stack includes first semiconductor layers of a first composition and second semiconductor layers of a second composition alternatively stacked on the substrate; performing a first patterning process to the semiconductor stack and the substrate to form first trenches having a first depth; and performing a second patterning process to the semiconductor stack and the substrate, thereby forming second trenches of a second depth in the first circuit region and third trenches of a third depth in the second circuit region, the third depth being less than the second depth.

Abstract: A heat dissipation device is provided and includes: a casing; a base unit combined with the casing to form a water collecting chamber, a water inlet chamber, an action space and a water outlet chamber; a heat transfer structure disposed on an inner side of the base unit; a water inlet pipeline unit communicated with the water collecting chamber; a water outlet pipeline unit communicated with the water outlet chamber; and a pump unit disposed outside the casing and the base unit, and connected with the water inlet pipeline unit and the water outlet pipeline unit, so as to drive a working medium.

Abstract: Apparatus and methods are provided for reliable multicast transmission with compact protocol stack. In one novel aspect, compact protocol stacks are configured for the UE and the base station handling both the PTM RB and the PTP RB. The compact protocol stack is either configured a compact RLC entity or a compact PDCP entity. The UE monitors a PTM LCH and a PTP LCH and sends feedback to the network with the PTP RB. The base station transmits MBS data packets in the PTM mode to the one or more subscriber UE, monitors feedback report from each subscriber UEs through corresponding PTP RB, and retransmits MBS data packets to one or more UEs through corresponding PTP RBs based on corresponding feedback reports. PTM-to-PTP and PTP-to-PTM mode switches are performed when triggering events are detected. The mode switch notification is sent to UEs via MAC CE or RLC control PDU.

Abstract: A cold plate is provided and includes: a casing formed with an accommodating groove; a base coupled to the casing to define an action space together with the casing, where the action space communicates with the accommodating groove; a heat transfer structure disposed on an inner side of the base for transferring a heat energy generated by a heat source in contact with an outer side of the base to a working medium in the action space; and a pump having a stator disposed in the accommodating groove.

Abstract: Methods are provided for remotely starting up one or a plurality of vehicles. These methods involve starting up hardware and/or software modules of the vehicle in a particular order so as to account for dependencies among the various modules. In one form, states of various hardware and/or software modules in the vehicle, and errors observed in starting up various modules and troubleshooting is applied in an automated manner. Moreover, the methods may involve ensure proper startup of modules for performing a localization procedure for the vehicle.

Abstract: A device may receive a job request associated with a data processing job, including job timing data specifying a time at which the data processing job is to be executed by a virtual computing environment. The device may receive user data associated with the job request and validate the data processing job based on the user data. In addition, the device may identify a priority associated with the data processing job, based on the user data and the job timing data. The device may provide, to a job queue, job data that corresponds to the data processing job, and monitor the virtual computing environment to determine when virtual resources are available. The device may also determine, based on the monitoring, that a virtual resource is available and, based on the determination and the priority, provide the virtual resource with data that causes execution of the data processing job.

Abstract: Apparatus and methods for unknown physical uplink control channel (PUCCH) secondary cell (SCell) activation are proposed. The network node may transmit a PUCCH SCell activation command for an unknown target PUCCH SCell to the UE. After receiving the PUCCH SCell activation command for the unknown target PUCCH SCell, the UE may transmit a layer 1 (L1) report or a layer 3 (L3) report for the unknown target PUCCH SCell to the network node before the unknown target PUCCH SCell is activated. The network node may obtain measurement information based on the L1 report or the L3 report before the unknown target PUCCH SCell is activated. Then, the network node may perform corresponding operations based on the L1 report or the L3 report before the unknown target PUCCH SCell is activated.

Abstract: A method includes forming a doped region on a top portion of a substrate, forming a first epitaxial layer over the substrate, forming a recess in the first epitaxial layer, the recess being aligned to the doped region, performing a surface clean treatment in the recess, the surface clean treatment includes: oxidizing surfaces of the recess to form an oxide layer in the recess, and removing the oxide layer from the surfaces of the recess, and forming a second epitaxial layer in the recess.

Abstract: The present invention relates to a quick release assembly for a pressing head and an electronic device testing apparatus having the same. The quick release assembly comprises an upper base, an actuator and a lower base. When the lower base is to be mounted on the upper base, the actuator drives a movable head to a first position; the movable head passes through an open slot of the lower base; then, the actuator drives the movable head to a second position so that the lower base is retained by the movable head. The open slot of the lower base is firstly fitted on the movable head of the actuator located on the upper base. At this time, the actuator is controlled to drive the movable head to the second position from the first position.

Abstract: Some embodiments relate to a probabilistic random number generator. The probabilistic random number generator includes a memory cell comprising a magnetic tunnel junction (MTJ), and an access transistor coupled to the MTJ of the memory cell. A variable current source is coupled to the access transistor and is configured to provide a plurality of predetermined current pulse shapes, respectively, to the MTJ to generate a bit stream that includes a plurality of probabilistic random bits, respectively, from the MTJ. The predetermined current pulse shapes have different current amplitudes and/or pulse widths corresponding to different switching probabilities for the MTJ.

Abstract: Provided are a memory device and a method of forming the same. The memory device includes: a selector; a magnetic tunnel junction (MTJ) structure, disposed on the selector; a spin orbit torque (SOT) layer, disposed between the selector and the MTJ structure, wherein the SOT layer has a sidewall aligned with a sidewall of the selector; a transistor, wherein the transistor has a drain electrically coupled to the MTJ structure; a word line, electrically coupled to a gate of the transistor; a bit line, electrically coupled to the SOT layer; a first source line, electrically coupled to a source of the transistor; and a second source line, electrically coupled to the selector, wherein the transistor is configured to control a write signal flowing between the bit line and the second source line, and control a read signal flowing between the bit line and the first source line.