Patents by Inventor Mohit

Mohit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130308948
    Abstract: A method of extending the control plane to a network edge for a network having first set of nodes of the network are designated as core nodes, each core node being operable to route subscriber traffic between a pair of neighbour core nodes and a second set of control-plane enabled nodes of the network designated as tail nodes, each tail node connected to a core node and operating only as a source or sink of subscriber traffic. Each core node that is connected to at least one tail node is designated as a host node. The host node is controlled to advertise summary information of its connected tail nodes to other core and tail nodes in the network, thus making it possible to extend control plane function to the tail nodes which can calculate connection routes, set-up/tear-down connections and perform connection failure recovery functions.
    Type: Application
    Filed: August 6, 2012
    Publication date: November 21, 2013
    Inventors: Gerard L. Swinkels, Darek Skalecki, Anurag Prakash, Mohit Chhillar
  • Patent number: 8587466
    Abstract: In accordance with an embodiment, a method of performing a successive approximation analog-to-digital (A/D) conversion includes determining a voltage range of an analog input voltage in a single cycle using a multi-bit flash A/D converter, determining an initial D/A value for a successive approximation based on determining the voltage range, and successively approximating the analog input voltage. Successively approximating includes providing the initial D/A value to a D/A converter, comparing an output of the D/A converter with the analog input voltage, and determining a further D/A value based on the comparing.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: November 19, 2013
    Assignee: STMicroelectronics International N.V.
    Inventors: Chandrajit Debnath, Mohit Kaushik
  • Publication number: 20130304907
    Abstract: A packet quota value, which indicates a maximum number of network packets that a network appliance processes before switching to a different task, is modified. Log data, which includes multiple log entries spanning a time interval, is accessed. Each log entry includes a processing time that indicates how much time the network appliance spent performing network traffic tasks before switching to the different task. The log data is analyzed. Responsive to the analysis indicating that a current state of network traffic is heavier than a maximum state of network traffic that was observed during the time interval, the packet quota value is increased. Responsive to the analysis indicating that the current state of network traffic is lighter than a minimum state of network traffic that was observed during the time interval, the packet quota value is decreased.
    Type: Application
    Filed: May 9, 2013
    Publication date: November 14, 2013
    Applicant: Citrix Systems, Inc.
    Inventors: Mohit Saxena, Ramanjaneyulu Y. Talla, Saravana Annamalaisami
  • Publication number: 20130295446
    Abstract: A negative electrode material for a lithium ion battery, in which a fine particle (A) containing an element selected from Si, Sn, Ge and In and a carbon particle (B) obtained by heat-treating a petroleum-based coke and/or a coal-based coke at a temperature of 2,500° C. or more are connected through a chemical bond such as urethane bond, urea bond, siloxane bond and ester bond. Also disclosed are a negative electrode sheet obtained by coating a current collector with a paste containing the negative electrode material, a binder and a solvent, and then drying and pressure-forming the paste; and a lithium ion battery incorporating the negative electrode sheet.
    Type: Application
    Filed: May 2, 2013
    Publication date: November 7, 2013
    Applicant: SHOWA DENKO K.K.
    Inventors: Hirokazu MURATA, Nobuaki ISHII, Masataka TAKEUCHI, Mohit JAIN, Nader M. HAGH, Farid BADWAY, Krista MARTIN
  • Patent number: 8569108
    Abstract: A coating for a microelectronic device comprises a polymer film (131) containing a filler material (232). The polymer film has a thermal conductivity greater than 3 W/m·K and a thickness (133) that does not exceed 10 micrometers. The polymer film may be combined with a dicing tape (310) to form a treatment (300) that simplifies a manufacturing process for a microelectronic package (100) and may be used in order to manage a thermal profile of the microelectronic device.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: October 29, 2013
    Assignee: Intel Corporation
    Inventors: Dingying Xu, Leonel R. Arana, Nachiket R. Raravikar, Mohit Mamodia, Rajasekaran Swaminathan, Rahul Manepalli
  • Patent number: 8571562
    Abstract: A method and apparatus for cell change order including issuing or receiving a cell change order message to find a target cell in a network with no compressed mode measurement, performing a power scan on the network to find a suitable cell if the target cell is not found, and camping on the suitable cell if found. In one aspect, the network is a 2G network. In yet another aspect, the network is a GSM network.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: October 29, 2013
    Assignee: Qualcomm Incorporated
    Inventors: Mohit Narang, Mukesh Mittal
  • Patent number: 8569494
    Abstract: Provided herein are methods to prepare Heteroaryl Compounds having the following structure: wherein R1-R4 are as defined herein. The Heteroaryl compounds are useful for treating or preventing cancer, inflammatory conditions, immunological conditions, neurodegenerative diseases, diabetes, obesity, neurological disorders, age-related diseases, or cardiovascular conditions.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: October 29, 2013
    Assignee: Signal Pharmaceuticals, LLC
    Inventors: Roy L. Harris, John Sapienza, Graziella Shevlin, Patrick Papa, Branden Gingsee Lee, Garrick Packard, Jingjing Zhao, Patrick Anthony Jokiel, Deborah Mortensen, Jennifer Riggs, Juan Antonio Gamboa, Marie Georges Beauchamps, Matthew Michael Kreilein, Mohit Atul Kothare, Sophie Perrin-Ninkovic, Philip James Pye, William Wei-Hwa Leong, Jan Elsner, Anusuya Choudhury
  • Publication number: 20130282063
    Abstract: A dynamic stabilization device is disclosed. The device includes a dual spring member comprising an outer spring and an inner spring that have approximately equal working lengths. The dynamic stabilization device is also configured so that the dual spring member does not undergo stresses greater than an effective fatigue limit that is related to a fatigue limit of the spring. Methods for treating a deformity of a spine using a dynamic stabilization device are also disclosed.
    Type: Application
    Filed: March 25, 2013
    Publication date: October 24, 2013
    Inventors: Mohit K. Bhatnagar, James A. Sack, Jack Y. Yeh
  • Publication number: 20130283103
    Abstract: A system and method for testing in a database system. In one embodiment, a method includes receiving an indication of one or more changes to a software application, wherein each change corresponds to a different version of the software application. The method further includes generating one or more virtual machines for a version of the software application in response to the indication, wherein the one or more virtual machines test the version of the software application.
    Type: Application
    Filed: June 19, 2013
    Publication date: October 24, 2013
    Inventors: William Lam, Matthew Cowger, Ashit Jain, Hung Le, Mohit Chawla
  • Patent number: 8566711
    Abstract: Embodiments of methods to store document views, methods to display document views, computer-readable media, user interfaces, and systems are generally described herein.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: October 22, 2013
    Assignee: Adobe Systems Incorporated
    Inventor: Mohit Srivastava
  • Patent number: 8563168
    Abstract: A polymer that combines high ionic conductivity with the structural properties required for Li electrode stability is useful as a solid phase electrolyte for high energy density, high cycle life batteries that do not suffer from failures due to side reactions and dendrite growth on the Li electrodes, and other potential applications. The polymer electrolyte includes a linear block copolymer having a conductive linear polymer block with a molecular weight of at least 5000 Daltons, a structural linear polymer block with an elastic modulus in excess of 1×107 Pa and an ionic conductivity of at least 1×10?5 Scm?1. The electrolyte is made under dry conditions to achieve the noted characteristics.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: October 22, 2013
    Assignee: The Regents of The University of California
    Inventors: Nitash Pervez Balsara, Mohit Singh, Hany Basam Eitouni, Enrique Daniel Gomez
  • Patent number: 8566181
    Abstract: One embodiment includes a computer-implemented system for incorporating a repair vendor into repair planning for a supply chain. The system accesses a logical representation of the supply chain, access an inventory plan for the supply chain, and generates a replenishment plan for meeting the inventory plan for the supply chain that includes suggested repair orders. Unserviceable parts in the supply chain are moved from the supply chain to the repair vendor, repaired at the repair vendor, and moved from the repair vendor back to the supply chain to meet the requirements for serviceable parts at the locations in the supply chain according to the suggested repair orders.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: October 22, 2013
    Assignee: JDA Software Group, Inc.
    Inventors: Vasudevan Narayanan, Mohit Mohan, Nikhil T. Jain, Amol B. Adgaonkar
  • Publication number: 20130274807
    Abstract: A rod to rod connector includes at least one clamping assembly for receiving a first spinal rod. The clamping assembly may include a polyaxial articulation element. The articulation element may include a hollow body forming an opening. The clamping body may further include a pivot element configured to clamp the first spinal rod between the pivot element and a channel wall in the clamping assembly. The rod to rod connector may also include a connector member for connecting the clamping assembly to a second spinal rod. The connector member may include a socket configured to receive the polyaxial articulation element of the clamping assembly, with the articulation element polyaxially rotatable relative to the axis of the socket.
    Type: Application
    Filed: April 16, 2012
    Publication date: October 17, 2013
    Applicant: AESCULAP IMPLANT SYSTEMS, LLC
    Inventor: MOHIT PRAJAPATI
  • Publication number: 20130275118
    Abstract: A computer-implemented technique can include receiving, at a server including one or more processors, a source word in a source language. The technique can include determining, at the server, one or more potential translations for the source word in a target language different than the source language. The technique can include determining, at the server, one or more synonyms for each of the one or more potential translations to obtain a plurality of potential translations. The technique can include determining, at the server, one or more translation clusters using the plurality of potential translations and a clustering algorithm. Each translation cluster can contain all of the plurality of potential translations that have a similar denotation and each of the plurality of translations that have a similar denotation can be included in a specific translation cluster. The technique can also include outputting, at the server, the one or more translation clusters.
    Type: Application
    Filed: August 31, 2012
    Publication date: October 17, 2013
    Applicant: GOOGLE INC.
    Inventors: John DeNero, Mohit Bansal
  • Patent number: 8560785
    Abstract: Techniques for providing multiple levels of security for backups are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for providing multiple levels of security for a backup medium comprising protecting a data portion of the backup medium with a first security mechanism, and protecting a metadata portion of the backup medium with a second security mechanism.
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: October 15, 2013
    Assignee: Symantec Corporation
    Inventors: Gaurav Malhotra, Shyam Prakash Velupula, Vijaysinh Rangrao Mohite, Raymond W. Gilson, Thomas Clifford
  • Patent number: 8552893
    Abstract: A control system provides a control signal to a nonlinear plant that generates a response signal responsive to the control signal. The control system includes a detector that detects a predetermined value of a plant quantity, valley switching logic, coupled to the detector, to change a state of a plant switch when the plant quantity is minimized, and a pulse-width modulator, coupled to the valley switching logic, to generate a control signal that controls the plant switch. The valley switching logic includes a nonlinear delta-sigma modulator that compensates for an error in a plant response signal by adjusting the duration of an on-time of a plant switch to cause an average value of the plant response signal to converge toward a target signal value.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: October 8, 2013
    Assignee: Cirrus Logic, Inc.
    Inventors: Mohit Sood, Michael Allan Kost
  • Patent number: 8554259
    Abstract: A method and apparatus to improve the robustness of a wireless communication link between a base station and a mobile communication device. The method increases power selectively on portions of an uplink communication signal transmitted from the mobile communication device to the base station. The method monitors a quality metric value at the mobile communication device and sets the transmit power level of the first portion of an uplink communication signal to the first power level, if the monitored quality metric value is in a first range of quality values, or sets the transmit power level of the first portion of the uplink communication signal to a second power level, if the monitored quality metric value is in a second range of quality values. The first portion of the uplink communication signal includes control signals used by a base station to maintain connection of the wireless communication link.
    Type: Grant
    Filed: February 10, 2010
    Date of Patent: October 8, 2013
    Assignee: Apple Inc.
    Inventors: Venkatasubramanian Ramasamy, Giri Prassad Deivasigamani, Srinivasan Vasudevan, Mohit Narang, Longda Xing, Johnson O. Sebeni
  • Patent number: 8553036
    Abstract: Systems and methods for displaying patient-related data to a care provider are provided. Patient-related values are received. The quantity of values is greater than a graph overflow threshold indicative of an amount of display space of a graph. A set of visible values is defined based at least in part on the graph overflow threshold. Sets of hidden values and anomalous values are also defined. The values in the visible-value set are displayed within the display space of the graph. An anomaly indicator is provided for any value in both the visible-value set and the anomalous-value set, to notify a care provider of any visible anomalous patient-related value. An overflow identifier is displayed instead of any value in the hidden-values set. The overflow identifier indicates the number of values in the hidden-value set to inform the care provider as such.
    Type: Grant
    Filed: February 21, 2011
    Date of Patent: October 8, 2013
    Assignee: General Electric Company
    Inventors: Randy Lynn Taylor, Mohit K. Rohella, Jose Avila, George M. Philip
  • Publication number: 20130262073
    Abstract: A method, system and computer program product are disclosed for generating clock signals for a cycle accurate FPGA based hardware accelerator used to simulate operations of a device-under-test (DUT). In one embodiment, the DUT includes multiple device clocks generating multiple device clock signals at multiple frequencies and at a defined frequency ratio; and the FPG hardware accelerator includes multiple accelerator clocks generating multiple accelerator clock signals to operate the FPGA hardware accelerator to simulate the operations of the DUT. In one embodiment, operations of the DUT are mapped to the FPGA hardware accelerator, and the accelerator clock signals are generated at multiple frequencies and at the defined frequency ratio of the frequencies of the multiple device clocks, to maintain cycle accuracy between the DUT and the FPGA hardware accelerator. In an embodiment, the FPGA hardware accelerator may be used to control the frequencies of the multiple device clocks.
    Type: Application
    Filed: March 30, 2012
    Publication date: October 3, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sameth W. Asaad, Mohit Kapur
  • Publication number: 20130262072
    Abstract: A method, system and computer program product are disclosed for using a Field Programmable Gate Array (FPGA) to simulate operations of a device under test (DUT). The DUT includes a device memory having a number of input ports, and the FPGA is associated with a target memory having a second number of input ports, the second number being less than the first number. In one embodiment, a given set of inputs is applied to the device memory at a frequency Fd and in a defined cycle of time, and the given set of inputs is applied to the target memory at a frequency Ft. Ft is greater than Fd and cycle accuracy is maintained between the device memory and the target memory. In an embodiment, a cycle accurate model of the DUT memory is created by separating the DUT memory interface protocol from the target memory storage array.
    Type: Application
    Filed: March 30, 2012
    Publication date: October 3, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sameth W. Asaad, Mohit Kapur