Abstract: The present invention assesses memory (DIMM) strength by calculating frequency content of a radiated field which is collected by an apparatus, such as a dipole antenna. Radiated field is created by accelerated charge, which is a function of the slew rate or DIMM strength. Radiated power is directly proportional to the frequency at which bits are driven. By separating the radiated field from the near field or stored field, the DIMM strength content is isolated from other functional DIMM issues, such as tRCD latency, refresh cycles, addressing mode, etc. By examining the radiated power, the disadvantages of the prior art, such as by probing the DIMM's contacts, are avoided.

Abstract: A Twinax cable include a first axial cable having an inner diameter portion and an outer diameter portion and including a conductor surrounded by a dielectric material. A second axial cable has an inner diameter portion and an outer diameter portion and including a conductor surrounded by a dielectric material, the second axial cable being arranged such that a portion of the inner diameter thereof contacts the inner diameter portion of the first axial cable. A drain conductor is disposed between at least a portion of the inner diameter portion of the first axial cable and the inner diameter portion of the second axial cable. In addition, the a first foil layer contacts at least a portion of the outer diameter portion of the first axial cable and a second foil layer contacts at least a portion of the outer diameter portion of the second axial cable. An outer foil layer surrounds the first ax cable, the second axial cable, the first foil layer and the second foil layer.

Abstract: A cable having an electrically conducting wire with a cross sectional shape defined by a simple closed curve having from three to eight concave portions separated by an equal number of convex portions. The simple closed curve has no point where the radius of curvature is less than one-sixth (?) of an overall radius of the wire and no point where adjacent curves or lines intersect at an angle. The alternating concave and convex portions of the cable's cross-sectional shape may have substantially the same curvature. The cross-sectional shape of the cable avoids sharp angles and fight curves.

Abstract: The key limiter in a multi-drop system, such as a multi-drop memory system, is the super-positioning of reflection noise from multiple modules or pluggable units, such as DIMMs. Using the noise cancellation approach of the present invention, the noise is distributed across the width of the pulse thus significantly reducing the impact of noise super-positioning. Use of the system of the present invention provides improved noise margins and is a key enabler of high performance, high speed bus, particularly at higher bit rates, as well as an enabler for higher capacity modules, such as DIMMs. The system provides for electrical traces from each of the modules of varying lengths thereby distributing the noise reflections.

Abstract: A method of transmitting a signal on a bi-directional universal serial bus (“USB”) circuit for boosting a signal on a USB bus disclosed. The circuit includes a first stage inverting buffer coupled to a second stage inverting buffer to form a non-inverting buffer circuit. A high pass filter is coupled in series with the non-inverting buffer circuit to provide AC coupling to the USB bus and to allow fast signal edges through the circuit. The booster circuit is arranged to improve signal quality over a USB bus to allow additional USB devices and longer USB busses to be utilized.

Abstract: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a memory module system and DIMM connector is provided. A DIMM connector includes a plurality of DIMM sockets for receiving a corresponding plurality of DIMMs in a radially oriented, angularly spaced orientation. The DIMM sockets are connected in parallel at a memory module junction so that socket terminals of each DIMM socket are joined to the same relative terminal of all the other DIMM sockets along electronic pathways of substantially equal length. A memory controller selectively communicates with the DIMMs via the DIMM junction. By virtue of the improved topology, impedance within the DIMM connector may be better matched to minimize reflections and improve signal quality.

Abstract: A cable for high speed data communications and methods for manufacturing such cable are disclosed, the cable including a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer. The cable also includes conductive shield material wrapped in a rotational direction at a rate along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps of the conductive shield material along and about the longitudinal axis, the conductive shield material having a variable width. Transmitting signals on the cable including transmitting a balanced signal characterized by a frequency in the range of 7-9 gigahertz on the cable.

Abstract: A system and method for implementing a bus. In one embodiment, the system includes a bus switch operative to couple to a bus, and a plurality of trace segments coupled to the bus switch, where the trace segments have different lengths. The bus switch is operative to connect one of the trace segments to the bus based on at least one system requirement, and the selected trace segment cancels signal reflections on the bus.

Abstract: An apparatus, system, and method are disclosed for modifying memory device timing and voltage. A detection module detects a change of memory device stress. A timing modification module modifies the memory device timing in response to the change of the memory device stress. In addition, a voltage modification module modifies the memory device voltage in response to the change of the memory device stress. In one embodiment, a processor pause module pauses the operation of a processor module while the timing modification module modifies the memory device timing and the voltage modification module modifies the memory device voltage.

Abstract: The invention is directed to an on-chip probing apparatus. In accordance with an embodiment of the present invention, the on-chip probing apparatus includes: a plurality of switches on a chip; a plurality of externally accessible probe points on the chip; and a multiplexer for controlling the plurality of switches to selectively couple an output signal of the chip to one of the plurality of probe points.

Abstract: Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.

Abstract: Noise reduction among conductors, the conductors disposed adjacent to one another, the conductors characterized as two or more aggressor conductors and one or more victim conductors, a least two of the aggressor conductors driven with at least two signals that induce unwanted crosstalk upon at least one of the victim conductors, a programmable delay device disposed in a signal path of each of the at least two signals that induce unwanted crosstalk, including programming a delay period into each programmable delay device; receiving, simultaneously at the programmable delay devices, the at least two signals that induce unwanted crosstalk; and transmitting, on two aggressor conductors, the at least two signals that induce unwanted crosstalk, with the at least two signals separated in time by the delay period.

Abstract: A bi-directional universal serial bus (“USB”) circuit for boosting a signal on a USB bus disclosed. The circuit includes a first stage inverting buffer coupled to a second stage inverting buffer to form a non-inverting buffer circuit. A high pass filter is coupled in series with the non-inverting buffer circuit to provide AC coupling to the USB bus and to allow fast signal edges through the circuit. The booster circuit is arranged to improve signal quality over a USB bus to allow additional USB devices and longer USB busses to be utilized.

Abstract: The present invention is directed to a multi-path redundant architecture for fault tolerant fully buffered dual inline memory modules (FB-DIMMs).

Abstract: The invention is directed to an on-chip probing apparatus. In accordance with an embodiment of the present invention, the on-chip probing apparatus includes: a plurality of switches on a chip; a plurality of externally accessible probe points on the chip; and a multiplexer for controlling the plurality of switches to selectively couple an output signal of the chip to one of the plurality of probe points.

Abstract: An apparatus, system, and method are disclosed for dynamic phase equalization in a communication channel. A transmitter history module stores a plurality of bits from a data stream that is transmitted through the communication channel. A transmitter detection module detects a pre-transition bit of a first value that is preceded in the data stream by at least one bit of the first value and followed by a transition bit with a second value. A driver module transmits the data stream by driving the communication channel. A transition module pre-drives the communication channel to the second voltage of the transition bit during a bit time interval of the pre-transition bit.

Abstract: A multi-memory module circuit topology is disclosed that includes a memory controller, a plurality of memory modules connected to the memory controller through a memory bus, and a resonator connected to the plurality of memory modules in a starburst topology. A method for reducing impedance discontinuities in a multi-memory module circuit is disclosed that includes providing a plurality of memory modules connected to a memory controller through a memory bus, selecting a starburst topology, and connecting a resonator to the plurality of memory module in dependence upon the selected starburst topology. An additional method for reducing impedance discontinuities in a multi-memory module circuit is disclosed that includes providing by a resonator a predetermined discontinuity reducing impedance at a predetermined location in the multi-memory module circuit between at least two memory modules, the multi-memory module circuit having a plurality of components of logically arranged around the predetermined location.

Abstract: In an embodiment, a predicted voltage to supply to an electronic device is learned based on a dynamic voltage variation that occurs at the electronic device. The dynamic voltage variation occurs in response to the electronic device processing a functional event, and the predicted voltage is supplied to the electronic device in response to observing the functional event on a bus that is connected to the electronic device. In response to observing the dynamic voltage variation, the predicted voltage that is associated with the functional event is modified based on the dynamic voltage variation. Then, on the next occurrence of the functional event, the predicted voltage is supplied to the electronic device. In this way, voltage transients at the electronic device are controlled.

Abstract: An electronic system includes a circuit board formed from a composite material. The composite material includes fibers embedded within a substrate and the fibers are oriented substantially orthogonal to one another. A plurality of traces are formed on the board, and the plurality of traces are oriented relative to at least one of the fibers at an angle between about 17.5° and about 27.5° or between about 20.0° and about 25.0°. A pair of the traces are oriented substantially orthogonal to one another, and a pair of the traces are oriented relative to one another at an angle of about 45.0°. The fibers are fiberglass, and the substrate is an epoxy resin. The fibers have a different dielectric constant than the substrate.

Abstract: Data processing devices arranged in a redundant manner, with each of the devices including a thermal sensor measuring its operating temperature, are allocated so that data is processed by the coolest available device. In one form of the invention, the same data is stored in two data storage devices to be retrieved from the device having a cooler operating temperature. When the data is to be stored, it may further be stored in the coolest one of a number of storage devices. In other forms of the invention, the data processing devices are, for example, adapter circuits or computer systems accessed by a server.