Abstract: The present invention provides a simple, easy to implement method and apparatus to reduce jitter in a channel and expand the eye width and eye height of the eye pattern of the signal. The method and apparatus of the present invention reduces jitter specific to a channel in a high speed interface. The present invention utilizes a phasing shifting mechanism based on history of the incoming bits at the receiver. The input bits from the channel are shifted in time before getting to the receiver. This approach significantly reduces Intersymbol Interference (ISI) and deterministic jitter, thus opening up the eye width and eye height for a given interface.

Abstract: A cable for high speed data communications and methods for manufacturing such cable are disclosed, the cable including a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer. The cable also includes conductive shield material wrapped in a rotational direction at a rate along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps of the conductive shield material along and about the longitudinal axis, the conductive shield material having a variable width. Transmitting signals on the cable including transmitting a balanced signal characterized by a frequency in the range of 7-9 gigahertz on the cable.

Abstract: Illustrative embodiments provide a computer implemented method, an apparatus and a computer program product for workflow management control in a resource hierarchy. In one embodiment, the computer implemented method comprises, receiving data, from a plurality of target data sources, into a collection, and synthesizing the received data in the collection to establish a resource hierarchy. The collection is then queried, using criteria in a request for a resource from a requester to provide a selected resource from the collection, forming a response, the selected resource of the response being a best fit result, and returning the response to the requester.

Abstract: Methods and systems for reducing noise coupling in high-speed digital systems. Exemplary embodiments include a method, including etching a plurality of high speed signal traces onto a core insulating layer, forming trenches on respective sides of the plurality of high speed signal traces, thereby removing insulating material adjacent to the plurality of high speed signal traces and forming pedestals having remaining insulating material, the plurality of high speed signal traces disposed on and coupled to the remaining insulating material, coupling pre-preg material on the high speed signal traces, removing the pre-preg material adjacent the trenches, thereby retaining the pre-preg material aligned with the high speed signal traces, and heating and pressing a core layer to the pre-preg layer, and heating and pressing the pre-preg layer to the core insulating layer.

Abstract: Methods and systems for reducing noise coupling in high-speed digital systems. Exemplary embodiments include a method, including etching a plurality of high speed signal traces onto a core insulating layer, forming trenches on respective sides of the plurality of high speed signal traces, thereby removing insulating material adjacent to the plurality of high speed signal traces and forming pedestals having remaining insulating material, the plurality of high speed signal traces disposed on and coupled to the remaining insulating material, coupling pre-preg material on the high speed signal traces, removing the pre-preg material adjacent the trenches, thereby retaining the pre-preg material aligned with the high speed signal traces, and heating and pressing a core layer to the pre-preg layer, and heating and pressing the pre-preg layer to the core insulating layer.

Abstract: Methods and systems for reducing noise coupling in high-speed digital systems. Exemplary embodiments include a method, including etching a plurality of high speed signal traces onto a core insulating layer, forming trenches on respective sides of the plurality of high speed signal traces, thereby removing insulating material adjacent to the plurality of high speed signal traces and forming pedestals having remaining insulating material, the plurality of high speed signal traces disposed on and coupled to the remaining insulating material, coupling pre-preg material on the high speed signal traces, removing the pre-preg material adjacent the trenches, thereby retaining the pre-preg material aligned with the high speed signal traces, and heating and pressing a core layer to the pre-preg layer, and heating and pressing the pre-preg layer to the core insulating layer.

Abstract: A cable for high speed data communications and methods for manufacturing such cable are disclosed, the cable including a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer. The cable also includes conductive shield material wrapped in a rotational direction at a rate along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps of the conductive shield material along and about the longitudinal axis, the conductive shield material having a variable width. Transmitting signals on the cable including transmitting a balanced signal characterized by a frequency in the range of 7-9 gigahertz on the cable.

Abstract: A method of electrically qualifying high speed printed circuit board (PCB) connectors includes mounting a PCB connector on a test card, sending bit patterns through a first portion of the test card, evaluating a waveform on a sense signal on a second portion of the test card for the bit patterns launched on said first portion of the test card to measure common mode noise, and comparing the measured common mode noise of the second portion of the test card to a golden standard performed on a pre-qualified connector. The first portion of the test card comprises connectors to inject bit patterns. The second portion of the test card includes a split plane which induces common mode noise on a sense signal, the sense signal, and a termination pack. If the measured common mode noise on the PCB connector is worse than the golden standard, then the PCB connector is disqualified. If the measured common mode noise on the PCB connector is as good as or better than the golden standard, then the PCB connector is qualified.

Abstract: A method for testing a printed circuit board to determining the dielectric loss associated with the circuit board material relative to a standard. Dielectric losses in the material generate heat when a high frequency electronic signal, such as a microwave frequency signal, is communicated through a microstrip that is embedded within the printed circuit board. The temperature or spectrum at the surface of printed circuit board is measured and compared against the temperature or spectrum of the standard to determine whether the material under test is acceptable. While various temperature measurement devices may be used, the temperature is preferably measured without contacting the surface, such as using an infrared radiation probe.

Abstract: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design is provided. The design structure provides a duplicate test signal of an output signal under test in an integrated circuit including selecting through a multiplexer an output signal under test, the output signal under test selected from a plurality of output signals of the integrated circuit; providing through the multiplexer a duplicate signal of the selected output signal under test; adding a high impedance load on the duplicate signal thereby reducing the amplitude of the duplicate signal; and amplifying the reduced duplicate signal thereby creating the duplicate test signal.

Abstract: Providing a duplicate test signal of an output signal under test in an integrated circuit including selecting through a multiplexer an output signal under test, the output signal under test selected from a plurality of output signals of the integrated circuit; providing through the multiplexer a duplicate signal of the selected output signal under test; adding a high impedance load on the duplicate signal thereby reducing the amplitude of the duplicate signal; and amplifying the reduced duplicate signal thereby creating the duplicate test signal.

Abstract: An apparatus, system, and method are disclosed for integrating component testing. A voltage module modifies a reference voltage integral to an electronic device to a plurality of reference voltage values. A test module tests a component of the electronic device at each of the plurality of reference voltage values. In addition, the test module determines a voltage range for the component, wherein the voltage range comprises voltage values between a high voltage failure and a low voltage failure. An optimization module sets the reference voltage value to within the voltage range.

Abstract: In electronic devices with signal traces positioned between a ground layer and a voltage reference layer, systems and methods are provided for connecting a hot pluggable device to the electronic device in a manner that diminishes signal degradation due to parasitic effects. The first device has a second reference layer near the connector that connects to a second device voltage reference layer maintained at a given voltage level across the connector. In the first device near the connector the signal trace is positioned in between a ground layer of the first device and the second reference layer which is maintained at a given voltage by a voltage regulator of the second device. The signal return current travels past the second reference layer to a first reference layer of the first device which is maintained by the first device's voltage regulator through AC decoupling capacitors minimizing the current return path discontinuity.

Abstract: Reducing via stub resonance in printed circuit boards. In one aspect, a method for reducing via stub resonance in a circuit board includes determining that resonance exists for a signal to be transmitted through a signal via extending across a plurality of layers in the circuit board. The resonance is caused by a via stub of the signal via, the via stub extending past a layer connected to the signal via. A location is determined for a ground via to be placed relative to the signal via, the location of the ground via being determined based on reducing the resonance for the signal to be transmitted in the signal via.

Abstract: A programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to alter various behaviors of the memory module. The altered behaviors may be changing data streams that are written to the memory module to simulate errors, altering the timing and/or loading of the memory module signals, downloading programs for execution by a processor core within the memory module, changing driver strengths of output signals of the memory module, and manipulating in an analog domain, signals at terminals of the memory module such as injecting noise on power supply connections to the memory module. The memory module may emulate multiple selectable memory module types, and may include a complete storage array to provide standard memory module operation.

Abstract: A method for performing memory diagnostics using a programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to alter various behaviors of the memory module. The altered behaviors may be changing data streams that are written to the memory module to simulate errors, altering the timing and/or loading of the memory module signals, downloading programs for execution by a processor core within the memory module, changing driver strengths of output signals of the memory module, and manipulating in an analog domain, signals at terminals of the memory module such as injecting noise on power supply connections to the memory module.

Abstract: A computer implemented method, apparatus, and computer program product for managing organizational resources. The process combines social group data with management information data to form social network data, wherein social group data is derived from interactions among a plurality of users of a social group. The process analyzes the social network data to identify associations among the plurality of users, and generates a multidimensional social network model using the associations among the plurality of users. Thereafter, the process presents a set of recommendations for allocation of the organizational resources, wherein the set of recommendations are derived from the social network model.

Abstract: The present invention assesses memory (DIMM) strength by calculating frequency content of a radiated field which is collected by an apparatus, such as a dipole antenna. Radiated field is created by accelerated charge, which is a function of the slew rate or DIMM strength. Radiated power is directly proportional to the frequency at which bits are driven. By separating the radiated field from the near field or stored field, the DIMM strength content is isolated from other functional DIMM issues, such as tRCD latency, refresh cycles, addressing mode, etc. By examining the radiated power, the disadvantages of the prior art, such as by probing the DIMM's contacts, are avoided.

Abstract: A Twinax cable include a first axial cable having an inner diameter portion and an outer diameter portion and including a conductor surrounded by a dielectric material. A second axial cable has an inner diameter portion and an outer diameter portion and including a conductor surrounded by a dielectric material, the second axial cable being arranged such that a portion of the inner diameter thereof contacts the inner diameter portion of the first axial cable. A drain conductor is disposed between at least a portion of the inner diameter portion of the first axial cable and the inner diameter portion of the second axial cable. In addition, the a first foil layer contacts at least a portion of the outer diameter portion of the first axial cable and a second foil layer contacts at least a portion of the outer diameter portion of the second axial cable. An outer foil layer surrounds the first ax cable, the second axial cable, the first foil layer and the second foil layer.

Abstract: A cable having an electrically conducting wire with a cross sectional shape defined by a simple closed curve having from three to eight concave portions separated by an equal number of convex portions. The simple closed curve has no point where the radius of curvature is less than one-sixth (?) of an overall radius of the wire and no point where adjacent curves or lines intersect at an angle. The alternating concave and convex portions of the cable's cross-sectional shape may have substantially the same curvature. The cross-sectional shape of the cable avoids sharp angles and fight curves.