Abstract: The present invention provides a benzoheterocycle substituted tetrahydroisoquinoline compound, and in particular, relates to a compound shown in formula (I) and a pharmaceutically acceptable salt thereof, and the compound for the treatment of chronic kidney disease.

Abstract: Disclosed are an arc discharge detection method and device for a battery system, and a battery energy storage system. The arc discharge detection method for a battery system comprises: sampling a terminal voltage and a charging and discharging current of a battery system, sampling the terminal voltage of the battery system twice and calculating a first voltage difference value, and sampling the terminal voltage of the battery system and a terminal voltage of an electricity load and calculating a second voltage difference value; performing time domain and frequency domain analysis on the sampled data to obtain corresponding time domain and frequency domain feature values; and on the basis of the time domain and frequency domain feature values and the first and second voltage difference values, determining whether arc discharge features are met, so as to determine whether an arc discharge fault occurs in the battery system.

Abstract: A package structure and a method for manufacturing the same are provided. The package structure includes an electronic device, a heat spreader, an intermediate layer and an encapsulant. The electronic device includes a plurality of electrical contacts. The intermediate layer is interposed between the electronic device and the heat spreader. The intermediate layer includes a sintered material. The encapsulant encapsulates the electronic device. A surface of the encapsulant is substantially coplanar with a plurality of surfaces of the electrical contacts.

Abstract: An electronic package is provided. The electronic package includes a carrier, a first electronic component, a bonding element, and a barrier. The carrier has a conductive layer. The first electronic component is disposed adjacent to the carrier and has a first terminal and a second terminal. The bonding element is configured to electrically connect the conductive layer to the first terminal. The barrier is configured to avoid electrically bypassing an electrical path in the first electronic component and between the first terminal and the second terminal.

Abstract: A package structure and a method for manufacturing the same are provided. The package structure includes an electronic device, a heat spreader, an intermediate layer and an encapsulant. The electronic device includes a plurality of electrical contacts. The intermediate layer is interposed between the electronic device and the heat spreader. The intermediate layer includes a sintered material. The encapsulant encapsulates the electronic device. A surface of the encapsulant is substantially coplanar with a plurality of surfaces of the electrical contacts.

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first passivation layer, a first metal layer and a first semiconductor die. The first metal layer is embedded in the first passivation layer. The first metal layer defines a first through-hole. The first semiconductor die is disposed on the first passivation layer.

Abstract: Provided include methods, compositions and kits for single cell target sequencing, including but not limited to, high-throughput detection of nucleic acid sequences of single cell T cell receptor, high-throughput detection of expressed viral sequences in host cells, detection of cancer druggable mutations (e.g., lung cancer druggable mutations) in single cells, and simultaneous detection of targeted regions and whole transcriptome in single cells.

Abstract: An electronic package is provided. The electronic package includes a carrier, a first electronic component, a bonding element, and a barrier. The carrier has a conductive layer. The first electronic component is disposed adjacent to the carrier and has a first terminal and a second terminal. The bonding element is configured to electrically connect the conductive layer to the first terminal. The barrier is configured to avoid electrically bypassing an electrical path in the first electronic component and between the first terminal and the second terminal.

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first passivation layer, a first metal layer and a first semiconductor die. The first metal layer is embedded in the first passivation layer. The first metal layer defines a first through-hole. The first semiconductor die is disposed on the first passivation layer.

Abstract: A semiconductor package structure and a method of manufacturing the same are provided. The semiconductor package structure includes an electronic component having a first surface, a second surface opposite to the first surface and a circuit structure closer to the first surface than to the second surface. The semiconductor package structure also includes a passive component connected to the second surface of the electronic component. The semiconductor package structure further includes a conductive element extending into the electronic component and configured to electrically connect the circuit structure with the passive component.

Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first semiconductor device, a second semiconductor device, and an alignment material. The first semiconductor device has a first bonding layer, and the first bonding layer includes a first bond pad contacting an organic dielectric material. The second semiconductor device has a second bonding layer, and the second bonding layer includes a second bond pad contacting the organic dielectric material. The alignment material is between the first bonding layer and the second bonding layer.

Abstract: A semiconductor package structure includes at least one first semiconductor die, at least one second semiconductor die and an encapsulant. The first semiconductor die has a first surface and includes a plurality of first pillar structures disposed adjacent to the first surface. The second semiconductor die is electrically connected to the first semiconductor die. The encapsulant covers the first semiconductor die and the second semiconductor die. A lower surface of the encapsulant is substantially coplanar with an end surface of each of the first pillar structures and a surface of the second semiconductor die.

Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a first semiconductor element, a first redistribution layer, a second redistribution layer, and a conductive via. The first semiconductor element has a first active surface and a first back surface opposite to the first active surface. The first redistribution layer is disposed adjacent to the first back surface of the first semiconductor element. The second redistribution layer is disposed adjacent to the first active surface of the first semiconductor element. The conductive via is disposed between the first redistribution layer and the second redistribution layer, where the conductive via inclines inwardly from the second redistribution layer to the first redistribution layer.

Abstract: A negative electrode active material including negative electrode active material particles, wherein the negative electrode active material particles contain silicon compound particles containing a silicon compound, the silicon compound particles contain Li2SiO3, at least a part of a surface of the silicon compound particles is covered with a carbon layer, and a surface layer of the negative electrode active material particles contains a substance having a carboxylic acid structure. Provided by this configuration is a negative electrode active material capable of increasing battery capacity due to improved initial efficiency and capable of realizing satisfactory battery cycle characteristics.

Abstract: A package structure and a method for manufacturing the same are provided. The package structure includes an electronic device, a heat spreader, an intermediate layer and an encapsulant. The electronic device includes a plurality of electrical contacts. The intermediate layer is interposed between the electronic device and the heat spreader. The intermediate layer includes a sintered material. The encapsulant encapsulates the electronic device. A surface of the encapsulant is substantially coplanar with a plurality of surfaces of the electrical contacts.

Abstract: A semiconductor package structure includes at least one first semiconductor die, at least one second semiconductor die and an encapsulant. The first semiconductor die has a first surface and includes a plurality of first pillar structures disposed adjacent to the first surface. The second semiconductor die is electrically connected to the first semiconductor die. The encapsulant covers the first semiconductor die and the second semiconductor die. A lower surface of the encapsulant is substantially coplanar with an end surface of each of the first pillar structures and a surface of the second semiconductor die.

Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first semiconductor device, a second semiconductor device, and an alignment material. The first semiconductor device has a first bonding layer, and the first bonding layer includes a first bond pad contacting an organic dielectric material. The second semiconductor device has a second bonding layer, and the second bonding layer includes a second bond pad contacting the organic dielectric material. The alignment material is between the first bonding layer and the second bonding layer.

Abstract: A semiconductor device package includes a substrate, a first molding compound and antenna layer. The substrate has a first surface and a second surface opposite to the first surface. The first molding compound is disposed on the first surface of the substrate. The antenna layer is disposed on the first molding compound. The substrate, the first molding compound and the antenna layer define a cavity.

Abstract: A semiconductor device package includes a redistribution structure, a conductive substrate stacked on the redistribution structure and an encapsulant encapsulating the redistribution structure and the conductive substrate. The encapsulant encapsulates a side surface of the conductive substrate. A method for manufacturing an electronic device package includes: providing a carrier, forming a redistribution structure on the carrier, mounting a conductive substrate on a first surface of the redistribution structure, forming a first encapsulant to encapsulate the first surface of the redistribution structure and a side surface of the conductive substrate, and removing the carrier.