Abstract: A device structure includes a first electronic structure and a plurality of first electric contacts. The first electronic structure has a surface and a center. The first electric contacts are exposed from the surface. The first electric contacts are spaced by a pitch that increases with increasing distance from the center.

Abstract: The invention relates to a method for preparing a strand-specific library from an nucleic acid or preferably RNA sample, for RNA comprising the steps of: (i) optionally fragmenting said RNA sample, (ii) generating a plurality of first cDNA strands by subjecting said fragmented RNA to reverse transcription by using a reverse transcriptase and first oligonucleotide primers, (iii) generating a plurality of second cDNA strands by using a DNA polymerase, second oligonucleotide primers, and the plurality of first cDNA strands, and (iv) ligating adapters to the 3? and 5? termini of the of double-stranded cDNA, (v) wherein the first cDNA strand allows no adapter ligation at its 5? terminus and said second cDNA strand allows adapter ligation at its 5? terminus, or vice versa, and, (v) optionally cloning, sequencing or otherwise using the strand-specific library.

Abstract: A semiconductor package includes a semiconductor die having a first surface and a second surface opposite to the first surface, a conductive wiring layer stacked with the semiconductor die and proximal to the first surface, an encapsulant encapsulating the semiconductor die and stacked with the conductive wiring layer, and a replacement structure exposing from the encapsulant and being free of fillers. A method for manufacturing the semiconductor package is also disclosed in the present disclosure.

Abstract: A package structure includes at least one electronic device, a protection layer and an encapsulant. The electronic device has a first surface and includes a plurality of bumps disposed adjacent to the first surface thereof. Each of the bumps has a first surface. The protection layer covers the bumps and the first surface of the electronic device, and has a first surface. The encapsulant covers the protection layer and at least a portion of the electronic device, and has a first surface. The first surfaces of the bumps, the first surface of the protection layer and the first surface of the encapsulant are substantially coplanar with each other.

Abstract: A semiconductor device package includes a redistribution layer, a first semiconductor device, a first connection structure, and a first conductive layer. The first semiconductor device can be disposed on the redistribution layer. The first connection structure can be disposed between the first semiconductor device and the redistribution layer. The first conductive layer can surround the first connection structure.

Abstract: A semiconductor device package includes a first electronic component, a plurality of first conductive traces, a second electronic component, a plurality of second conductive traces and a plurality of first conductive structures. The first electronic component has a first active surface. The first conductive traces are disposed on and electrically connected to the first active surface. The second electronic component is stacked on the first electronic component. The second electronic component has an inactive surface facing the first active surface, a second active surface opposite the inactive surface, and at least one lateral surface connecting the second active surface and the inactive surface. The second conductive traces are electrically connected to the second active surface, and extending from the second active surface to the lateral surface. The first conductive structures are electrically connecting the second conductive traces to the first conductive traces, respectively.

Abstract: A semiconductor package structure includes a semiconductor die surface having a narrower pitch region and a wider pitch region adjacent to the narrower pitch region, a plurality of first type conductive pillars in the narrower pith region, each of the first type conductive pillars having a copper-copper interface, and a plurality of second type conductive pillars in the wider pitch region, each of the second type conductive pillars having a copper-solder interface. A method for manufacturing the semiconductor package structure described herein is also disclosed.

Abstract: A semiconductor package structure includes a conductive trace layer, a semiconductor die over the conductive trace layer, a structure enhancement layer surrounding the semiconductor die, and an encapsulant covering the semiconductor die and the structure enhancement layer. The structure enhancement layer coincides with a mass center plane of the semiconductor package structure. The mass center plane is parallel to a top surface of the semiconductor die. A method for manufacturing the semiconductor package structure is also provided.

Abstract: A semiconductor package structure includes a substrate, a first semiconductor die, a first dielectric, a second semiconductor die, and a second dielectric. The substrate has a first surface. The first semiconductor die is disposed on the first surface. The first dielectric encapsulates the first semiconductor die. The second semiconductor die is disposed on the first surface and adjacent to the first semiconductor die. The second dielectric encapsulates the second semiconductor die. The first dielectric is in contact with the second dielectric. An average filler size in the first dielectric is substantially greater than an average filler size in the second dielectric.

Abstract: A semiconductor package includes a redistribution layer (RDL) structure, a first die, a molding compound and an interconnect structure. The first die is disposed on the RDL structure. The molding compound is disposed on the RDL structure. The interconnect structure electrically connects the first die to the RDL structure.

Abstract: A semiconductor device package includes a redistribution layer, a first semiconductor device, a second semiconductor device, a first insulation body, and a second insulation body. The first semiconductor device can be disposed on the redistribution layer. The second semiconductor device can be stacked on the first semiconductor device. The first insulation body can be disposed between the first semiconductor device and the second semiconductor device. The first insulation body may have a number of first particles. The second insulation body can encapsulate the first insulation body and have a number of second particles. One of the number of first particles can have a flat surface.

Abstract: A negative electrode active material contains particle of the negative electrode active material, wherein the particle of the negative electrode active material contains particle of a silicon compound which contains a silicon compound (SiOx: 0.5?x?1.6), the particle of the silicon compound contains lithium, and the particle of the negative electrode active material has a total content rate of a polyphenylene compound component and a polycyclic aromatic component measured by TPD-MS of 1 ppm by mass or more and 4,000 ppm by mass or less. As a result, a negative electrode active material is capable of improving cycle characteristics and initial charge/discharge characteristics when it is used as a negative electrode active material of a lithium ion secondary battery.

Abstract: A semiconductor device package includes a substrate, a first molding compound and antenna layer. The substrate has a first surface and a second surface opposite to the first surface. The first molding compound is disposed on the first surface of the substrate. The antenna layer is disposed on the first molding compound. The substrate, the first molding compound and the antenna layer define a cavity.

Abstract: An electrical connector is provided for a mating connector to be inserted thereto. The electrical connector includes an insulating body having a tongue, and multiple terminals. A middle grounding sheet is located between the terminals in upper and lower rows, and has at least one first through hole. Each of left and right sides of the middle grounding sheet has a latch slot and a notch. The insulating body has a first insulating post entering the first through hole and a second insulating post entering the notch. A dimension of the second insulating post is larger than a dimension of the first insulating post. A metal shell frames outside the insulating body to form an insertion space. A first clearance between a first protruding portion and a shielding casing of the mating connector is more than or equal to 0.001 mm and less than or equal to 0.0449 mm.

Abstract: A semiconductor package includes a redistribution layer (RDL) structure, a first die, a molding compound and an interconnect structure. The first die is disposed on the RDL structure. The molding compound is disposed on the RDL structure. The interconnect structure electrically connects the first die to the RDL structure.

Abstract: A semiconductor package device includes a substrate, an electronic component, a ring frame, an encapsulant, a thermal conducting material and a lid. The electronic component is disposed on the substrate. The ring frame is disposed on the substrate and surrounds the electronic component. The encapsulant encapsulates the electronic component and a first portion of the ring frame. The encapsulant exposes a second portion of the ring frame. The encapsulant and the second portion of the ring frame define a space. The thermal conducting material is disposed in the space. The lid is disposed on the thermal conducting material and connects with the second portion of the ring frame.

Abstract: The present invention is directed to methods for the generation of nucleic acids from an RNA template and further nucleic acid replication. Specifically, the invention is directed to the generation and amplification of nucleic acids by reverse transcriptase-polymerase chain reaction (RT-PCR).

Abstract: A semiconductor package structure includes at least one semiconductor die, at least one conductive pillar, an encapsulant and a circuit structure. The semiconductor die has an active surface. The conductive pillar is disposed adjacent to the active surface of the semiconductor die. The encapsulant covers the semiconductor die and the conductive pillar. The encapsulant defines at least one groove adjacent to and surrounding the conductive pillar. The circuit structure is electrically connected to the conductive pillar.

Abstract: A semiconductor device package includes a first redistribution layer (RDL), a first die, a second die, a second RDL and an encapsulant. The first die is disposed on the first RDL and is electrically connected to the first RDL. The first die has a first electrical contact. The second die is disposed on the first RDL and is electrically connected to the first RDL. The second die has a first electrical contact. The second RDL is surrounded by the first RDL. The second RDL has a first electrical contact electrically connected to the first electrical contact of the first die and a second electrical contact electrically connected to the first electrical contact of the second die. A size of the first electrical contact of the second RDL is greater than a size of the second electrical contact of the second RDL.

Abstract: The present invention provides new methods and kits to improve the efficiency of ligation reactions, in particular in molecular biology applications, such as the next generation sequencing (NGS) library construction methods. In next-generation sequencing methods, the ligation step is critical in adding sequencing platform-specific adapters to the DNA fragments that are to be sequenced. Said improvement is achieved by the addition of single- or double-stranded DNA-binding proteins in the ligation step.