Patents by Inventor Naoki Shibata

Naoki Shibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240249951
    Abstract: A substrate treatment method includes: developing a substrate which has a coating film of a metal-containing resist formed thereon and has been subjected to an exposure treatment and a heat treatment after the exposure treatment, the developing including: exposing the substrate to an acid atmosphere being an atmosphere containing gas of a weak acid under a pressure of an atmospheric pressure or higher; and removing a product produced by a reaction between the metal-containing resist and the gas of the weak acid, by heating the substrate.
    Type: Application
    Filed: January 22, 2024
    Publication date: July 25, 2024
    Inventors: Kosuke YOSHIHARA, Yuichi TERASHITA, Yukinobu OTSUKA, Shinsuke TAKAKI, Hiroki TADATOMO, Naoki SHIBATA
  • Publication number: 20240244742
    Abstract: A wiring circuit board includes a support metal layer; a base insulating layer disposed on at least one surface in the thickness direction of the support metal layer, and a wiring layer disposed on one surface in the thickness direction of the base insulating layer. A plurality of stripe grooves that extends along a predetermined direction orthogonal to the thickness direction and a plurality of recesses that sinks in the thickness direction of the support metal layer are formed on one surface in the thickness direction and/or the other surface in the thickness direction of the support metal layer. The recesses form a two-dimensional code having a generally rectangular shape in plan view by means of a dot pattern. One side of the two-dimensional code is disposed so as to lie along the stripe grooves.
    Type: Application
    Filed: January 28, 2022
    Publication date: July 18, 2024
    Applicant: NITTO DENKO CORPORATION
    Inventors: Kenya TAKIMOTO, Naoki SHIBATA, Hayato TAKAKURA
  • Publication number: 20240230893
    Abstract: An object detection device is mounted on a moving body and detects an object that exists around the moving body, the object detection device including a transceiver that transmits a transmission wave and receives a reception wave generated by the transmission wave being reflected by the object, and a deviation detector that detects a deviation of the transceiver from a normal position that is a predetermined mounting position of the transceiver on the basis of echo information indicating a temporal change in intensity of the reception wave and reference echo information stored in a storage device in advance.
    Type: Application
    Filed: June 24, 2022
    Publication date: July 11, 2024
    Applicant: AISIN CORPORATION
    Inventors: Ippei SUGAE, Koichi SASSA, Naoki SHIBATA
  • Patent number: 12035484
    Abstract: A wiring circuit board includes a metal support layer, a base insulating layer disposed on one side in a thickness direction of the metal support layer, and a conductive layer disposed on one side in the thickness direction of the base insulating layer, and including a first terminal and a ground lead residual portion electrically connected to the first terminal. The base insulating layer has a through hole penetrating in the thickness direction. The ground lead residual portion has an opening continuous so as to surround the through hole.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: July 9, 2024
    Assignee: NITTO DENKO CORPORATION
    Inventors: Kenya Takimoto, Naoki Shibata, Hayato Takakura
  • Publication number: 20240224435
    Abstract: A method for producing a wiring circuit board includes a step of forming an insulating layer on one surface in a thickness direction of a substrate, a step of forming a plurality of wirings on one surface in the thickness direction of the insulating layer, a step of forming an opening portion including the plurality of wirings when projected in the thickness direction in the substrate, a step of forming a resist pattern having an opening portion having a pattern shape along the plurality of wirings on the other surface in the thickness direction of the insulating layer, a step of forming a metal support portion by depositing a metal material on the insulating layer inside the opening portion, and a step of removing the resist pattern.
    Type: Application
    Filed: January 25, 2022
    Publication date: July 4, 2024
    Applicant: NITTO DENKO CORPORATION
    Inventors: Hayato TAKAKURA, Naoki SHIBATA, Makoto TSUNEKAWA
  • Publication number: 20240223386
    Abstract: A blockchain system is capable of reducing the generation of isolated blocks and unfairness among miners resulting from block propagation delays caused by an increase in block data size. Each block is divided into part A and part B, and transaction information is stored in part B. After the miner receives Part A of a certain block and before the reception of Part B is completed, the miner determines the transaction data to be included in the next block after the received block from the information stored in Part A and starts mining the next block after the received block. In addition, the miner maintains multiple blockchains in case the reception of part B is not completed, and switches the blockchain to be mined according to the conditions.
    Type: Application
    Filed: June 27, 2022
    Publication date: July 4, 2024
    Inventor: Naoki SHIBATA
  • Publication number: 20240201244
    Abstract: A light output estimation method for light-emitting device is a method for estimating light output of a light-emitting device that has a nitride semiconductor light-emitting element. The light output estimation method for light-emitting device includes a first estimation criterion to estimate light output of the light-emitting device in a period before a predetermined accumulated light emission time TX, and a second estimation criterion to estimate light output of the light-emitting device in a period after the predetermined accumulated light emission time TX. The first estimation criterion and the second estimation criterion are different criteria.
    Type: Application
    Filed: December 8, 2023
    Publication date: June 20, 2024
    Applicant: NIKKISO CO., LTD.
    Inventors: Kenta URA, Naoki SHIBATA
  • Publication number: 20240205025
    Abstract: A blockchain system operated by nodes participating in a peer-to-peer network, includes: registering the digital certificate of the verification key of each user account on the blockchain, and determining whether or not the digital certificate of the verification key of each user account is registered on the blockchain; and limiting the types of operations that can be performed by the user on the blockchain according to whether or not the digital certificate of the verification key of the user account of each user is registered on the blockchain.
    Type: Application
    Filed: November 11, 2021
    Publication date: June 20, 2024
    Applicant: PROOF-OF-SEARCH K.K.
    Inventors: Naoki SHIBATA, Eiji ITO, Hironori WATANABE
  • Publication number: 20240164024
    Abstract: A method for producing a wiring circuit board includes a region setting step of setting a pattern forming region and an opening forming region in a support layer; an insulating layer forming step of forming a base insulating layer on the support layer in the pattern forming region; a pattern step of forming a conductive pattern having a first conductive layer and a second conductive layer on the base insulating layer; and an etching step of etching the support layer in the opening forming region, and in the pattern step, a dummy pattern is formed in the opening forming region.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Applicant: NITTO DENKO CORPORATION
    Inventors: Ikuya HASHIMOTO, Ryosuke SASAOKA, Naoki SHIBATA
  • Publication number: 20240164017
    Abstract: A wiring circuit board includes a first insulating layer, a conductive pattern disposed at one side of the first insulating layer in a thickness direction and having a terminal and a wire connected with the terminal, and a second insulating layer for suppressing release of the terminal from the first insulating layer. The second insulating layer has a first portion disposed at the one side of the first insulating layer in the thickness direction and a second portion disposed at one side of a peripheral edge portion of the terminal in the thickness direction and covering the peripheral edge portion.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Applicant: NITTO DENKO CORPORATION
    Inventors: Hideki MATSUI, Naoki SHIBATA, Ryosuke SASAOKA
  • Publication number: 20240114628
    Abstract: A method for producing a wiring circuit board includes a preparation step of preparing a substrate; a first patterning step of forming a first insulating layer on one side of the substrate in a thickness direction; a second patterning step of forming a conductive pattern on one side of the first insulating layer in the thickness direction; and a deposition step of depositing a metal on the other side of the substrate in the thickness direction and forming a first metal support layer. The conductive pattern has two terminals, and two wirings. The first metal support layer has a terminal support portion supporting the terminals, a wiring support portion supporting one of the wirings, and a second wiring support portion supporting the other wiring and disposed spaced from the wiring support portion.
    Type: Application
    Filed: September 20, 2023
    Publication date: April 4, 2024
    Applicant: NITTO DENKO CORPORATION
    Inventors: Kenta FUKUSHIMA, Hayato TAKAKURA, Naoki SHIBATA, Ryosuke SASAOKA
  • Publication number: 20240114615
    Abstract: A method for manufacturing a wiring circuit board includes steps: 1) preparing a metal supporting layer, a different-reflectance layer, an insulating base layer, and a wiring layer sequentially toward one side in a thickness direction, and 2) irradiating the circuit board with reflected light including light containing one wavelength in light between wavelengths 650 nm and 950 nm from one side in the thickness direction of the circuit board to inspect the wiring layer based on the reflected light at the circuit board. In 2), the outer shape of the wiring layer is inspected based on the contrast between first reflected light at one surface in the thickness direction of the wiring layer and second reflected light at one surface in the thickness direction of the different-reflectance layer. The difference between a reflectance R1 of the wiring layer and a reflectance R2 of the different-reflectance layer is 40% or more.
    Type: Application
    Filed: September 15, 2020
    Publication date: April 4, 2024
    Applicant: NITTO DENKO CORPORATION
    Inventors: Hayato TAKAKURA, Naoki SHIBATA, Yasunari OYABU
  • Publication number: 20240107683
    Abstract: A wiring circuit board includes a first insulating layer; a conductive pattern disposed on one side of the first insulating layer in a thickness direction; and a metal support layer disposed on the other side of the first insulating layer in the thickness direction. The metal support layer has a terminal support portion supporting three terminals of the conductive pattern, a wiring support portion supporting a wiring of the conductive pattern, and a second wiring support portion supporting a second wiring of the conductive pattern. A thickness of each of the wiring support portions is thinner than a thickness of the terminal support portion.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 28, 2024
    Applicant: NITTO DENKO CORPORATION
    Inventors: Kenta FUKUSHIMA, Hayato TAKAKURA, Naoki SHIBATA, Ryosuke SASAOKA
  • Publication number: 20240107667
    Abstract: A method for producing a wiring circuit board includes a step of preparing a substrate; a step of forming a metal layer on one side of the substrate in a thickness direction; a step of forming a first insulating layer on one side of the metal layer in the thickness direction; a step of forming a conductive pattern on one side of the first insulating layer in the thickness direction; a step of removing the substrate and exposing the metal layer; and a step of depositing a metal on the other side of the metal layer in the thickness direction and forming a first metal support layer. The first metal support layer has a terminal support portion supporting two terminals of a conductive pattern, a wiring support portion supporting a wiring of the conductive pattern, and a second wiring support portion supporting a second wiring of the conductive pattern.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 28, 2024
    Applicant: NITTO DENKO CORPORATION
    Inventors: Kenta FUKUSHIMA, Hayato TAKAKURA, Naoki SHIBATA, Ryosuke SASAOKA
  • Publication number: 20240107664
    Abstract: A method for producing a wiring circuit board includes a step of preparing a substrate; a step of forming a first insulating layer on one side of the substrate in a thickness direction; a step of forming a conductive pattern on one side of the first insulating layer in the thickness direction; a step of etching the substrate to form a first metal support layer on the other side of the first insulating layer in the thickness direction; and a step of depositing a metal on the other side of the first metal support layer in the thickness direction to form a second metal support layer. The second metal support layer has a terminal support portion supporting two terminals of the conductive pattern, a wiring support portion supporting a wiring of the conductive pattern, and a second wiring support portion supporting a second wiring of the conductive pattern.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 28, 2024
    Applicant: NITTO DENKO CORPORATION
    Inventors: Kenta FUKUSHIMA, Hayato TAKAKURA, Naoki SHIBATA, Ryosuke SASAOKA
  • Patent number: 11843080
    Abstract: A semiconductor light-emitting device includes a semiconductor light-emitting element that emits ultraviolet light, a package substrate mounting the semiconductor light-emitting element, a sealing resin that seals the semiconductor light-emitting element, and a coat film further provided between a light output surface of the semiconductor light-emitting element and the sealing resin. The refractive index of the coat film and the refractive index of the sealing resin are smaller than the refractive index of a member constituting the light output surface of the semiconductor light-emitting element, and the refractive index difference between the coat film and the sealing resin is not more than 0.15.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: December 12, 2023
    Assignee: Nikkiso Co., Ltd.
    Inventors: Shuichiro Yamamoto, Tadaaki Maeda, Naoki Shibata
  • Publication number: 20230380058
    Abstract: Provided is a wiring circuit board capable of suppressing peeling of a terminal from an insulating layer. The wiring circuit board includes a base insulating layer, and a conductive pattern disposed on one surface of the base insulating layer in a thickness direction. The conductive pattern includes a wiring and a terminal. The terminal protrudes from one end edge of the wiring. The terminal includes a first terminal layer and a second terminal layer. A ratio (Y/X) of the volume Y of the wiring in a folded region with respect to the volume X of the terminal is 0.1 or more. The folded region is a region when a region of the terminal when viewed in the thickness direction is folded back toward the opposite side in a protruding direction of the terminal with the one end edge of the wiring as a starting point.
    Type: Application
    Filed: May 11, 2023
    Publication date: November 23, 2023
    Applicant: NITTO DENKO CORPORATION
    Inventors: Hideki MATSUI, Naoki SHIBATA, Ryosuke SASAOKA
  • Publication number: 20230324808
    Abstract: Embodiments provide point-of-use blending of photoresist rinse solutions for patterned photoresists. Disclosed methods and systems form different mitigation solutions for multiple different photoresists through point-of-use variable blending of a mitigation solution with de-ionized water and/or other chemistries to adjust the formulation of the solution just prior to dispense within a process chamber. For one example embodiment, different surfactant rinse solutions are used for different photoresists, such as different extreme ultraviolet photoresists. In addition, the level of reactive components, the level of nonreactive components, or both within a mitigation solution can be adjusted using this point-of-use blending to provide an adjusted mitigation solution. The ability to make point-of-use adjustments to the solution chemistry just before dispense on a microelectronic workpiece, such as a semiconductor wafer, improves interactions between the adjusted mitigation solution and the patterned photoresist.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 12, 2023
    Applicant: Tokyo Electron Limited
    Inventors: Lior Huli, Naoki Shibata
  • Patent number: 11762297
    Abstract: Embodiments provide point-of-use blending of photoresist rinse solutions for patterned photoresists. Disclosed methods and systems form different mitigation solutions for multiple different photoresists through point-of-use variable blending of a mitigation solution with deionized water and/or other chemistries to adjust the formulation of the solution just prior to dispense within a process chamber. For one example embodiment, different surfactant rinse solutions are used for different photoresists, such as different extreme ultraviolet photoresists. In addition, the level of reactive components, the level of nonreactive components, or both within a mitigation solution can be adjusted using this point-of-use blending to provide an adjusted mitigation solution. The ability to make point-of-use adjustments to the solution chemistry just before dispense on a microelectronic workpiece, such as a semiconductor wafer, improves interactions between the adjusted mitigation solution and the patterned photoresist.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: September 19, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Lior Huli, Naoki Shibata
  • Publication number: 20230284394
    Abstract: Provided is a method for producing a wiring circuit board capable of improving the dimensional accuracy of a second conductive layer. The wiring circuit board produced by the producing method includes a metal supporting layer, a first insulating layer disposed on one surface of the metal supporting layer in a thickness direction, a first conductive layer disposed on one surface of the first insulating layer in the thickness direction, a second insulating layer disposed on one surface of the first insulating layer in the thickness direction so as to cover the first conductive layer, and a second conductive layer disposed on one surface of the second insulating layer in the thickness direction. The producing method includes a step of forming the second insulating layer by bonding a film made of a photosensitive resin to one surfaces of the first insulating layer and the first conductive layer in the thickness direction.
    Type: Application
    Filed: March 1, 2023
    Publication date: September 7, 2023
    Applicant: NITTO DENKO CORPORATION
    Inventors: Naoki SHIBATA, Ryosuke SASAOKA