Patents by Inventor Naoki Shibata

Naoki Shibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020072204
    Abstract: A layer comprising cobalt (Co) is formed on a p+ layer by vapor deposition, and a layer comprising gold (Au) is formed thereon. The two layers are alloyed by a heat treatment to form a light-transmitting electrode. The light-transmitting electrode therefore has reduced contact resistance and improved light transmission properties, and gives a light-emitting pattern which is stable over a long time. Furthermore, since cobalt (Co) is an element having a large work function, satisfactory ohmic properties are obtained.
    Type: Application
    Filed: January 24, 2002
    Publication date: June 13, 2002
    Inventors: Toshiya Uemura, Naoki Shibata, Shizuyo Noiri, Masanori Murakami, Yasuo Koide, Jun Ito
  • Publication number: 20020042159
    Abstract: A GaN type semiconductor layer having a new structure is provided which incorporates a substrate having surface which is opposite to a GaN type semiconductor layer and which is made of Ti.
    Type: Application
    Filed: October 10, 2001
    Publication date: April 11, 2002
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Toshiaki Chiyo, Shizuyo Noiri, Naoki Shibata, Jun Ito
  • Publication number: 20020014629
    Abstract: An AlN layer having a surface of a texture structure is formed on a sapphire substrate. Then, a growth suppressing material layer is formed on the AlN layer so that the AlN layer is partially exposed to the outside. Then, group III nitride compound semiconductor layers are grown on the AlN layer and on the growth suppressing material layer by execution of an epitaxial lateral overgrowth method. Thus, a group III nitride compound semiconductor device is produced. An undercoat layer having convex portions each shaped like a truncated hexagonal pyramid is formed on a substrate. Group III nitride compound semiconductor layers having a device function are laminated successively on the undercoat layer.
    Type: Application
    Filed: June 21, 2001
    Publication date: February 7, 2002
    Inventors: Naoki Shibata, Toshiaki Chiyo, Masanobu Senda, Jun Ito, Hiroshi Watanabe, Shinya Asami, Shizuyo Asami
  • Patent number: 6342404
    Abstract: A group III nitride compound semiconductor device is produced according to the following manner. A separation layer made of a material which prevents group III nitride compound semiconductors from being grown thereon is formed on a substrate. Group III nitride compound semiconductors is grown on a surface of the substrate uncovered with the separation layer while keeping the uncovered substrate surface separated by the separation layer.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: January 29, 2002
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Jun Ito, Toshiaki Chiyo, Shizuyo Asami, Hiroshi Watanabe, Shinya Asami
  • Publication number: 20020004252
    Abstract: A method for manufacturing a light-emitting device which using group III nitride group semiconductors and a quantum well structure, comprising forming a well layer (e.g. an InGaN layer), forming a cap layer on the well layer, the cap layer having almost the same compositions as the well layer at a temperature similar to that at which the well layer was formed. Further, and the cap layer is formed at a crystal growth rate which is faster than the crystal growth rate of the well layer and removing the cap layer using a thermal cracking (or decomposition) process during the temperature ramp up associated with the formation of the next group III nitride compound semiconductor layer. After the cap layer is removed, the group III nitride compound semiconductor layer is formed on the exposed well layer.
    Type: Application
    Filed: May 24, 2001
    Publication date: January 10, 2002
    Inventors: Hiroshi Watanabe, Naoki Shibata
  • Publication number: 20020000643
    Abstract: An electrode pad for a Group III nitride compound semiconductor having p-type conduction includes a triple layer structure having first, second, and third metal layers, formed on an electrode layer. A protection film with a window exposing a central portion of the third metal layer is formed by etching on the third metal layer and covers the sides of the first, second, and third metal layers. The second metal layer is made of gold (Au). The first metal layer is made of an element which has ionization potential lower than gold (Au). The third metal is made of an element which has adhesiveness to the protection film stronger than that of gold (Au). Consequently, this structure of the electrode pad improves the adhesive strength between the protection layer and the third meal layer and prevents the etching of the sides of the protection film. Furthermore, the contact resistance between the semiconductor and the electrode pad is lowered and, thus, ohmic characteristic of the electrode pad is improved.
    Type: Application
    Filed: May 30, 1997
    Publication date: January 3, 2002
    Inventors: TOSHIYA UEMURA, NAOKI SHIBATA, SHIZUYO NOIRI, SHIGEMI HORIUCHI
  • Patent number: 6335217
    Abstract: A GaN type semiconductor layer having a structure is provided which incorporates a substrate having surface which is opposite to a GaN type semiconductor layer and which is made of Ti.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: January 1, 2002
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiaki Chiyo, Shizuyo Noiri, Naoki Shibata, Jun Ito
  • Publication number: 20010050376
    Abstract: A group III nitride compound semiconductor device has a substrate, a group III nitride compound semiconductor layer having a device function, and an undercoat layer formed between the substrate and the group III nitride semiconductor layer. The undercoat layer has a surface which has a texture structure, or which is trapezoid shaped in section or which is pit shaped. In addition, a reflection layer made of nitride of at least one metal selected from the group consisting of titanium, zirconium, hafnium and tantalum may be formed on a surface of the undercoat layer. Also the surface of the reflection layer is formed as a texture structure, a trapezoid shape in section or a pit shape.
    Type: Application
    Filed: June 26, 2001
    Publication date: December 13, 2001
    Applicant: TOYODA GOSEI CO., LTD
    Inventors: Naoki Shibata, Toshiaki Chiyo, Masanobu Senda, Jun Ito, Hiroshi Watanabe, Shinya Asami, Shizuyo Asami
  • Patent number: 6291840
    Abstract: A layer comprising cobalt (Co) is formed on a p+ layer by vapor deposition, and layer comprising gold (Au) is formed thereon. The two layers are alloyed by a heat treatment to form a light-transmitting electrode. The light-transmitting electrode therefore has reduced contact resistance and improved light transmission properties, and gives a light-emitting patten which is stable over a long time. Furthermore, since cobalt (Co) is an element having a large work function, satisfactory ohmic properties are obtained.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: September 18, 2001
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiya Uemura, Naoki Shibata, Shizuyo Noiri, Masanori Murakami, Yasuo Koide, Jun Ito
  • Publication number: 20010019849
    Abstract: A light-emitting semiconductor device (10) consecutively includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n+-layer (3) of high carrier (n-type) concentration, a Si-doped (Alx3Ga1-x3)y3In1-y3N n+-layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Alx2Ga1-x2)y2In1-y2N emission layer (5), and a Mg-doped (Alx1Ga1-x1)y1In1-y1N p-layer (6). The AlN layer (2) has a 500 Å thickness. The GaN n+-layer (3) has about a 2.0 &mgr;m thickness and a 2×1018/cm3 electron concentration. The n+-layer (4) has about a 2.0 &mgr;m thickness and a 2×1018/cm3 electron concentration. The emission layer (5) has about a 0.5 &mgr;m thickness. The p-layer 6 has about a 1.0 &mgr;m thickness and a 2×1017/cm3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n+-layer (4), respectively. A groove (9) electrically insulates the electrodes (7, 8).
    Type: Application
    Filed: February 15, 2001
    Publication date: September 6, 2001
    Applicant: TOTODA GOSEI CO. LTD.
    Inventors: Katsuhide Manabe, Hisaki Kato, Michinari Sassa, Shiro Yamazaki, Makoto Asai, Naoki Shibata, Masayoshi Koike
  • Publication number: 20010018226
    Abstract: A layer comprising cobalt (Co) is formed on a p+ layer by vapor deposition, and a layer comprising gold (Au) is formed thereon. The two layers are alloyed by a heat treatment to form a light-transmitting electrode. The light-transmitting electrode therefore has reduced contact resistance and improved light transmission properties, and gives a light-emitting pattern which is stable over a long time. Furthermore, since cobalt (Co) is an element having a large work function, satisfactory ohmic properties are obtained.
    Type: Application
    Filed: March 29, 2001
    Publication date: August 30, 2001
    Inventors: Toshiya Uemura, Naoki Shibata, Shizuyo Noiri, Masanori Murakami, Yasuo Koide, Jun Ito
  • Patent number: 6268866
    Abstract: A digital watermarking system capable of making a digital watermark even in an input image of few colors. An image input section inputs an object image in which a digital watermark is to be made and transforms or develops the image into digital data of the format of the system. In a texture database section, texture patterns in each of which the digital watermark is previously made are registered. And in a color conversion table section, information for coordinating original colors used in the input image with the textures is registered. An image composing section creates a watermarked image in which the original colors of the input image are replaced with the textures of the texture database as designated in the color conversion table. An image output section retains the watermarked image to be outputted from the image composing section and outputs the watermarked image.
    Type: Grant
    Filed: June 18, 1998
    Date of Patent: July 31, 2001
    Assignee: NEC Corporation
    Inventor: Naoki Shibata
  • Patent number: 6265726
    Abstract: A light-emitting semiconductor device (10) consecutively includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n+-layer (3) of high carrier (n-type) concentration, a Si-doped (Alx3Ga1−x3)y3In1−y3N n+-layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Alx2Ga1−x2)y2In1−y2N emission layer (5), and a Mg-doped (Alx1Ga1−x1)y1In1−y1N p-layer (6). The AlN layer (2) has a 500 Å thickness. The GaN n+-layer (3) has about a 2.0 &mgr;m thickness and a 2×1018/cm3 electron concentration. The n+-layer (4) has about a 2.0 &mgr;m thickness and a 2×1018/cm3 electron concentration. The emission layer (5) has about a 0.5 &mgr;m thickness. The p-layer 6 has about a 1.0 &mgr;m thickness and a 2×1017/cm3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n+-layer (4), respectively. A groove (9) electrically insulates the electrodes (7, 8).
    Type: Grant
    Filed: August 24, 1999
    Date of Patent: July 24, 2001
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Katsuhide Manabe, Hisaki Kato, Michinari Sassa, Shiro Yamazaki, Makoto Asai, Naoki Shibata, Masayoshi Koike
  • Patent number: 6191436
    Abstract: A LED has a thin highly resistive or insulative layer formed below an electrode pad in order to divert current flow from the region below an electrode pad, which region does not contribute to light emission, to another region which does. Consequently, better current efficiency is obtained. Further, diverting current flow from the region below the electrode pad where mechanical damages are expected deters deterioration of the region. Consequently, the LED lasts longer and is a better quality product.
    Type: Grant
    Filed: March 12, 1996
    Date of Patent: February 20, 2001
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Makoto Asai
  • Patent number: 6160518
    Abstract: The invention combines a closed-end loop antenna and an open-end loop antenna in a conformal antenna on the rear window glass of an automotive vehicle above the defogging heater grid. The loops are adapted to receive Digital Audio Broadcasting (DAB) signals in both L band and Band-III frequency bands with maximum sensitivity to vertically polarized signals while requiring minimal space on the window glass. The antenna uses one substantially continuous trace between a pair of antenna feedpoints to achieve low manufacturing cost.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: December 12, 2000
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Shunji Miyahara, Naoki Shibata
  • Patent number: 6121127
    Abstract: An electrode for a Group III nitride compound semiconductor having p-type conduction that has a double layer structure. The first metal electrode layer comprising, for example, nickel (Ni) and the second metal electrode layer comprising, for example, gold (Au). The Ni layer is formed on the Group III nitride compound semiconductor having p-type conduction, and the Au layer is formed on the Ni layer. Heat treatment changes or reverses the distribution of the elements Ni and Au. Namely, Au is distributed deeper into the Group III nitride compound semiconductor than is Ni. As a result, the resistivity of the electrode is lowered and its ohmic characteristics are improved as well as its adhesive strength.
    Type: Grant
    Filed: November 16, 1999
    Date of Patent: September 19, 2000
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Junichi Umezaki, Makoto Asai, Toshiya Uemura, Takahiro Kozawa, Tomohiko Mori, Takeshi Ohwaki
  • Patent number: 6103543
    Abstract: A base layer of electode made of at least a metal selected from V, Nb, and Zr, or an alloy containing such metal on an n-type GaN compound semiconductor layer. Further, a main electrode layer made of other metal is formed on the base layer. Then, an n electrode is formed by subjecting the semiconductor layer, the base layer, and the main electrode layer to a heat treatment.
    Type: Grant
    Filed: October 2, 1997
    Date of Patent: August 15, 2000
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiya Uemura, Naoki Shibata
  • Patent number: 6100545
    Abstract: A GaN type semiconductor layer having a new structure is provided which incorporates a substrate having surface which is opposite to a GaN type semiconductor layer and which is made of Ti.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: August 8, 2000
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiaki Chiyo, Shizuyo Noiri, Naoki Shibata, Jun Ito
  • Patent number: 6033927
    Abstract: A wafer is diced up to a depth of 15 .mu.m from the surface of a sapphire substrate along a dicing line set in the center of a processed region between electrodes for respective devices by using a blade having a width narrower than the width of the processed region, so that separation grooves are formed. In the present invention, the first contact layer, the second contact layer, the p layer, the light-emitting layer and the n layer are arranged in a region between a side surface of the blade and a side wall of the electrode formation region. Accordingly, stress is concentrated into an intersection line of the electrode formation region and the side wall which is erected so as to be L-shaped. Thus, cracks generated at the time of dicing are formed-toward the intersection line. As a result, the cracks never enter into the electrode formation region and, accordingly, never enter into the lower portion of the electrode.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: March 7, 2000
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Atsuo Hirano, Toshiya Uemura
  • Patent number: 6023076
    Abstract: A double-hetero structure light emitting diode using group III nitride compound semiconductor is disclosed- The diode has a first electrode connected to a first semiconductor layer and a second electrode connected to a second semiconductor layer. In one aspect of the invention, the first electrode is also connected to the second semiconductor layer. In another aspect of the invention, a resistance is disposed between the first electrode and the second semiconductor layer. In another aspect of the invention, a diode in a reverse direction and in parallel to the light emitting diode is disposed between the first and second electrodes.
    Type: Grant
    Filed: August 21, 1997
    Date of Patent: February 8, 2000
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Naoki Shibata