Patents by Inventor Naoki Shibata

Naoki Shibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6008539
    Abstract: An electrode for a Group III nitride compound semiconductor having p-type conduction that has a double layer structure. The first metal electrode layer comprising, for example, nickel (Ni) and the second metal electrode layer comprising, for example, gold (Au). The Ni layer is formed on the Group III nitride compound semiconductor having p-type conduction, and the Au layer is formed on the Ni layer. Heat treatment changes or reverses the distribution of the elements Ni and Au. Namely, Au is distributed deeper into the Group III nitride compound semiconductor than is Ni. As a result, the resistivity of the electrode is lowered and its ohmic characteristics are improved as well as its adhesive strength.
    Type: Grant
    Filed: June 14, 1996
    Date of Patent: December 28, 1999
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Junichi Umezaki, Makoto Asai, Toshiya Uemura, Takahiro Kozawa, Tomohiko Mori, Takeshi Ohwaki
  • Patent number: 6005258
    Abstract: A light-emitting semiconductor device (10) consecutively includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n.sup.+ -layer (3) of high carrier (n-type) concentration, a Si-doped (Al.sub.x3 Ga.sub.1-x3).sub.y3 In.sub.1-y3 N n.sup.+ -layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Al.sub.x2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N emission layer (5), and a Mg-doped (Al.sub.x1 Ga.sub.1-x1).sub.y1 In.sub.1-y1 N p-layer (6). The AlN layer (2)--is 500 .ANG. in thickness. The GaN N.sup.+ -layer (3) is about 2.0 .mu.m in thickness and has an electron concentration of about 2.times.10.sup.18 /cm.sup.3. The n.sup.+ -layer (4) is about 2.0 .mu.m in thickness and has an electron concentration of about 2.times.10.sup.18 /cn.sup.3. The emission layer (5) is about 0.5 .mu.m in thickness. The p-layer 6 is about 1.0 .mu.m in thickness and has a hole concentration of about 2.times.10.sup.17 /cm.sup.3. Nickel electrodes (7, 8) are connected to the p-layer (6) and n.sup.
    Type: Grant
    Filed: February 26, 1997
    Date of Patent: December 21, 1999
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Katsuhide Manabe, Hisaki Kato, Michinari Sassa, Shiro Yamazaki, Makoto Asai, Naoki Shibata, Masayoshi Koike
  • Patent number: 5862167
    Abstract: A light-emitting diode or laser diode is provided which uses a Group III nitride compound semiconductor satisfying the formula (Al.sub.x Ga.sub.1-x).sub.y In.sub.1-y N, inclusive of 0.ltoreq.x.ltoreq.1, and 0.ltoreq.y.ltoreq.1. A double hetero-junction structure is provided which sandwiches an active layer between layers having wider band gaps than the active layer. The diode has a multi-layer structure which has either a reflecting layer to reflect emission light or a reflection inhibiting layer. The emission light of the diode exits the diode in a direction perpendicular to the double hetero-junction structure. Light emitted in a direction opposite to the light outlet is reflected by the reflecting film toward the direction of the light outlet. Further, the reflection inhibiting film, disposed at or near the light outlet, helps the release of exiting light by minimizing or preventing reflection. As a result, light can be efficiently emitted by the light-generating diode.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: January 19, 1999
    Assignees: Toyoda Gosei Co., Ltd., Research Development Corporation of Japan, Isamu Akasaki, Hiroshi Amano
    Inventors: Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Junichi Umezaki, Naoki Shibata, Masayoshi Koike, Isamu Akasaki, Hiroshi Amano
  • Patent number: 5753939
    Abstract: A light-emitting semiconductor device having an improved metal electrode and semiconductor structure that lowers the driving voltage of the device. The device has a hetero p-n junction structure. This structure includes: (1) an n-layer having n-type conduction and a Group III nitride compound semiconductor satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0, and x=y=0; (2) a p-layer having p-type conduction and a Group III nitride compound semiconductor satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0, and x=y=0; and (3) an emission layer disposed between the n-layer and the p-layer. The device also has a metal electrode and a contact layer that is disposed between the p-layer and the metal electrode. The contact layer is doped with an acceptor impurity more heavily that is the p-layer. The acceptor impurity may be magnesium (Mg). The contact layer may be doped within the range of 1.times.10.sup.20 /cm.sup.3 to 1.times.10.sup.2l /cm.sup.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: May 19, 1998
    Inventors: Michinari Sassa, Naoki Shibata, Shinya Asami, Masayoshi Koike, Junichi Umezaki, Takahiro Kozawa
  • Patent number: 5700713
    Abstract: A light-emitting semiconductor device a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n.sup.+ -layer (3) of high carrier (n-type) concentration, a Si-doped (Al.sub.x2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N n.sup.+ -layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Mg doped ((Al.sub.x1 Ga.sub.1-x1).sub.y2 In.sub.1-y2 N n.sup.+ -layer (5), and a Mg doped (Al.sub.x2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N n.sup.+ -layer (6). The AlN layer (2) has a 500 .ANG. thickness. The GaN n.sup.+ -layer (3) has about a 2.0 .mu.m thickness and a 2.times.10.sup.18 /cm.sup.3 electron concentration. The n.sup.+ -layer (4) has about a 2.0 .mu.m thickness and a 2.times.10.sup.18 /cm.sup.3 electron concentration. A double i-layer structure includes the emission layer (5) and the i-layer (6). The emission layer (5) has about a 0.5 .mu.m thickness, and the i-layer (6) has about a 0.5 .mu.m thickness. Parts of the emission layer (5) and the i-layer (6) are p-type regions (50, 60).
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: December 23, 1997
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Shiro Yamazaki, Naoki Shibata, Masayoshi Koike
  • Patent number: 5652438
    Abstract: A light-emitting semiconductor device (10) consecutively has a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n.sup.+ -layer (3) of high carrier (n-type) concentration, a Si-doped (Al.sub.X2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N n.sup.+ -layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Al.sub.x1 Ga.sub.1-x1).sub.y1 In.sub.1-y1 N emission layer (5), and a Mg-doped (Al.sub.x2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N p-layer (6). The AlN buffer layer (2) has a 500 .ANG. thickness. The GaN n.sup.+ -layer (3) is about 2.0 .mu.m thick and has a 2.times.10.sup.18 /cm.sup.3 electron concentration. The n.sup.+ -layer (4) is about 2.0 .mu.m thick and has a 2.times.10.sup.18 /cm.sup.3 electron concentration. The emission layer (5) is about 0.5 .mu.m thick. The p-layer 6 is about 1.0 .mu.m thick and has a 2.times.10.sup.17 /cm.sup.3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n.sup.+ -layer (4), respectively.
    Type: Grant
    Filed: July 19, 1995
    Date of Patent: July 29, 1997
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Michinari Sassa, Makoto Tamaki, Masayoshi Koike, Naoki Shibata, Masami Yamada, Takahide Oshio
  • Patent number: 5650641
    Abstract: A light-emitting semiconductor device (100) suitable for use in multi-color flat panel displays includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n.sup.+ -layer (3) of high carrier (n-type) concentration, a Si-doped (Al.sub.x2 Ga.sub.1 -x.sub.2).sub.y2 In.sub.1-2 N n.sup.+ -layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped p-type (Al.sub.x1 Ga.sub.1-x1).sub.y1 In.sub.1-y1 N emission layer (5), and a Mg-doped (Al.sub.x2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N p-layer (6). The AlN layer (2) has a 500 .ANG. thickness. The GaN n.sup.+ -layer (3) is about a 2.0 .mu.m thick and has a 2.times.10.sup.18 /cm.sup.3 electron concentration. The n.sup.+ -layer (4) is about a 2.0 .mu.m in thickness and has a 2.times.10.sup.18 /cm.sup.3 electron concentration. The emission layer (5) is about 0.5 .mu.m thick. The p-layer 6 is about 1.0 .mu.m thick and has a 2.times.10.sup.17 /cm.sup.3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n.sup.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: July 22, 1997
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Michinari Sassa, Masayoshi Koike, Katsuhide Manabe, Norikatsu Koide, Hisaki Kato, Naoki Shibata, Makoto Asai, Shinya Asami
  • Patent number: 5260588
    Abstract: The present invention, which is directed to a light-emitting diode array for use as the light source in optical printers and other such applications, provides improved optical efficiency and a more uniform distribution of emission intensity. The light-emitting diodes are formed as reverse mesas with a mirrored sloping surface that reflects light in the direction of the light emitting surface of the diode. This improves the emission efficiency of each diode. In addition, this also increases the light output from the edge portions of light-emitting surfaces of the diodes so as to produce a more uniform distribution of light output from the light-emitting diodes.
    Type: Grant
    Filed: April 14, 1992
    Date of Patent: November 9, 1993
    Assignee: Eastman Kodak Company
    Inventors: Hirokazu Ohta, Tadao Kazuno, Naoki Shibata, Teruo Sasagawa
  • Patent number: 5162878
    Abstract: A light-emitting diode array having improved optical output efficiency and uniformity without loss of reliability or reproducibility is described. The array is formed of an n-type conductivity GaAs buffer layer on an n-type conductivity GaAs substrate, followed by 25-pair n-type conductivity Al.sub.y Ga.sub.1-y As/AlAs semiconductor multilayer mirror, a p-type conductivity Al.sub.x Ga.sub.1-x As active layer, and a p++ type conductivity GaAs contact layer. The surface of the emission region is a total reflection prevention surface with a sawtooth-shaped projection configuration. This provides a large decrease in total reflection loss of light from the emission layer, and also enables light propagating in the opposite direction to the output surface to be efficiently outputed.
    Type: Grant
    Filed: December 12, 1991
    Date of Patent: November 10, 1992
    Assignee: Eastman Kodak Company
    Inventors: Teruo Sasagawa, Naoki Shibata, Tadao Kazuno, Hirokazu Ohta
  • Patent number: 5132751
    Abstract: A light-emitting diode array in which the light-emitting surface for external output of light from the light-emitting layer is processed to give it a slope, for example, which by increasing the critical angle of the internal reflection between the active layer and the air raises the external light output efficiency.
    Type: Grant
    Filed: April 9, 1991
    Date of Patent: July 21, 1992
    Assignee: Eastman Kodak Company
    Inventors: Naoki Shibata, Teruo Sasagawa, Hirokazu Ohta, Tadao Kazuno
  • Patent number: 4312795
    Abstract: A paint composition comprising a powder paint uniformly dispersed in an aqueous solution of a water soluble carboxylated resin. Use is made of a powder paint having a mean particle size of 1-100 microns and preferably comprising a thermosetting resin as the vehicle. This paint composition contains no surfactant but, nevertheless, features high stability of the dispersion phase and can provide paint films of excellent resistance to water. This paint composition may utilize recovered waste powder paint, i.e. a mixture of differently colored powder paints, preferably with the addition of a black pigment such as carbon black.
    Type: Grant
    Filed: June 11, 1980
    Date of Patent: January 26, 1982
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Michiichi Taguchi, Kunio Funabiki, Masao Nakazima, Hisao Nunokawa, Tadashi Ikemi, Masataka Kimura, Naoki Shibata
  • Patent number: D395435
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: June 23, 1998
    Assignee: Mitsubishi Jukogyo Kabushiki Kaisha
    Inventors: Yukiteru Yoshida, Yoshio Kobayashi, Tomiya Kato, Naoki Shibata