Patents by Inventor Naoki Shibata

Naoki Shibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040183201
    Abstract: A wiring structure for semiconductor device has a wiring layer that includes copper as main component and a crystal grain promotion layer that promotes enlargement in a crystal grain of the wiring layer.
    Type: Application
    Filed: December 30, 2003
    Publication date: September 23, 2004
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Masahiro Shimada, Miki Moriyama, Masanori Murakami, Naoki Shibata
  • Publication number: 20040185643
    Abstract: A p-GaN layer 5 comprising materials such as a Group III nitride compound semiconductor is formed on a sapphire substrate 1 through MOVPE treatment, and a first metal layer 6 made of Co/Au is formed thereon. Then in a planar electron beam irradiation apparatus using plasma, electron beams are irradiated to the p-GaN layer 5 through the first metal layer 6. Accordingly, the first metal layer 6 prevents the surface of the p-GaN layer 5 from being damaged and resistivity of the p-GaN layer 5 can be lowered. Next, a second metal (Ni) layer 10 is formed on the first metal layer 6. And the first metal layer 6 is etched through the second metal layer 10 by using fluoric nitric acid. As a result, the first metal layer is almost completely removed. Then a light-transmitting p-electrode 7 made of Co/Au is formed thereon. As a result, a p-type semiconductor having decreased contact resistance and lower driving voltage can be obtained and optical transmittance factor of the p-type semiconductor improves.
    Type: Application
    Filed: May 13, 2004
    Publication date: September 23, 2004
    Inventors: Toshiaki Chiyo, Naoki Shibata
  • Publication number: 20040169186
    Abstract: A III group nitride system compound semiconductor light emitting element has a quantum well structure that includes a well layer of AlX1GaY1In1−X1−Y1N, where 0<X1, 0≦Y1 and X1+Y1<1 and a barrier layer of AlX2GaY2In1−X2−Y2N, where 0<X2, 0≦Y2 and X2+Y2<1. The Al composition (X2) of barrier layer is equal to or smaller than that (X1) of well layer.
    Type: Application
    Filed: September 17, 2003
    Publication date: September 2, 2004
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Takahiro Kozawa
  • Publication number: 20040130025
    Abstract: A GaN layer is formed on a sapphire substrate through an AlN buffer layer and doped with Mg to prepare a laminate (referred to as “GaN substrate”). A metal (Pt and Ni) electrode 50 nm thick is formed on the GaN substrate by (1) vapor deposition after the GaN substrate is heated to a temperature of 300° C. or by (2) vapor deposition while the GaN substrate is left at room temperature. (3) The electrode obtained in (2) is heated to 300° C. in a nitrogen atmosphere. The contact resistance of the electrode obtained in (1) is lower by two or three digits than that of the electrode obtained in (2) or (3). That is, the electric characteristic of the electrode obtained in (1) is improved greatly.
    Type: Application
    Filed: October 29, 2003
    Publication date: July 8, 2004
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Ippei Fujimoto, Tsutomu Sekine, Miki Moriyama, Masanori Murakami, Naoki Shibata
  • Publication number: 20040113169
    Abstract: A Group III nitride compound semiconductor light-emitting device includes a multilayer having a quantum well structure containing an InGaN well layer and an AlGaN barrier layer. The film thickness, growth rate and growth temperature of the InGaN layer as the well layer and the film thickness of the AlGaN layer as the barrier layer are controlled to be optimized to thereby improve an output of the light-emitting device.
    Type: Application
    Filed: September 23, 2003
    Publication date: June 17, 2004
    Inventors: Shinya Asami, Hiroshi Watanabe, Jun Ito, Naoki Shibata
  • Publication number: 20040115917
    Abstract: A first group III nitride compound layer, which is formed on a substrate by a method not using metal organic compounds as raw materials, is heated in an atmosphere of a mixture gas containing a hydrogen or nitrogen gas and an ammonia gas, so that the crystallinity of a second group III nitride compound semiconductor layer formed on the first group III nitride compound layer is improved. When the first group III nitride compound layer is formed on a substrate by a sputtering method, the thickness of the first group III nitride compound layer is set to be in a range of from 50 Å to 3000 Å.
    Type: Application
    Filed: December 3, 2003
    Publication date: June 17, 2004
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Jun Ito, Toshiaki Chiyo, Shizuyo Asami, Hiroshi Watanabe, Masanobu Senda, Shinya Asami
  • Patent number: 6734035
    Abstract: A method for manufacturing a light-emitting device which using group III nitride group semiconductors and a quantum well structure, comprising forming a well layer (e.g. an InGaN layer), forming a cap layer on the well layer, the cap layer having almost the same compositions as the well layer at a temperature similar to that at which the well layer was formed. Further, and the cap layer is formed at a crystal growth rate which is faster than the crystal growth rate of the well layer and removing the cap layer using a thermal cracking (or decomposition) process during the temperature ramp up associated with the formation of the next group III nitride compound semiconductor layer. After the cap layer is removed, the group III nitride compound semiconductor layer is formed on the exposed well layer.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: May 11, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hiroshi Watanabe, Naoki Shibata
  • Patent number: 6734468
    Abstract: An electrode pad for a Group III nitride compound semiconductor having p-type conduction includes a triple layer structure having first, second, and third metal layers, formed on an electrode layer. A protection film with a window exposing a central portion of the third metal layer is formed by etching on the third metal layer and covers the sides of the first, second, and third metal layers. The second metal layer is made of gold (Au). The first metal layer is made of an element which has ionization potential lower than gold (Au). The third metal is made of an element which has adhesiveness to the protection film stronger than that of gold (Au). Consequently, this structure of the electrode pad improves the adhesive strength between the protection layer and the third meal layer and prevents the etching of the sides of the protection film. Furthermore, the contact resistance between the semiconductor and the electrode pad is lowered and, thus, ohmic characteristic of the electrode pad is improved.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: May 11, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiya Uemura, Naoki Shibata, Shizuyo Noiri, Shigemi Horiuchi
  • Publication number: 20040079949
    Abstract: In the present invention, (Ti1−xAx)N [in which A is at least one kind of metal selected from the group consisting of Al, Ga, and In] is used as a metal nitride layer, so that a Group III nitride compound semiconductor layer is formed on the metal nitride layer. When a Ti layer is formed between the metal nitride layer having a sufficient thickness and a substrate and the titanium layer is removed, a Group III nitride compound semiconductor device using metal nitride as a substrate can be obtained.
    Type: Application
    Filed: July 14, 2003
    Publication date: April 29, 2004
    Inventors: Toshiaki Chiyo, Jun Ito, Naoki Shibata
  • Publication number: 20040065892
    Abstract: An electrode pad for e Group III nitride compound semiconductor having p-type conduction includes a triple layer structure having first, second, and third metal layers, formed on an electrode layer. A protection film with a window exposing a central portion of the third metal layer is formed by etching on the third metal layer and covers the sides of the first, second, and third metal layers. The second metal layer is made of gold (Au). The first metal layer is made of an element which has ionization potential lower than gold (Au). The third metal is made of an element which has adhesiveness to the protection film stronger than that of gold (Au). Consequently, this structure of the electrode pad improves the adhesive strength between the protection layer and the third meal layer and prevents the etching of the sides of the protection film. Furthermore, the contact resistance between the semiconductor and the electrode pad is lowered and, thus, ohmic characteristic of the electrode pad is improved.
    Type: Application
    Filed: September 26, 2003
    Publication date: April 8, 2004
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Toshiya Uemura, Naoki Shibata, Shizuyo Noiri, Shigemi Horiuchi
  • Publication number: 20040061115
    Abstract: According to the invention, a Group III nitride compound semiconductor light-emitting element is provided with a light-emitting layer comprising two layers of different in ratio of AlGaInN composition, and emitting light with an emission peak wavelength in an ultraviolet region and light with an emission peak wavelength in a visible region. The light-emitting element and a fluorescent material excited by light in the ultraviolet region are combined to configure a light emitting device.
    Type: Application
    Filed: July 9, 2003
    Publication date: April 1, 2004
    Inventors: Takahiro Kozawa, Naoki Shibata
  • Patent number: 6713789
    Abstract: A first group III nitride compound layer, which is formed on a substrate by a method not using metal organic compounds as raw materials, is heated in an atmosphere of a mixture gas containing a hydrogen or nitrogen gas and an ammonia gas, so that the crystallinity of a second group III nitride compound semiconductor layer formed on the first group III nitride compound layer is improved. When the first group III nitride compound layer is formed on a substrate by a sputtering method, the thickness of the first group III nitride compound layer is set to be in a range of from 50 Å to 3000 Å.
    Type: Grant
    Filed: March 1, 2000
    Date of Patent: March 30, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Jun Ito, Toshiaki Chiyo, Shizuyo Asami, Hiroshi Watanabe, Masanobu Senda, Shinya Asami
  • Publication number: 20040028096
    Abstract: In an LED, the area of contact between an ohmic electrode formed on a contact layer and the contact layer serves as an effective light-emitting area of a light-emitting layer. Therefore, while the area of contact between the ohmic electrode and the contact layer is kept small, a seat electrode is interposed so that the seat electrode is connected to a circuit wiring on a wiring board by a ball electrode being contact with the seat electrode at an area larger than the area. As a result, the size necessary for forming the ball electrode can be secured easily and the light-emitting area of the light-emitting layer in the LED can be reduced sufficiently. Accordingly, a capacitance component formed by clamping the light-emitting portion of the light-emitting layer can be reduced, so that a time constant at a leading edge of luminance and a time constant at a trailing edge of luminance can be reduced sufficiently to obtain a high speed.
    Type: Application
    Filed: July 17, 2003
    Publication date: February 12, 2004
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Masanobu Senda, Naoki Shibata
  • Publication number: 20040026701
    Abstract: An object of the present invention is to obtain greater reduction in resistance between an n-electrode and an n-type layer made of a Group III nitride compound semiconductor. According to the present invention, the n-electrode is formed with a first electrode material made of at least one member selected from the group consisting of vanadium (V), titanium (Ti), zirconium (Zr) and tungsten (W), a second electrode material made of at least one member selected from the group consisting of palladium (Pd), platinum (Pt), gold (Au), silver (Ag) and copper (Cu), and a third electrode material made of at least one member selected from the group consisting of aluminum (Al), silicon (Si) and germanium (Ge).
    Type: Application
    Filed: May 5, 2003
    Publication date: February 12, 2004
    Inventors: Shunsuke Murai, Masanori Murakami, Yasuo Koide, Naoki Shibata
  • Publication number: 20040016929
    Abstract: An object of this invention is to provide an electrode for p-type SiC which can provide improved surface morphology and less thermal damage for a semiconductor crystal layer due to formation of an electrode. In this invention, a p-type electrode is manufactured to contain at least one selected from the group consisting of nickel (Ni), cobalt (Co), palladium (Pd) and platinum (Pt).
    Type: Application
    Filed: May 5, 2003
    Publication date: January 29, 2004
    Inventors: Osamu Nakatsuka, Ryohei Konishi, Ryuichi Yasukochi, Yasuo Koide, Masanori Murakami, Naoki Shibata
  • Patent number: 6649943
    Abstract: Disclosed is a Group III nitride compound semiconductor light-emitting element formed of Group III nitride compound semiconductor layers, including a multi-layer containing light-emitting layers; a p-type semiconductor layer; and an n-type semiconductor layer, wherein the multi-layer includes a multiple quantum barrier-well layer containing quantum-barrier-formation barrier layers formed from a Group III nitride compound semiconductor and quantum-barrier-formation well layers formed from a Group III nitride compound semiconductor, the barrier layers and the well layers being laminated alternately and cyclically, and a plurality of low-energy-band-gap layers which emit light of different wavelengths; and the multiple quantum barrier-well layer is provided between the low-energy-band-gap layers.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: November 18, 2003
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Takahiro Kozawa, Kazuyoshi Tomita, Tetsu Kachi
  • Publication number: 20030205195
    Abstract: A group III nitride compound semiconductor device has a substrate and an AlN single crystal layer formed on the substrate. The AlN single crystal layer has a thickness of from 0.5 to 3 &mgr;m and has a substantially flat surface. The half-value width of an X-ray rocking curve of the AlN single crystal layer is not longer than 50 sec. In another device, a group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 &mgr;m is grown at a temperature of from 1000 to 1180° C. on a sapphire substrate having a surface nitride layer having a thickness of not larger than 300 Å.
    Type: Application
    Filed: April 24, 2003
    Publication date: November 6, 2003
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Toshiaki Chiyo, Naoki Shibata, Masanobu Senda, Jun Ito, Shizuyo Asami, Shinya Asami, Hiroshi Watanabe
  • Publication number: 20030189218
    Abstract: In a group III nitride compound semiconductor light-emitting device, a light-emitting layer having a portion where an InGaN layer is interposed between AlGaN layers on both sides thereof is employed. By controlling the thickness, growth rate and growth temperature of InGaN layer which is a well layer and the thickness of AlGaN layer which is a barrier layer so that they are optimized, the output of the light-emitting device is enhanced.
    Type: Application
    Filed: January 2, 2003
    Publication date: October 9, 2003
    Inventors: Hiroshi Watanabe, Jun Ito, Shinya Asami, Naoki Shibata
  • Publication number: 20030177980
    Abstract: To lower the electrical resistance of a p-type semiconductor or the operation voltage of a light-emitting/light-receiving semiconductor device. An ion-plasma-type electron-beam irradiation apparatus 100 generates wide-area-radiation electron beams. The thus-generated electron beams are radiated to the outside through a thin metallic plate 108 formed on the outer surface of a beam extraction window 107. A p-type semiconductor is disposed below the beam extraction window 107 such that the p-type semiconductor is disposed about 20 mm away from the electron extraction window so as to be almost parallel to the metallic plate 108. When the surface of the p-type semiconductor is irradiated with electron beams by use of this apparatus, the electrical resistance of the p-type semiconductor can be effectively lowered within a short period of time; i.e., within about three minutes, which is considerably shorter than the time required in the case where a conventional electron-beam irradiation apparatus is employed.
    Type: Application
    Filed: February 24, 2003
    Publication date: September 25, 2003
    Inventors: Toshiaki Chiyo, Naoki Shibata
  • Patent number: 6623998
    Abstract: A method of manufacturing a group III nitride compound semiconductor device, includes providing a substrate, forming a group III nitride compound semiconductor layer having a device function, and forming an undercoat layer between the substrate and the group III nitride semiconductor layer, the undercoat layer having a surface of a peak and trough structure.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: September 23, 2003
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Toshiaki Chiyo, Masanobu Senda, Jun Ito, Hiroshi Watanabe, Shinya Asami, Shizuyo Asami