Patents by Inventor Naoki Shibata

Naoki Shibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050224834
    Abstract: A light-emitting semiconductor device (10) consecutively includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n+-layer (3) of high carrier (n-type) concentration, a Si-doped (Alx3Ga1-x3)y3In1-y3N n+-layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Alx2Ga1-x2)y2In1-y2N emission layer (5), and a Mg-doped (Alx1Ga1-x1)y1In1-y1N p-layer (6). The AlN layer (2) has a 500 ? thickness. The GaN n+-layer (3) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The n+-layer (4) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The emission layer (5) has about a 0.5 ?m thickness. The p-layer 6 has about a 1.0 ?m thickness and a 2×1017/cm3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n+-layer (4), respectively. A groove (9) electrically insulates the electrodes (7, 8).
    Type: Application
    Filed: June 3, 2005
    Publication date: October 13, 2005
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Katsuhide Manabe, Hisaki Kato, Michinari Sassa, Shiro Yamazaki, Makoto Asai, Naoki Shibata, Masayoshi Koike
  • Patent number: 6943128
    Abstract: To lower the electrical resistance of a p-type semiconductor or the operation voltage of a light-emitting/light-receiving semiconductor device. An ion-plasma-type electron-beam irradiation apparatus 100 generates wide-area-radiation electron beams. The thus-generated electron beams are radiated to the outside through a thin metallic plate 108 formed on the outer surface of a beam extraction window 107. A p-type semiconductor is disposed below the beam extraction window 107 such that the p-type semiconductor is disposed about 20 mm away from the electron extraction window so as to be almost parallel to the metallic plate 108. When the surface of the p-type semiconductor is irradiated with electron beams by use of this apparatus, the electrical resistance of the p-type semiconductor can be effectively lowered within a short period of time; i.e., within about three minutes, which is considerably shorter than the time required in the case where a conventional electron-beam irradiation apparatus is employed.
    Type: Grant
    Filed: August 22, 2001
    Date of Patent: September 13, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiaki Chiyo, Naoki Shibata
  • Patent number: 6943376
    Abstract: An object of this invention is to provide an electrode for p-type SiC which can provide improved surface morphology and less thermal damage for a semiconductor crystal layer due to formation of an electrode. In this invention, a p-type electrode is manufactured to contain at least one selected from the group consisting of nickel (Ni), cobalt (Co), palladium (Pd) and platinum (Pt).
    Type: Grant
    Filed: September 2, 2002
    Date of Patent: September 13, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Osamu Nakatsuka, Ryohei Konishi, Ryuichi Yasukochi, Yasuo Koide, Masanori Murakami, Naoki Shibata
  • Patent number: 6939733
    Abstract: A first group III nitride compound layer, which is formed on a substrate by a method not using metal organic compounds as raw materials, is heated in an atmosphere of a mixture gas containing a hydrogen or nitrogen gas and an ammonia gas, so that the crystallinity of a second group III nitride compound semiconductor layer formed on the first group III nitride compound layer is improved. When the first group III nitride compound layer is formed on a substrate by a sputtering method, the thickness of the first group III nitride compound layer is set to be in a range of from 50 ? to 3000 ?.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: September 6, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Jun Ito, Toshiaki Chiyo, Shizuyo Asami, Hiroshi Watanabe, Masanobu Senda, Shinya Asami
  • Patent number: 6933169
    Abstract: A LED has a thin highly resistive or insulative layer formed below an electrode pad in order to divert current flow from the region below an electrode pad, which region does not contribute to light emission, to another region which does. Consequently, better current efficiency is obtained. Further, diverting current flow from the region below the electrode pad where mechanical damages are expected deters deterioration of the region. Consequently, the LED lasts longer and is a better quality product.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: August 23, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Makoto Asai
  • Patent number: 6925100
    Abstract: In an LED, the area of contact between an ohmic electrode formed on a contact layer and the contact layer serves as an effective light-emitting area of a light-emitting layer. Therefore, while the area of contact between the ohmic electrode and the contact layer is kept small, a seat electrode is interposed so that the seat electrode is connected to a circuit wiring on a wiring board by a ball electrode being contact with the seat electrode at an area larger than the area. As a result, the size necessary for forming the ball electrode can be secured easily and the light-emitting area of the light-emitting layer in the LED can be reduced sufficiently. Accordingly, a capacitance component formed by clamping the light-emitting portion of the light-emitting layer can be reduced, so that a time constant at a leading edge of luminance and a time constant at a trailing edge of luminance can be reduced sufficiently to obtain a high speed.
    Type: Grant
    Filed: July 17, 2003
    Date of Patent: August 2, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masanobu Senda, Naoki Shibata
  • Patent number: 6921923
    Abstract: An InGaN layer is formed on an undercoat layer of the same composition as the InGaN layer. The composition of the undercoat layer may be changed continuously or stepwise.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: July 26, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Naoki Shibata
  • Patent number: 6918961
    Abstract: A group III nitride compound semiconductor device has a substrate and an AlN single crystal layer formed on the substrate. The AlN single crystal layer has a thickness of from 0.5 to 3 ?m and has a substantially flat surface. The half-value width of an X-ray rocking curve of the AlN single crystal layer is not longer than 50 sec. In another device, a group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 ?m is grown at a temperature of from 1000 to 1180° C. on a sapphire substrate having a surface nitride layer having a thickness of not larger than 300 ?.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: July 19, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiaki Chiyo, Naoki Shibata, Masanobu Senda, Jun Ito, Shizuyo Asami, Shinya Asami, Hiroshi Watanabe
  • Publication number: 20050118825
    Abstract: A method including the steps of: modifying at least one part of a sapphire substrate by dry etching to thereby form any one of a dot shape, a stripe shape, a lattice shape, etc. as an island shape on the sapphire substrate; forming an AlN buffer layer on the sapphire substrate; and epitaxially growing a desired Group III nitride compound semiconductor vertically and laterally so that the AlN layer formed on a modified portion of the surface of the sapphire substrate is covered with the desirably Group III nitride compound semiconductor without any gap while the AlN layer formed on a non-modified portion of the surface of the sapphire substrate is used as a seed, wherein the AlN buffer layer is formed by means of reactive sputtering with Al as a target in an nitrogen atmosphere.
    Type: Application
    Filed: February 24, 2003
    Publication date: June 2, 2005
    Inventors: Kazuki Nishijima, Masanobu Senda, Toshiaki Chiyo, Jun Ito, Naoki Shibata, Toshimasa Hayashi
  • Patent number: 6897139
    Abstract: A titanium layer and a titanium nitride layer are successively laminated on a substrate and a group III nitride compound semiconductor layer is further formed thereon. When the titanium layer is removed in the condition that a sufficient film thickness is given to the titanium nitride layer, a device having the titanium nitride layer as a substrate is obtained.
    Type: Grant
    Filed: July 18, 2001
    Date of Patent: May 24, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Masanobu Senda
  • Patent number: 6891203
    Abstract: According to the invention, a Group III nitride compound semiconductor light-emitting element is provided with a light-emitting layer comprising two layers of different in ratio of AlGaInN composition, and emitting light with an emission peak wavelength in an ultraviolet region and light with an emission peak wavelength in a visible region. The light-emitting element and a fluorescent material excited by light in the ultraviolet region are combined to configure a light emitting device.
    Type: Grant
    Filed: January 4, 2002
    Date of Patent: May 10, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Takahiro Kozawa, Naoki Shibata
  • Patent number: 6875629
    Abstract: A separator layer of Ti is formed on an auxiliary substrate of sapphire or the like. An undercoat layer of TiN is formed on the separator layer. The undercoat layer is provided so that a Group III nitride compound semiconductor layer can be grown with good crystallinity on the undercoat layer. TiN is sprayed on the undercoat layer to form a thermal spray depositing layer. Then, the separator layer is chemically etched to reveal the undercoat layer. Then, a Group III nitride compound semiconductor layer is grown on a surface of the undercoat layer.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: April 5, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masanobu Senda, Naoki Shibata, Jun Ito, Toshiaki Chiyo
  • Patent number: 6872965
    Abstract: An undercoat layer inclusive of a metal nitride layer is formed on a substrate. Group III nitride compound semiconductor layers are formed on the undercoat layer continuously.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: March 29, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Jun Ito, Toshiaki Chiyo, Naoki Shibata, Hiroshi Watanabe, Shizuyo Asami, Shinya Asami
  • Patent number: 6864502
    Abstract: A III group nitride system compound semiconductor light emitting element has a quantum well structure that includes a well layer of AlX1GaY1In1-X1-Y1N, where 0<X1, 0?Y1 and X1+Y1<1 and a barrier layer of AlX2GaY2In1-X2-Y2N, where 0<X2, 0?Y2 and X2+Y2<1. The Al composition (X2) of barrier layer is equal to or smaller than that (X1) of well layer.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: March 8, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Takahiro Kozawa
  • Patent number: 6841808
    Abstract: An AlN layer having a surface of a texture structure is formed on a sapphire substrate. Then, a growth suppressing material layer is formed on the AlN layer so that the AlN layer is partially exposed to the outside. Then, group III nitride compound semiconductor layers are grown on the AlN layer and on the growth suppressing material layer by execution of an epitaxial lateral overgrowth method. Thus, a group III nitride compound semiconductor device is produced. An undercoat layer having convex portions each shaped like a truncated hexagonal pyramid is formed on a substrate. Group III nitride compound semiconductor layers having a device function are laminated successively on the undercoat layer.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: January 11, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Toshiaki Chiyo, Masanobu Senda, Jun Ito, Hiroshi Watanabe, Shinya Asami, Shizuyo Asami
  • Patent number: 6838706
    Abstract: In a group III nitride compound semiconductor light-emitting device, a light-emitting layer having a portion where an InGaN layer is interposed between AlGaN layers on both sides thereof is employed. By controlling the thickness, growth rate and growth temperature of InGaN layer which is a well layer and the thickness of AlGaN layer which is a barrier layer so that they are optimized, the output of the light-emitting device is enhanced.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: January 4, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hiroshi Watanabe, Jun Ito, Shinya Asami, Naoki Shibata
  • Patent number: 6830949
    Abstract: A preferred condition for forming a Group III nitride compound semiconductor layer on a substrate by a sputtering method is proposed. When a first Group III nitride compound semiconductor layer is formed on a substrate by a sputtering method, an initial voltage of a sputtering apparatus is selected to be not higher than 110% of a sputtering voltage.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: December 14, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masanobu Senda, Jun Ito, Toshiaki Chiyo, Naoki Shibata, Shizuyo Asami
  • Publication number: 20040222499
    Abstract: An AlN buffer layer 2; a silicon (Si)-doped GaN high-carrier-concentration n+ layer 3; an Si-doped n-type Al0.07Ga0.93N n-cladding layer 4; an Si-doped n-type GaN n-guide layer 5; an active layer 6 having a multiple quantum well (MQW) structure, and including a Ga0.9In0.1N well layer 61 (thickness: about 2 nm) and a Ga0.97In0.03N barrier layer 62 (thickness: about 4 nm), the layers 61 and 62 being laminated alternately; an Mg-doped GaN p-guide layer 7; an Mg-doped Al0.07Ga0.93N p-cladding layer 8; and an Mg-doped GaN p-contact layer 9 are successively formed on a sapphire substrate. A p-electrode 10 is formed of a film of titanium nitride (TiN) or tantalum nitride (TaN) (thickness: 50 nm). The contact resistance of this electrode is reduced through heat treatment.
    Type: Application
    Filed: June 4, 2004
    Publication date: November 11, 2004
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Toshiya Uemura, Makoto Asai, Yasuo Koide, Masanori Murakami
  • Publication number: 20040209390
    Abstract: A separator layer of Ti is formed on an auxiliary substrate of sapphire or the like. An undercoat layer of TiN is formed on the separator layer. The undercoat layer is provided so that a Group III nitride compound semiconductor layer can be grown with good crystallinity on the undercoat layer. TiN is sprayed on the undercoat layer to form a thermal spray depositing layer. Then, the separator layer is chemically etched to reveal the undercoat layer. Then, a Group III nitride compound semiconductor layer is grown on a surface of the undercoat layer.
    Type: Application
    Filed: December 4, 2003
    Publication date: October 21, 2004
    Inventors: Masanobu Senda, Naoki Shibata, Jun Ito, Toshiaki Chiyo
  • Patent number: 6806571
    Abstract: An AlN buffer layer 2; a silicon (Si)-doped GaN high-carrier-concentration n+ layer 3; an Si-doped n-type Al0.07Ga0.93N n-cladding layer 4; an Si-doped n-type GaN n-guide layer 5; an active layer 6 having a multiple quantum well (MQW) structure, and including a Ga0.9In0.1N well layer 61 (thickness: about 2 nm) and a Ga0.97In0.03N barrier layer 62 (thickness: about 4 nm), the layers 61 and 62 being laminated alternately; an Mg-doped GaN p-guide layer 7; an Mg-doped Al0.07Ga0.93N p-cladding layer 8; and an Mg-doped GaN p-contact layer 9 are successively formed on a sapphire substrate. A p-electrode 10 is formed of a film of titanium nitride (TiN) or tantalum nitride (TaN) (thickness: 50 nm). The contact resistance of this electrode is reduced through heat treatment.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: October 19, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Toshiya Uemura, Makoto Asai, Yasuo Koide, Masanori Murakami