Abstract: A semiconductor device with a transistor having a first impurity region, a second impurity region, and a gate electrode formed on a semiconductor substrate. The semiconductor device also includes a first insulating film covering the transistor, and a capacitor formed on the first insulating film. The capacitor includes a dielectric film formed of either ferroelectric material or high dielectric material, and an upper electrode and a lower electrode positioned to put the dielectric film therebetween. A second insulating film is formed on the capacitor, and a wiring layer is formed on the second insulating film. A nitride film covers the wiring layer and a first silicon oxide film formed on the nitride film includes nitrogen at least at the surface thereof.

Abstract: There are provided the steps of forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into the contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.

Abstract: The semiconductor device comprises an impurity diffusion layer formed on a semiconductor substrate, an insulating film for covering the impurity diffusion layer, a capacitor formed on the insulating film and consisting of a lower electrode, an oxide dielectric film, and an upper electrode, an interlayer insulating film for covering the capacitor, two opening portions formed in the interlayer insulating film to expose the impurity diffusion layer and the upper electrode, a local interconnection formed in two opening portions, and on the interlayer insulating film in a range containing at least a region where the upper electrode contacts the oxide dielectric film, and another interlayer insulating films for covering the local interconnection.