Patents by Inventor Ning Chen

Ning Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210171529
    Abstract: The present disclosure provides compounds useful for the inhibition of Delta-5 Desaturase (“D5D”). The compounds have a general Formula 1: wherein the variables of Formula I are defined herein. This disclosure also provides pharmaceutical compositions comprising the compounds, uses of the compounds, and compositions for treatment of, for example, a metabolic or cardiovascular disorder. Further, the disclosure provides intermediates useful in the synthesis of compounds of Formula I.
    Type: Application
    Filed: November 24, 2020
    Publication date: June 10, 2021
    Inventors: Jennifer R. ALLEN, Albert AMEGADZIE, Matthew P. BOURBEAU, Ning CHEN, Clifford GOODMAN, Giulia LATTANZI, Iain LINGARD, Qingyian LIU, Jonathan D. LOW, Vu Van MA, Ana E. MINATTI, Alfonso POZZAN, Corey REEVES, Aaron C. SIEGMUND, Sabrina TASSINI, Federica TONELLI, Mary WALTON
  • Publication number: 20210166978
    Abstract: A method for manufacturing a semiconductor device, includes: forming a shallow trench isolation structure surrounding a first semiconductor fin and a second semiconductor fin; forming a dummy gate structure across the first and second semiconductor fins; forming a first flowable dielectric layer over the first and second semiconductor fins; curing the first flowable dielectric layer at a first temperature; removing a first portion of the cured first flowable dielectric layer from above the second semiconductor fin; after removing the first portion of the cured first flowable dielectric layer, forming a second flowable dielectric layer over the second semiconductor fin; curing the second flowable dielectric layer at a second temperature different from the first temperature; and replacing the dummy gate structure with a metal gate structure.
    Type: Application
    Filed: November 29, 2019
    Publication date: June 3, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Bwo-Ning CHEN, Xu-Sheng WU, Chang-Miao LIU
  • Patent number: 11026178
    Abstract: A technique of operating a wireless communication system includes determining respective geometries of multiple subscriber stations, which include a first subscriber station and a second subscriber station, with respect to a serving base station. Respective channel sounding bandwidths for sounding the channel between the multiple subscriber stations and the serving base station are then scheduled, based on the respective geometries. The respective channel sounding bandwidths include a first channel sounding bandwidth (associated with the first subscriber station) and a second channel sounding bandwidth (associated with the second subscriber station). The first channel sounding bandwidth is greater than or equal to the second channel sounding bandwidth and the first subscriber station has a lower geometry than the second subscriber station.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: June 1, 2021
    Assignee: Apple Inc.
    Inventors: James W. McCoy, Ning Chen
  • Patent number: 11021493
    Abstract: The present disclosure provides a class of compounds useful for the modulation of beta-secretase enzyme (BACE) activity. The compounds have a general Formula I: wherein variables A, X, R2, R2?, R3, R4, R5, R6, and R7 of Formula I are defined herein. This disclosure also provides pharmaceutical compositions comprising the compounds, and uses of the compounds and compositions for treatment of disorders and/or conditions related to A? plaque formation and deposition, resulting from the biological activity of BACE. Such BACE mediated disorders include, for example, Alzheimer's Disease, cognitive deficits, cognitive impairments, and other central nervous system conditions.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: June 1, 2021
    Assignee: Amgen Inc.
    Inventors: Jennifer R. Allen, Matthew P. Bourbeau, James A. Brown, Ning Chen, Michael J. Frohn, Zice Fu, Longbin Liu, Qingyian Liu, Liping H. Pettus, Wenyuan Qian, Corey Reeves, Aaron C. Siegmund
  • Publication number: 20210151434
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a semiconductor layer formed over a substrate. The semiconductor device further includes an isolation region covering the semiconductor layer and nanostructures formed over the semiconductor layer. The semiconductor layer further includes a gate stack wrapping around the nanostructures. In addition, the isolation region is interposed between the semiconductor layer and the gate stack.
    Type: Application
    Filed: January 4, 2021
    Publication date: May 20, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Winnie Victoria Wei-Ning CHEN, Meng-Hsuan HSIAO, Tung-Ying LEE, Pang-Yen TSAI, Yasutoshi OKUNO
  • Publication number: 20210131866
    Abstract: A light sensor with high linearity is provided. A photoelectric component converts light energy into a photocurrent to a first capacitor. An error amplifier has a first amplification input terminal and a second amplification input terminal, which are respectively connected to a reference voltage source and a first terminal of a first transistor. A first terminal of a second transistor is connected to the second amplification input terminal. A second terminal of the first transistor is connected to the first capacitor. An output terminal of the error amplifier is connected to a second terminal of the second transistor. A first comparator compares a voltage of the first capacitor with a lowest one of a modulated voltage and a reference voltage to generate a first comparing signal. A counter circuit performs counting according to the first comparing signal.
    Type: Application
    Filed: February 10, 2020
    Publication date: May 6, 2021
    Inventor: CHIH-NING CHEN
  • Patent number: 10996790
    Abstract: A touch system includes a touch panel; an active pen configured to generate a signal; and a touch controller electrically connected to the touch panel and configured to detect the signal. When the touch controller supports at least two protocols, a protocol of the touch controller is automatically switched to one of the at least two protocols. The active pen automatically detects the one of the at least two protocols, and a protocol of the active pen is switched to the one of the at least two protocols.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: May 4, 2021
    Assignee: Silicon Integrated Systems Corp.
    Inventors: Han-Ning Chen, Shih-Chan Huang, Chien-Yu Chiang, Kai-Chun Chuang, Chih-Sheng Chou
  • Publication number: 20210119287
    Abstract: Disclosed are a secondary battery, a battery module and an electric vehicle. The battery module includes a plurality of secondary batteries arranged in sequence. The secondary battery includes an electrode assembly, a housing and a top cover assembly. The electrode assembly is accommodated in an accommodating chamber of the housing. The electrode assembly includes a plurality of electrode units, the plurality of electrode units being stacked in an axial direction of the accommodating chamber. The top cover assembly includes a top cover plate and an insulating member arranged on an inner side of the top cover plate, the top cover plate being connected to the housing, the insulating member being located on a side of the electrode assembly in the axial direction. A first buffer gap is provided between the insulating member and the top cover plate.
    Type: Application
    Filed: December 30, 2020
    Publication date: April 22, 2021
    Inventors: Dongyang SHI, Zhenhua LI, Ning CHEN, Rui YANG, Haizu JIN, Fei HU
  • Publication number: 20210119297
    Abstract: Disclosed are a secondary battery, a battery module and an electric vehicle. The secondary battery includes an electrode assembly, a housing and a top cover assembly. The housing has an accommodating chamber, the accommodating chamber having an opening, and the electrode assembly being accommodated in the accommodating chamber. The electrode assembly includes a plurality of electrode units, the plurality of electrode units being stacked in an axial direction of the accommodating chamber. The top cover assembly includes a top cover plate, a first electrode terminal and a second electrode terminal, the top cover plate being connected to the housing and located on a side of the electrode assembly in the axial direction, and the first electrode terminal and the second electrode terminal both protruding from the top cover plate and being electrically connected to the electrode assembly.
    Type: Application
    Filed: December 28, 2020
    Publication date: April 22, 2021
    Inventors: Dongyang SHI, Zhenhua LI, Haizu JIN, Ning CHEN, Fei HU, Yuanbao CHEN, Rui YANG
  • Patent number: 10975381
    Abstract: Stevia varieties with high a content of RebD, a high content of RebM, and a high content of RebD and RebM containing various SNP markers and UGT isoforms, are disclosed. Methods of screening for the SNPs are also disclosed as well as for using the SNPs in marker assisted breeding. Further provided are methods for introgressing the disclosed SNPs associated with high RebD and high RebM into stevia plants by selecting plants comprising for one or more SNPs and breeding with such plants to confer such desirable agronomic phenotypes to plant progeny.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: April 13, 2021
    Assignee: PureCircle SDN BHD
    Inventors: Avetik Markosyan, Seong Siang Ong, Yeen Yee Wong, Yu Cheng Bu, Jian Ning Chen
  • Publication number: 20210104795
    Abstract: A secondary battery and a battery unit is provided. The secondary battery includes: a housing including an accommodating hole with an opening; a top cover assembly connected to the housing in a sealed manner to cover and close the opening; an electrode assembly arranged in the accommodating hole, wherein the top cover assembly is spaced apart from the electrode assembly to form a first buffer gap for buffering the amount of expansion deformation of the electrode assembly in the axial direction. When the secondary battery expands, the first buffer gap can absorb the amount of expansion deformation to prevent the top cover assembly from being disconnected from the housing due to excessive stress, so as to reduce the possibility of failure of the secondary battery due to damage of the overall structure, thereby ensuring the structural integrity and the safety of the secondary battery.
    Type: Application
    Filed: December 17, 2020
    Publication date: April 8, 2021
    Inventors: Haizu JIN, Dongyang SHI, Zhenhua LI, Fei HU, Ning CHEN
  • Publication number: 20210105659
    Abstract: A network device receives, from a congestion controller, traffic policy information associated with a data stream between a sender and a receiver, where the traffic policy information includes a maximum round trip delay time (RTT) and a maximum throughput rate (Rate). The network device obtains a receiver advertised window size (RWND) for the receiver for the data stream. The network device modifies the RWND based on the RTT and the Rate to produce a modified receiver window size (RWND?) and sends the RWND? to the sender for use in controlling congestion on the data stream between the sender and the receiver.
    Type: Application
    Filed: October 4, 2019
    Publication date: April 8, 2021
    Inventors: Feng Li, Haim S. Ner, Parry Cornell Booker, Ning Chen
  • Publication number: 20210098604
    Abstract: Methods of forming a semiconductor device are provided. A method according to the present disclosure includes forming, over a workpiece, a dummy gate stack comprising a first semiconductor material, depositing a first dielectric layer over the dummy gate stack using a first process, implanting the workpiece with a second semiconductor material different from the first semiconductor material, annealing the dummy gate stack after the implanting, and replacing the dummy gate stack with a metal gate stack.
    Type: Application
    Filed: July 17, 2020
    Publication date: April 1, 2021
    Inventors: Shih-Hao Lin, Jui-Lin Chen, Hsin-Wen Su, Kian-Long Lim, Bwo-Ning Chen, Chih-Hsuan Chen
  • Publication number: 20210096986
    Abstract: A processing device in a memory sub-system maintains a mapping data structure to track data movements from a plurality of data management units associated with a media management operation on a memory device. The processing device further uses a first indicator and a second indicator of a plurality of indicators to indicate which data of data management units of a source group of data management units have been copied to a destination group of data management units during the media management operation. Data located in data management units preceding the first indicator have been copied to data management units of the destination group of data management units. Data located in data management units associated with the first indicator and the second indicator or between the first indicator and the second indicator are either copied to data management units of the destination group of data management units or remain located in data management units of the source group of data management units.
    Type: Application
    Filed: December 9, 2020
    Publication date: April 1, 2021
    Inventors: Ning Chen, Jiangli Zhu, Ying Yu Tai
  • Publication number: 20210098603
    Abstract: A semiconductor structure includes source/drain (S/D) features disposed over a semiconductor substrate, a metal gate stack disposed between the S/D features, where the metal gate stack traverses a channel region between the S/D features, gate spacers disposed on sidewalls of the metal gate stack, and an etch-stop layer (ESL) disposed over the gate spacers and the S/D features. The semiconductor structure further includes an oxide liner disposed on the ESL, where the oxide liner includes silicon oxide and silicon dioxide, and an interlayer dielectric (ILD) layer disposed on the oxide liner, where composition of the ILD layer is different from composition of the oxide liner.
    Type: Application
    Filed: March 16, 2020
    Publication date: April 1, 2021
    Inventors: Bwo-Ning Chen, Xusheng Wu, Chang-Miao Liu, Shih-Hao Lin
  • Publication number: 20210089218
    Abstract: Data is copied, to a first group of data blocks in a first plurality of groups of unmapped data blocks, from a second group of data blocks in a second plurality of groups of mapped data blocks. Upon copying data to the first group of data blocks from the second group of data blocks, the first group of data blocks is included in the second plurality of groups of mapped data blocks. Upon including the first group of data blocks in the second plurality of groups of mapped data blocks, a wear leveling operation is performed on the first group of data blocks, wherein performing the wear leveling operation comprises determining a base address of the first group of data blocks, the base address indicating a location at which the first group of data blocks begins. A request to access subsequent data at a logical address associated with a data block included in the first group of data blocks is received.
    Type: Application
    Filed: December 7, 2020
    Publication date: March 25, 2021
    Inventors: Fangfang Zhu, Jiangli Zhu, Ning Chen, Ying Yu Tai
  • Publication number: 20210080535
    Abstract: Disclosed are methods and systems for a WLAN device operating on DFS channels to calibrate the PRI as well as delays between partial pulses of received radar pulses that are impaired due to channel and filtering effects. The calibrated PRI may approximate the PRI of the transmitted pulses. The calibrated delay between the partial pulses estimates the interval between two partial pulses that originally belong to the same transmitted pulse. Using the calibrated PRI and the calibrated delay between partial pulses, the WLAN device may reconstruct the original pulses from received impaired pulses even when the impaired pulses are delayed and partial pulses of the original pulses. The WLAN device may use the calibrated results to correct the shortened PW and varying PRI of the impaired pulses to restore the partial pulses to their full PW with a relatively uniform PRI, increasing the probability of detecting the radar signals.
    Type: Application
    Filed: June 9, 2020
    Publication date: March 18, 2021
    Applicant: Cypress Semiconductor Corporation
    Inventors: Chih-Ning Chen, Chung-Yen Huang, Wen-Tong Kuo
  • Patent number: 10947223
    Abstract: The present disclosure provides a class of compounds useful for the modulation of beta-secretase enzyme (BACE) activity. The compounds have a general Formula I: (insert Formula I structure) wherein variables W, X, Y, R2, R2?, R3, R4, R5, R6, and R7 of Formula I are defined herein. This disclosure also provides pharmaceutical compositions comprising the compounds, and uses of the compounds and compositions for treatment of disorders and/or conditions related to beta amyloid (A?) plaque formation and deposition, resulting from the biological activity of BACE. Such BACE mediated disorders include, for example, Alzheimer's Disease, cognitive deficits, cognitive impairments, and other central nervous system conditions.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: March 16, 2021
    Assignee: Amgen Inc.
    Inventors: Jennifer R. Allen, Matthew P. Bourbeau, Ning Chen, Michael J. Frohn, Paul E. Harrington, Qingyian Liu, Corey Reeves
  • Patent number: 10948568
    Abstract: Disclosed are methods and systems for a WLAN device operating on DFS channels to calibrate the PRI as well as delays between partial pulses of received radar pulses that are impaired due to channel and filtering effects. The calibrated PRI may approximate the PRI of the transmitted pulses. The calibrated delay between the partial pulses estimates the interval between two partial pulses that originally belong to the same transmitted pulse. Using the calibrated PRI and the calibrated delay between partial pulses, the WLAN device may reconstruct the original pulses from received impaired pulses even when the impaired pulses are delayed and partial pulses of the original pulses. The WLAN device may use the calibrated results to correct the shortened PW and varying PRI of the impaired pulses to restore the partial pulses to their full PW with a relatively uniform PRI, increasing the probability of detecting the radar signals.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: March 16, 2021
    Assignee: Cypress Semiconductor Corporation
    Inventors: Chih-Ning Chen, Chung-Yen Huang, Wen-Tong Kuo
  • Publication number: 20210073068
    Abstract: A read operation to retrieve data stored at a memory device is performed. Whether the data retrieved from the memory device includes an error that is not correctable is determined. Responsive to determining that the data retrieved from the memory device comprises the error that is not correctable, a buffer in a data path along which a write operation was performed to write the data at the memory device is searched for the data.
    Type: Application
    Filed: November 20, 2020
    Publication date: March 11, 2021
    Inventors: Wei Wang, Jiangli Zhu, Ying Yu Tai, Ning Chen, Zhengang Chen, Cheng Yuan Wu