Abstract: A method of semiconductor fabrication includes positioning a substrate on a susceptor in a chamber and growing an epitaxial feature on the substrate. The growing includes providing UV radiation to a first region of a surface of the substrate and while providing the UV radiation, growing a first portion of the epitaxial feature on the first region of the surface while concurrently growing a second portion of the epitaxial feature on a second region of the surface of the substrate. The first portion of the epitaxial feature can be greater in thickness than the second portion of the epitaxial feature.

Abstract: Systems and methods for pacing data transmission are described. An illustrative method includes transmitting, by a network device, a data stream at a pacing rate to a user equipment (UE) device. The method further includes accessing a metric of a radio access network (RAN) to which the UE device is connected, the metric associated with the UE device. The method further includes adjusting, based on the metric, the pacing rate at which the data stream is transmitted to the UE device.

Abstract: Disclosed are a secondary battery, a battery module and an electric vehicle. The battery module includes a plurality of secondary batteries arranged in sequence. The secondary battery includes an electrode assembly, a housing and a top cover assembly. The electrode assembly is accommodated in an accommodating chamber of the housing. The electrode assembly includes a plurality of electrode units, the plurality of electrode units being stacked in an axial direction of the accommodating chamber. The top cover assembly includes a top cover plate and an insulating member arranged on an inner side of the top cover plate, the top cover plate being connected to the housing, the insulating member being located on a side of the electrode assembly in the axial direction. A first buffer gap is provided between the insulating member and the top cover plate.

Abstract: A network device receives, from a congestion controller, traffic policy information associated with a data stream between a sender and a receiver, where the traffic policy information includes a maximum round trip delay time (RTT) and a maximum throughput rate (Rate). The network device obtains a receiver advertised window size (RWND) for the receiver for the data stream. The network device modifies the RWND based on the RTT and the Rate to produce a modified receiver window size (RWND?) and sends the RWND? to the sender for use in controlling congestion on the data stream between the sender and the receiver.

Abstract: The disclosure relates to a secondary battery and a battery module. The secondary battery comprises a casing, which includes a receiving hole having an opening; a top cover assembly, which includes a top cover plate connected to the casing to close the opening; an electrode assembly disposed within the receiving hole, the electrode assembly has an dimension of 0.01 mm to 1000 mm in an axial direction of the receiving hole, the electrode assembly includes two end faces opposed to each other in a first direction perpendicular to the axial direction and tabs extending from the end faces, the electrode assembly includes two or more electrode units laminated in the axial direction, and in a second direction perpendicular to the axial direction and the first direction, the dimension of the tab is smaller than the dimension of the end face; and a current collecting member electrically connected to the tab.

Abstract: Devices, methods, and media are described for unmap support in coarse mapped storage. In one embodiment a controller of a memory sub-system manages a set of metadata for super management units (SMU) of the memory sub-system, wherein each SMU of the memory sub-system comprises a plurality of data management units (MU), and wherein each MU comprises a plurality of addressable memory elements as part of a coarse memory storage of the memory sub-system. The controller processes a trim command for a first SMU of the plurality of SMUs, and adjusts a trim bit associated with metadata for the first SMU. This trim bit can then be used to manage read and write operations as the trimmed unit waits to be written with an unmap data pattern. Similarly, a trim bit in MU metadata can be used manage related operations to prevent memory access errors.

Abstract: Devices, methods, and media are described for unmap support in coarse mapped storage. In one embodiment a controller of a memory sub-system manages a set of metadata for super management units (SMU) of the memory sub-system, wherein each SMU of the memory sub-system comprises a plurality of data management units (MU), and wherein each MU comprises a plurality of addressable memory elements as part of a coarse memory storage of the memory sub-system. The controller processes a trim command for a first SMU of the plurality of SMUs, and adjusts a trim bit associated with metadata for the first SMU. This trim bit can then be used to manage read and write operations as the trimmed unit waits to be written with an unmap data pattern. Similarly, a trim bit in MU metadata can be used manage related operations to prevent memory access errors.

Abstract: A method of forming a semiconductor device includes patterning a mask layer and a semiconductor material to form a first fin and a second fin with a trench interposing the first fin and the second fin. A first liner layer is formed over the first fin, the second fin, and the trench. An insulation material is formed over the first liner layer. A first anneal is performed, followed by a first planarization of the insulation material to form a first planarized insulation material. After which, a top surface of the first planarized insulation material is over a top surface of the mask layer. A second anneal is performed, followed by a second planarization of the first planarized insulation material to form a second planarized insulation material. The insulation material is etched to form shallow trench isolation (STI) regions, and a gate structure is formed over the semiconductor material.

Abstract: An etchant composition, a tackifier, an alkaline solution, a method of removing polyimide and an etching process are provided. The etchant composition includes a tackifier (A) and an alkaline solution (B). The tackifier (A) includes a resin containing a hydroxyl group (a), a surfactant (b) and a first solvent (c1). The alkaline solution (B) includes an alkaline compound (d) and a second solvent (c2).

Abstract: According to an embodiment, a receiver is described comprising an input configured to receive a digital input signal and a digital filter configured to deliver a filtered digital output signal and to deliver stability information wherein the digital filter is configured to enter or stay in a transition state after a transition at the input signal, leave the transition state when the input signal is considered being stable, update the output signal when leaving the transition state and deliver the stability information indicating transitions at the input signal during transition state.

Abstract: A semiconductor device includes an N-type fin-like field effect, a P-type fin-like field effect transistor, a shallow trench isolation (STI) structure, a first interlayer dielectric (ILD) layer, and a second ILD layer. The N-type fin-like field effect transistor includes a first semiconductor fin, a gate structure across the first semiconductor fin, and a first source/drain feature in contact with the first semiconductor fin. The P-type fin-like field effect transistor includes a second semiconductor fin, the gate structure across the second semiconductor fin, and a second source/drain feature in contact with the second semiconductor fin. The structure surrounds the first and second semiconductor fins. The first interlayer dielectric (ILD) layer covers the first source/drain feature. The second ILD layer covers the second source/drain feature, wherein a porosity of the second ILD layer is greater than a porosity of the first ILD layer.

Abstract: The present disclosure relates to a secondary battery and a battery module. The secondary battery comprises a case, comprising a base plate and a side plate connected with the base plate, wherein the base plate and the side plate form a receiving hole and an opening in communication with the receiving hole, the opening is arranged opposite to the base plate in an axial direction of the receiving hole, and the base plate has a thickness larger than that of the side plate; a cap assembly, sealingly connected with the side plate to close the opening; and an electrode assembly, disposed in the receiving hole and comprising two or more electrode units, which are stacked in the axial direction, and each electrode unit is arranged with a wide side opposite to the base plate and a narrow side toward the side plate.

Abstract: The present application relates to a current collector and a secondary battery. The current collector is used to electrically connect a pole and tab of a secondary battery, and comprises: a first sheet; a second sheet that is disposed to intersect the first sheet, the second sheet being used to electrically connect to the pole; a current collection unit, the current collection unit and the second sheet being disposed at two opposite sides of the first sheet in a first thickness direction thereof, and the first thickness direction thereof intersecting with a second thickness direction of the second sheet; the current collection unit comprises a first current collection sheet, the first current collection sheet is used to electrically connect to the tab, and the first current collection sheet is provided with a first connection terminal that is connected to the first sheet.

Abstract: First and second data are identified, such that the second data is based on a modification operation performed on the first data. First error-checking data comprising a Cyclic Redundancy Check (CRC) value of the first data is identified. Incremental error-checking data is generated based on a difference between the first data and the second data. Updated first error-checking data is generated based on a combination of the first error-checking data and the incremental error-checking data. The updated first error-checking data is compared to second error-checking data generated from a CRC value of the second data to determine whether the second data contains an error.

Abstract: A digital audio array circuit is provided. The digital audio array circuit includes at least two digital audio units and a system master unit. Each of the digital audio units is configured to transform a received sound wave to a digital audio signal. Each of the digital audio units includes a left/right channel configuration input terminal. The system master unit is connected to the at least two digital audio units in time division multiplexing to receive the digital audio signals. The left/right channel configuration input terminal of each of the digital audio units is configured to receive a same synchronizing signal.

Abstract: The present disclosure relates to a secondary battery and a battery module. The secondary battery includes a case including a receiving space with an opening; a cap assembly connected to the case and close the opening; an electrode assembly disposed in the receiving space and including two end faces opposite to each other in a first direction perpendicular to an axial direction of the receiving space, and tabs extending from the end faces and two or more electrode units stacked in the axial direction; and a current collecting unit, including a first piece extending in the axial direction and a first current collecting piece connected to the first piece, the tab extends in the first direction and is connected to the first current collecting piece, and a portion of the tab connected to the first current collecting piece and the first current collecting piece are stacked in the axial direction.

Abstract: The disclosure provides a battery pack, which includes a plurality of batteries and a box, the plurality of batteries accommodated in the box; each battery including an explosion-proof valve; the box including a lower box for supporting the batteries and an upper box matching the lower box, wherein the upper box includes an upper plate and a lower plate, the upper plate covers the lower plate to form an accommodating space for accommodating a fire extinguishing agent; the explosion-proof valve of each battery faces the lower plate of the upper box, and the lower plate is set to be able to discharge the fire extinguishing agent from the accommodating space after being melted. When the battery occurs a thermal runaway, the fire extinguishing agent in the lower plate flows rapidly to the runaway area, thus inhibiting the thermal runaway of the battery.

Abstract: The present application relates to a current collector and a secondary battery. The current collector is used to electrically connect a pole and tab of a secondary battery, and comprises: a first sheet; a second sheet that is disposed to intersect the first sheet, the second sheet being used to electrically connect to the pole; a current collection unit, the current collection unit and the second sheet being disposed at two opposite sides of the first sheet in a first thickness direction thereof, and the first thickness direction thereof intersecting with a second thickness direction of the second sheet; the current collection unit comprises a first current collection sheet, the first current collection sheet is used to electrically connect to the tab, and the first current collection sheet is provided with a first connection terminal that is connected to the first sheet.

Abstract: The present application relates to a secondary battery and a battery module. The secondary battery comprises: a casing, which is provided with an accommodating hole with an opening; a top cover assembly, which is in sealed connection with the casing to close the opening; an electrode assembly, which is arranged in the accommodating hole, and comprises two end faces opposite to a first direction perpendicular to an axial direction of the accommodating hole, and tabs extending from the end faces, the electrode assembly comprises two or more electrode units, wherein two or more electrode units are stacked in the axial direction, and in a second direction perpendicular to the axial direction and the first direction, the size of the tabs is smaller than that of the end faces; and a current collector, which comprises a body portion.

Abstract: A method of forming a semiconductor device includes patterning a mask layer and a semiconductor material to form a first fin and a second fin with a trench interposing the first fin and the second fin. A first liner layer is formed over the first fin, the second fin, and the trench. An insulation material is formed over the first liner layer. A first anneal is performed, followed by a first planarization of the insulation material to form a first planarized insulation material. After which, a top surface of the first planarized insulation material is over a top surface of the mask layer. A second anneal is performed, followed by a second planarization of the first planarized insulation material to form a second planarized insulation material. The insulation material is etched to form shallow trench isolation (STI) regions, and a gate structure is formed over the semiconductor material.