Patents by Inventor Ning Chen

Ning Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220201551
    Abstract: Systems and methods for pacing data transmission are described. An illustrative method includes transmitting, by a network device, a data stream at a pacing rate to a user equipment (UE) device. The method further includes accessing a metric of a radio access network (RAN) to which the UE device is connected, the metric associated with the UE device. The method further includes adjusting, based on the metric, the pacing rate at which the data stream is transmitted to the UE device.
    Type: Application
    Filed: March 14, 2022
    Publication date: June 23, 2022
    Inventors: Feng Li, Haim S. Ner, Bjorn Olof Erland Kalderen, Ning Chen
  • Publication number: 20220193221
    Abstract: Provided a recombinant classical swine fever virus E2 protein comprising at least one mutation at the epitope specifically recognized by the 6B8 monoclonal antibody. Further, the present invention provides an immunogenic composition comprising the recombinant E2 protein of the present invention and the use of the immunogenic composition for preventing and/or treating diseases associated with CSFV in animal. Moreover, the present invention provides a method and a kit for differentiating animals infected with CSFV from animals vaccinated with the immunogenic composition of the present invention.
    Type: Application
    Filed: April 16, 2020
    Publication date: June 23, 2022
    Inventors: Ning CHEN, Huanhuan LIU, Chao TONG, Jiaying WANG
  • Publication number: 20220186271
    Abstract: The present disclosure relates to the field of genetic engineering, especially relates to a xylose-induced genetically engineered bacteria used for producing ectoine as well as a construction method and use thereof The genetically engineered bacteria is constructed by heterologously expressing the ectABC gene cluster from Halomonas elongata on the E. coli chromosome, using the promoter of xylose transporter coding gene xylF to control the RNA polymerase from T7 bacteriophage, reconstructing a synthesis pathway of ectoine and constructing a plasmid-free system, and enhancing the expression of target genes by a strong promoter T7; the yiled of ectoine reached 12-16 g/L after 20-28 h fermentation in shake flask, and reached 35-50 g/L after 24-40 h fermentation in a 5 L fermentor.
    Type: Application
    Filed: June 14, 2017
    Publication date: June 16, 2022
    Inventors: Xixian XIE, Xuejiao WU, Ning CHEN, Fangqing YAN, Qian MA, Jie MA, Hongchao ZHANG
  • Patent number: 11360672
    Abstract: Data is copied, to a first group of data blocks in a first plurality of groups of unmapped data blocks, from a second group of data blocks in a second plurality of groups of mapped data blocks. Upon copying data to the first group of data blocks from the second group of data blocks, the first group of data blocks is included in the second plurality of groups of mapped data blocks. Upon including the first group of data blocks in the second plurality of groups of mapped data blocks, a wear leveling operation is performed on the first group of data blocks, wherein performing the wear leveling operation comprises determining a base address of the first group of data blocks, the base address indicating a location at which the first group of data blocks begins. A request to access subsequent data at a logical address associated with a data block included in the first group of data blocks is received.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: June 14, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Fangfang Zhu, Jiangli Zhu, Ning Chen, Ying Yu Tai
  • Patent number: 11360885
    Abstract: In an embodiment, a system includes a plurality of memory components that each include a plurality of management groups. Each management group includes a plurality of sub-groups. The system also includes a processing device that is operatively coupled with the plurality of memory components to perform wear-leveling operations that include maintaining a sub-group-level delta write count (DWC) for each of the sub-groups of each of the management groups of a memory component in the plurality of memory components. The wear-leveling operations also include determining, in connection with a write operation to a first sub-group of a first management group of the memory component, that a sub-group-level DWC for the first sub-group equals a management-group-move threshold, and responsively triggering a management-group-move operation from the first management group to a second management group of the memory component.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: June 14, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Paul Stonelake, Ning Chen, Fangfang Zhu, Alex Tang
  • Publication number: 20220175782
    Abstract: Provided herein are KRAS G12C inhibitors, such as composition of the same, and methods of using the same. These inhibitors are useful for treating a number of disorders, including pancreatic, colorectal, and lung cancers.
    Type: Application
    Filed: January 19, 2022
    Publication date: June 9, 2022
    Inventors: John Gordon ALLEN, Brian Alan LANMAN, Jian CHEN, Anthony B. REED, Victor J. CEE, Longbin LIU, Patricia LOPEZ, Ryan Paul WURZ, Thomas T. NGUYEN, Shon BOOKER, Jennifer Rebecca ALLEN, Margaret CHU-MOYER, Albert AMEGADZIE, Ning CHEN, Clifford GOODMAN, Jonathan D. LOW, Vu Van MA, Ana Elena MINATTI, Nobuko NISHIMURA, Alexander J. PICKRELL, Hui-Ling WANG, Youngsook SHIN, Aaron C. SIEGMUND, Kevin C. YANG, Nuria A. TAMAYO, Mary WALTON, Qiufen XUE
  • Patent number: 11335978
    Abstract: The disclosure relates to a secondary battery and a battery module. The secondary battery comprises: a case comprising a receiving hole having an opening; a cap assembly sealingly connected with the case to close the opening; an electrode assembly disposed in the receiving hole, wherein the electrode assembly comprises two end surfaces opposite to each other in a first direction perpendicular to an axial direction of the receiving hole and tabs extending from respective end surfaces, and the electrode assembly comprises two or more electrode units which are stacked in the axial direction; and a current collecting unit comprising a first sheet and a first current collecting sheet connected to the first sheet, wherein both the first sheet and the first current collecting sheet extend in the axial direction, and the tab is bent with respect to the first direction and is electrically connected to the first current collecting sheet.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: May 17, 2022
    Assignee: Contemporary Amperex Technology Co., Limited
    Inventors: Yuanbao Chen, Rui Yang, Dongyang Shi, Ning Chen, Fei Hu, Zhenhua Li
  • Patent number: 11306087
    Abstract: Provided herein are methods of using KRAS G12C inhibitors. These methods of using the inhibitors are useful for treating a number of disorders, including pancreatic, colorectal, and lung cancers.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: April 19, 2022
    Assignee: AMGEN INC.
    Inventors: Brian Alan Lanman, Shon Booker, Clifford Goodman, Anthony B. Reed, Jonathan D. Low, Hui-Ling Wang, Ning Chen, Ana Elena Minatti, Ryan Wurz, Victor J. Cee
  • Patent number: 11307983
    Abstract: A processing device in a memory sub-system maintains a mapping data structure to track data movements from a plurality of data management units associated with a media management operation on a memory device. The processing device further uses a first indicator and a second indicator of a plurality of indicators to indicate which data of data management units of a source group of data management units have been copied to a destination group of data management units during the media management operation. Data located in data management units preceding the first indicator have been copied to data management units of the destination group of data management units. Data located in data management units associated with the first indicator and the second indicator or between the first indicator and the second indicator are either copied to data management units of the destination group of data management units or remain located in data management units of the source group of data management units.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: April 19, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Ning Chen, Jiangli Zhu, Ying Yu Tai
  • Patent number: 11307089
    Abstract: A light sensing device is provided, which includes a photodiode, a capacitor circuit and an ADC. The ADC includes a comparator, a counter, a reset switch, a logic circuit and a reference voltage switching circuit. The reference voltage switching circuit is controlled by the logic circuit to a determination reference voltage. When a primary integration time ends, a first node has a residual voltage that does not reach a reference voltage, the logic circuit controls the reference voltage switching circuit to provide the determination reference voltage to the comparator or the capacitor circuit within a secondary integration time, and the comparator outputs a comparison signal, the logic circuit receives the comparison signal within the secondary integration time, and determines the secondary value and outputs to the counter. The counter generates a primary value within the primary integration time, and the primary value is combined with the secondary value.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: April 19, 2022
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Chih-Ning Chen
  • Patent number: 11304095
    Abstract: Systems and methods for pacing data transmission are described. An illustrative method includes transmitting, by a network device, a data stream at a pacing rate to a user equipment (UE) device. The method further includes accessing a metric of a radio access network (RAN) to which the UE device is connected, the metric associated with the UE device. The method further includes adjusting, based on the metric, the pacing rate at which the data stream is transmitted to the UE device.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: April 12, 2022
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Feng Li, Haim S. Ner, Bjorn Olof Erland Kalderen, Ning Chen
  • Patent number: 11291979
    Abstract: Provided is a ?-zeolite that has an SiO2/Al2O3 ratio of less than 20 but yet is comparable or superior in heat resistance to conventional ?-zeolites having SiO2/Al2O3 ratio of 20 or greater. This ?-zeolite is characterized in that: in powder X-ray diffractometry using a CuK?-ray as a ray source, the full width at half maximum of a powder X-ray diffraction peak on the (302) plane is 0.15-0.50 inclusive; and the molar ratio of silica to alumina is less than 20.0. Preferably, the ?-zeolite is obtained by a production method which comprises a crystallization step for crystallizing a composition comprising an alumina source, a silica source, an alkali source, a tetraethylammonium cation source and water, characterized in that the composition contains potassium and the molar ratio of potassium to silica exceeds 0.04.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: April 5, 2022
    Assignee: TOSOH CORPORATION
    Inventors: Ning Chen, Yusuke Naraki
  • Publication number: 20220104066
    Abstract: A network device receives, from a congestion controller, traffic policy information associated with a data stream between a sender and a receiver, where the traffic policy information includes a maximum round trip delay time (RTT) and a maximum throughput rate (Rate). The network device obtains a receiver advertised window size (RWND) for the receiver for the data stream. The network device modifies the RWND based on the RTT and the Rate to produce a modified receiver window size (RWND?) and sends the RWND? to the sender for use in controlling congestion on the data stream between the sender and the receiver.
    Type: Application
    Filed: December 14, 2021
    Publication date: March 31, 2022
    Inventors: Feng Li, Haim S. Ner, Parry Cornell Booker, Ning Chen
  • Patent number: 11284578
    Abstract: A stevia cultivar, designated ‘16228013’, is disclosed. Further embodiments relate to the plant parts of stevia cultivar ‘16228013’, to the plants of stevia ‘16228013’ and to methods for producing a stevia plant produced by crossing the cultivar ‘16228013’ with itself or another stevia variety, including methods using marker assisted breeding. Further embodiments relate to hybrid stevia seeds and plants produced by crossing the cultivar ‘16228013’ with another stevia cultivar. Six highly polymorphic SNPs loci and the corresponding genomic sequences used to identify plant variety ‘16228013’ derived plant materials are also disclosed.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: March 29, 2022
    Assignee: PureCircle USA Inc.
    Inventors: Avetik Markosyan, Seong Siang Ong, Runchun Jing, Yu Cheng Bu, Juan Zhu, Jian Ning Chen, Yeen Yee Wong
  • Patent number: 11285156
    Abstract: Provided herein are KRAS G12C inhibitors, such as composition of the same, and methods of using the same. These inhibitors are useful for treating a number of disorders, including pancreatic, colorectal, and lung cancers.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: March 29, 2022
    Assignee: AMGEN INC.
    Inventors: John Gordon Allen, Brian Alan Lanman, Jian Chen, Anthony B. Reed, Victor J. Cee, Longbin Liu, Patricia Lopez, Ryan Paul Wurz, Thomas T. Nguyen, Shon Booker, Jennifer Rebecca Allen, Margaret Chu-Moyer, Albert Amegadzie, Ning Chen, Clifford Goodman, Jonathan D. Low, Vu Van Ma, Ana Elena Minatti, Nobuko Nishimura, Alexander J. Pickrell, Hui-Ling Wang, Youngsook Shin, Aaron C. Siegmund, Kevin C. Yang, Nuria A. Tamayo, Mary Walton, Qiufen Xue
  • Patent number: 11289762
    Abstract: The disclosure relates to a battery pack, which can include an enclosure including an upper cover and a lower case in sealed connection, a plurality of battery modules is arranged in the enclosure, and a first bonding member disposed on the upper surface of the battery modules and intended for connecting the battery modules with the upper cover. The present disclosure can strengthen the connection strength between the upper cover and the battery modules, and improve the overall stiffness of the battery modules.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: March 29, 2022
    Assignee: Contemporary Amperex Technology Co., Limited
    Inventors: Xingdi Chen, Kaijie You, Linggang Zhou, Peng Wang, Yanhuo Xiang, Ning Chen
  • Publication number: 20220085448
    Abstract: The present disclosure relates to the technical field of energy storage devices, and provides a battery cell assembly (10), a battery module (100), and a battery pack (200). The battery cell assembly (10) includes: at least two battery cells (1) and an insulation film (2). The at least two battery cells (1) are stacked. Each battery cell (1) includes an electrode assembly (11) and a battery housing (12). The electrode assembly (11) is accommodated in the battery housing (12). The electrode assembly (11) includes a first electrode plate (111), a second electrode plate (112), and a separator (113) disposed between the first electrode plate (111) and the second electrode plate (112). The insulation film (2) surrounds a periphery of the at least two battery cells (1) to wrap the at least two battery cells (1) together.
    Type: Application
    Filed: March 25, 2019
    Publication date: March 17, 2022
    Inventors: Zhenhua LI, Haizu JIN, Dongyang SHI, Ning CHEN, Fei HU, Yuanbao CHEN
  • Publication number: 20220082433
    Abstract: A light sensing device is provided, which includes a photodiode, a capacitor circuit and an ADC. The ADC includes a comparator, a counter, a reset switch, a logic circuit and a reference voltage switching circuit. The reference voltage switching circuit is controlled by the logic circuit to a determination reference voltage. When a primary integration time ends, a first node has a residual voltage that does not reach a reference voltage, the logic circuit controls the reference voltage switching circuit to provide the determination reference voltage to the comparator or the capacitor circuit within a secondary integration time, and the comparator outputs a comparison signal, the logic circuit receives the comparison signal within the secondary integration time, and determines the secondary value and outputs to the counter. The counter generates a primary value within the primary integration time, and the primary value is combined with the secondary value.
    Type: Application
    Filed: January 7, 2021
    Publication date: March 17, 2022
    Inventor: CHIH-NING CHEN
  • Patent number: 11271792
    Abstract: Systems and methods are provided for use in a Simple Network Management Protocol (“SNMP”) computing environment, by which efficiency of computing systems employing SNMP may be improved. An SNMP message is parsed, and the parsed information used to construct a binary tree. By using a binary tree, which is a data object that consumes less memory resources, efficiency of interactions between elements of the SNMP computing environment are improved. A method can include receiving a SNMP request for data. Then, the SNMP request is parsed and a binary tree constructed from the parsed SNMP request. The binary tree includes a plurality of type-length-value nodes. The length value of each non-leaf node is the summation of the length values of all the child nodes below the non-leaf node; and the length value of each leaf node is the length of the data requested.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: March 8, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Dennis Tseng, Min-Lin Lu, Jason Chuang, Yi-Ning Chen
  • Patent number: 11255721
    Abstract: A light sensor having an adaptively controlled gain includes a photoelectric element, an operational amplifier, a comparator, an adaptive gain control circuit, a variable capacitor and a pulse accumulator circuit. The photoelectric element converts light energy into a photocurrent. The operational amplifier outputs an error amplified signal based on a gain multiplied by a voltage difference between an input voltage and a reference voltage. The comparator compares the error amplified signal with a voltage of a reference voltage source to output a comparison signal. The adaptive gain control circuit includes a pulse detector circuit and a gain control circuit. The pulse detector circuit detects the comparison signal and a clock signal to output a pulse detected signal. The adaptive gain control circuit outputs a capacitance modulating signal according to the pulse detected signal. A capacitance of the variable capacitor is modulated according to the capacitance modulating signal.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: February 22, 2022
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Chih-Ning Chen