Patents by Inventor Nobuaki Hashimoto

Nobuaki Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190043786
    Abstract: A semiconductor device includes an integrated circuit that is disposed at a first face side of a semiconductor substrate, the semiconductor substrate having a first face and a second face, the second face opposing the first face, the semiconductor substrate having a through hole from the first face to the second face; an external connection terminal that is disposed at the first face side; a conductive portion that is disposed in the through hole, the conductive portion being electrically connected to the external connection terminal; and an electronic element that is disposed at a second face side.
    Type: Application
    Filed: October 8, 2018
    Publication date: February 7, 2019
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Publication number: 20180301394
    Abstract: A semiconductor device includes an integrated circuit that is disposed at a first face side of a semiconductor substrate, the semiconductor substrate having a first face and a second face, the second face opposing the first face, the semiconductor substrate having a through hole from the first face to the second face; an external connection terminal that is disposed at the first face side; a conductive portion that is disposed in the through hole, the conductive portion being electrically connected to the external connection terminal; and an electronic element that is disposed at a second face side.
    Type: Application
    Filed: June 22, 2018
    Publication date: October 18, 2018
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Publication number: 20180301395
    Abstract: A semiconductor device includes an integrated circuit that is disposed at a first face side of a semiconductor substrate, the semiconductor substrate having a first face and a second face, the second face opposing the first face, the semiconductor substrate having a through hole from the first face to the second face; an external connection terminal that is disposed at the first face side; a conductive portion that is disposed in the through hole, the conductive portion being electrically connected to the external connection terminal; and an electronic element that is disposed at a second face side.
    Type: Application
    Filed: June 22, 2018
    Publication date: October 18, 2018
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Publication number: 20180301393
    Abstract: A semiconductor device includes an integrated circuit that is disposed at a first face side of a semiconductor substrate, the semiconductor substrate having a first face and a second face, the second face opposing the first face, the semiconductor substrate having a through hole from the first face to the second face; an external connection terminal that is disposed at the first face side; a conductive portion that is disposed in the through hole, the conductive portion being electrically connected to the external connection terminal; and an electronic element that is disposed at a second face side.
    Type: Application
    Filed: June 22, 2018
    Publication date: October 18, 2018
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Patent number: 10085720
    Abstract: An ultrasonic device includes an element substrate and a wiring substrate. The element substrate includes an ultrasonic element and an element interconnect terminal connected to the ultrasonic element. The wiring substrate includes a wiring terminal and an opening portion that defines an opening extending through the wiring substrate. The element interconnect terminal and the wiring terminal are connected so as to oppose each other. The opening portion encloses the ultrasonic element in plan view as seen from a thickness direction of the wiring substrate.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: October 2, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Kanechika Kiyose, Nobuaki Hashimoto
  • Publication number: 20170020484
    Abstract: An ultrasonic device includes an element substrate, an ultrasonic transducer array disposed on a rear surface of the element substrate, and having a plurality of ultrasonic transducers arranged in an array, an electrode line connected to the ultrasonic transducer on the rear surface of the element substrate, and drawn to a terminal region located outside the ultrasonic transducer array in a planar view of the element substrate viewed from a normal direction, a sealing plate bonded to the rear surface side of the element substrate, and a through electrode penetrating the sealing plate in a thickness direction and connected to an electrode pad of the electrode line at a position, which is located outside a region opposed to the ultrasonic transducer array of the sealing plate and is opposed to the electrode pad.
    Type: Application
    Filed: July 13, 2016
    Publication date: January 26, 2017
    Inventors: Kanechika KIYOSE, Nobuaki HASHIMOTO
  • Patent number: 9513639
    Abstract: To derive a feasible solution for an operation plan problem for storage tanks for storing liquefied natural gas, which is a complicated mixed-integer non-linear problem, given tank initial state information, reception plan information, and feed plan information, two solving processes are executed alternately two or more times, respectively: a first solving process that replaces a mixed-integer non-linear programming problem with a mixed-integer linear programming problem by linear approximation of a non-linear expression in non-linear constraints containing the non-linear expression, and solves the problem to derive provisional solutions or final solutions for a reception pattern that prescribes a storage tank that is to receive liquefied natural gas, and a discharge pattern that prescribes a storage tank that is to discharge liquefied natural gas, and a second solving process that replaces a mixed-integer non-linear programming problem with a continuous non-linear programming problem by provisionally fixing
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: December 6, 2016
    Assignee: OSAKA GAS CO., LTD.
    Inventors: Kenji Tsuzaki, Kaoru Kawamoto, Tomohito Okamura, Hiromasa Tani, Tomokazu Ueda, Nobuaki Hashimoto, Keisuke Kawata, Takahito Tanabe, Kouhei Harada, Atsushi Nitanda, Toshihiro Nitta
  • Patent number: 9496202
    Abstract: An electronic substrate includes: an electronic element provided on a first face of a semiconductor substrate having a through hole; a passive element provided on a second face of the semiconductor substrate; a first part of an interconnection pattern provided on the second face of the semiconductor substrate; an insulating layer provided on the second face of the semiconductor substrate; and a second part of the interconnection pattern provided on the insulating layer.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: November 15, 2016
    Assignee: Seiko Epson Corporation
    Inventor: Nobuaki Hashimoto
  • Publication number: 20160058417
    Abstract: An ultrasonic device includes an element substrate and a wiring substrate. The element substrate includes an ultrasonic element and an element interconnect terminal connected to the ultrasonic element. The wiring substrate includes a wiring terminal and an opening portion that defines an opening extending through the wiring substrate. The element interconnect terminal and the wiring terminal are connected so as to oppose each other. The opening portion encloses the ultrasonic element in plan view as seen from a thickness direction of the wiring substrate.
    Type: Application
    Filed: August 28, 2015
    Publication date: March 3, 2016
    Inventors: Kanechika KIYOSE, Nobuaki HASHIMOTO
  • Patent number: 9251942
    Abstract: An electronic substrate including: a base substrate having an active face and a rear face; and a plurality of inductor elements formed on or above the active face, or formed on or above the rear face.
    Type: Grant
    Filed: November 13, 2013
    Date of Patent: February 2, 2016
    Assignee: Seiko Epson Corporation
    Inventor: Nobuaki Hashimoto
  • Publication number: 20150325499
    Abstract: An electronic substrate includes: an electronic element provided on a first face of a semiconductor substrate having a through hole; a passive element provided on a second face of the semiconductor substrate; a first part of an interconnection pattern provided on the second face of the semiconductor substrate; an insulating layer provided on the second face of the semiconductor substrate; and a second part of the interconnection pattern provided on the insulating layer.
    Type: Application
    Filed: July 17, 2015
    Publication date: November 12, 2015
    Inventor: Nobuaki HASHIMOTO
  • Patent number: 9087820
    Abstract: An electronic substrate includes: an electronic element provided on a first face of a semiconductor substrate having a through hole; a passive element provided on a second face of the semiconductor substrate; a first part of an interconnection pattern provided on the second face of the semiconductor substrate; an insulating layer provided on the second face of the semiconductor substrate; and a second part of the interconnection pattern provided on the insulating layer.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: July 21, 2015
    Assignee: Seiko Epson Corporation
    Inventor: Nobuaki Hashimoto
  • Patent number: 9070637
    Abstract: A via hole is formed on a base substrate before a device circuit is formed, and thermal oxidation is performed to form a thermal oxidation layer on a surface of the base substrate on which the device circuit is formed and a surface in the via hole. The device circuit having a conductive section is formed on the base substrate after the thermal oxidation, and then, a conductive body is embedded in the via hole.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: June 30, 2015
    Assignee: Seiko Epson Corporation
    Inventors: Tsuyoshi Yoda, Nobuaki Hashimoto
  • Publication number: 20150041992
    Abstract: A semiconductor device includes an integrated circuit that is disposed at a first face side of a semiconductor substrate, the semiconductor substrate having a first face and a second face, the second face opposing the first face, the semiconductor substrate having a through hole from the first face to the second face; an external connection terminal that is disposed at the first face side; a conductive portion that is disposed in the through hole, the conductive portion being electrically connected to the external connection terminal; and an electronic element that is disposed at a second face side.
    Type: Application
    Filed: October 23, 2014
    Publication date: February 12, 2015
    Inventors: Haruki ITO, Nobuaki HASHIMOTO
  • Patent number: 8896104
    Abstract: A semiconductor device includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically connected to the external connection terminal; an electronic element formed on or above the second face of the semiconductor substrate; a second electrode electrically connected to the electronic element and having a top face and a rear face; a groove portion formed on the second face of the semiconductor substrate and having a bottom face including at least part of the rear face of the second electrode; and a conductive portion formed in the groove portion and electrically connected to the rear face of the second electrode.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: November 25, 2014
    Assignee: Seiko Epson Corporation
    Inventors: Haruki Ito, Nobuaki Hashimoto
  • Publication number: 20140303792
    Abstract: To derive a feasible solution for an operation plan problem for storage tanks for storing liquefied natural gas, which is a complicated mixed-integer non-linear problem, given tank initial state information, reception plan information, and feed plan information, two solving processes are executed alternately two or more times, respectively: a first solving process that replaces a mixed-integer non-linear programming problem with a mixed-integer linear programming problem by linear approximation of a non-linear expression in non-linear constraints containing the non-linear expression, and solves the problem to derive provisional solutions or final solutions for a reception pattern that prescribes a storage tank that is to receive liquefied natural gas, and a discharge pattern that prescribes a storage tank that is to discharge liquefied natural gas, and a second solving process that replaces a mixed-integer non-linear programming problem with a continuous non-linear programming problem by provisionally fixing
    Type: Application
    Filed: October 19, 2012
    Publication date: October 9, 2014
    Applicant: OSAKA GAS Co., Ltd.
    Inventors: Kenji Tsuzaki, Kaoru Kawamoto, Tomohito Okamura, Hiromasa Tani, Tomokazu Ueda, Nobuaki Hashimoto, Keisuke Kawata, Takahito Tanabe, Kouhei Harada, Atsushi Nitanda, Toshihiro Nitta
  • Patent number: 8855733
    Abstract: A substance component detection device includes a sensor substrate which is provided inside a concave groove, in which when an opening is closed by a measurement-target skin to form a closed space, and includes a projection group having a plurality of projections, a light source section which emits light toward the projection group, and light-receiving section which detects Raman scattering light generated by the projection group.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: October 7, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Nobuaki Hashimoto
  • Patent number: 8822239
    Abstract: A semiconductor device includes: a semiconductor substrate including an active element formation face on which an active element is formed; detection electrodes detecting a remaining amount of ink by being wet in the ink; an antenna transmitting and receiving information; a storage circuit storing information relating to the ink; and a control circuit controlling the detection electrodes, the antenna, and the storage circuit.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: September 2, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Nobuaki Hashimoto
  • Patent number: 8823941
    Abstract: A detection device includes a flow channel for a fluid sample, a suction section adapted to draw the fluid sample into the flow channel, an optical device disposed in the flow channel, a light source adapted to irradiate the optical device with light, a light detection section adapted to detect light emitted from the optical device, a microbalance sensor chip having a piezoelectric substrate provided with an oscillation electrode, and disposed in the flow channel, and a quantitative analysis section adapted to perform quantitative analysis on the fluid sample based on output from the light detection section and the microbalance sensor chip. The optical device has a metal nanostructure including projections ranging in size from 1 through 1000 nm, and emits light representing the fluid sample adsorbed to the metal nanostructure.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: September 2, 2014
    Assignee: Seiko Epson Corporation
    Inventors: Kohei Yamada, Nobuaki Hashimoto
  • Patent number: 8673767
    Abstract: A semiconductor device includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically connected to the external connection terminal; an electronic element formed on or above the second face of the semiconductor substrate; a second electrode electrically connected to the electronic element and having a top face and a rear face; a groove portion formed on the second face of the semiconductor substrate and having a bottom face including at least part of the rear face of the second electrode; and a conductive portion formed in the groove portion and electrically connected to the rear face of the second electrode.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: March 18, 2014
    Assignee: Seiko Epson Corporation
    Inventors: Haruki Ito, Nobuaki Hashimoto