Abstract: In a semiconductor device having a multilayer metallization structure using SiOF film as an interlayer insulating film, with respect to the interlayer insulating film, the fluorine concentration of SiOF films (11, 16) in a wiring gap portion in the same layer wiring is set to be higher than the fluorine concentration of SiOF films (12, 17) between the upper and lower layer wirings (8, 15; 15, 20).

Abstract: A semiconductor device manufacturing method capable of manufacturing a semiconductor device having a small wiring capacitance even for a small wiring pitch is provided. Steps of forming an interlayer insulating film containing a hydrogen silsesquioxance (HSQ) film on a wiring layer, implanting hydrogen ions into the HSQ film, and annealing the semiconductor device are included.

Abstract: A semiconductor device includes a first insulating film formed on a semiconductor substrate. Wiring patterns are partially formed on the first interlayer insulating film. A second insulating film is formed to cover the first insulating film and the wiring patterns. A third insulating film is formed on the second insulating film. In this case, at least an upper surface portion of the first insulating film has a moisture containing percentage lower than that of the second insulating film.

Abstract: A structure and manufacturing process of a low dielectric constant interlayer insulating film used between wiring layers and semiconductor devices using such film are disclosed. The insulating film which can withstand in an actual process comprises an amorphous carbon fluoride film. A diamond like carbon film and a silicon excess layer are disposed on both sides of the amorphous carbon fluoride film to be inserted between the wiring layers, whereby adhesion to wiring and another insulating film contacting it is significantly enhanced. In addition, a silicon based insulating film is disposed and flattened on a multilayer film containing an amorphous carbon fluoride film buried with a wiring layer, and is used as a hard mask for anisotropically etching the diamond like carbon film and the amorphous carbon fluoride film with oxygen plasma to form a via hole.

Abstract: In an LDD structure MOSFET, a protecting multilayer insulating film is formed to cover a gate electrode in order to protect the gate electrode and the gate oxide film from a moisture included in an upper level layer. The protecting multilayer insulating film includes a protecting nitride film for preventing infiltration of moisture, and another protecting insulator film having a compressive stress for relaxing a tensile stress of the protecting nitride film. Thus, it is possible to prevent infiltration of moisture, and simultaneously, it is possible to minimize energy levels for trapping electrons and holes, which would have otherwise been formed within the gate oxide film and at a boundary between the gate oxide film and the semiconductor substrate because of the tensile stress of the protecting nitride film.

Abstract: An interconnection layer extends across at least a macro cell region and at least a circuit region other than the macro cell region, the macro cell region and the circuit region being monolithically integrated into a semiconductor device, wherein the interconnection layer in the macro cell region is thinner than the interconnection layer in the circuit region.

Abstract: There is disclosed a semiconductor device which includes a semiconductor substrate having an element region and source and drain regions, a gate dielectric film containing nitrogen formed in the element region of said semiconductor substrate, a gate electrode formed on the gate dielectric film, a first dielectric film formed adjacent to the gate electrode so as to define a side wall therefor, a second dielectric film formed so as to cover the gate electrode and the first dielectric film, the second dielectric film being doped with nitrogen, and a third dielectric film formed so as to cover the second dielectric film, the third dielectric film being formed of silicon nitride. A method for manufacturing such a semiconductor device is also described.

Abstract: There is provided a method of fabricating a semiconductor, including the steps, in sequence, of (a) forming a first interlayer insulating film over a semiconductor substrate, (b) forming an electrically conductive contact hole in the first interlayer insulating film, (c) forming a second interlayer insulating film over the first interlayer insulating film, (d) forming a photosensitive organic film over the second interlayer insulating film, (e) forming a via-hole passing through the photosensitive organic film and the second interlayer insulating film, the via-hole being in vertical alignment with the contact hole, (f) forming a film so that the film covers the photosensitive organic film therewith and fills the via-hole therewith, (g) exposing the film to plasma so that a portion of the film lying over the photosensitive organic film is removed, (h) removing both the photosensitive organic film and the film remaining in the via-hole, and (i) forming a wire above the via-hole.

Abstract: Disclosed is a semiconductor device, which has: a wiring corresponding to a critical path, a wiring delay time of which determines an operating speed of an entire circuit, and a wiring corresponding to other than the critical path. The critical path wiring and the other wiring are formed on the same wiring layer, wherein a thickness of at least a part of the critical path wiring is greater than that of the other wiring.

Abstract: A manufacturing method is provided to manufacture a semiconductor device, which contains an interlayer insulating film corresponding to an oxide film or a film made of BPSG formed on a semiconductor substrate. Herein, selective etching is performed using etching gas with respect to an aluminum wiring layer, which is formed on the interlayer insulating film. Then, a surface of the interlayer insulating film, which is exposed by the selective etching, is subjected to reforming. Thereafter, a layer of fluoride amorphous carbon is formed in accordance with a CVD method or else. According to one method for the reforming, after the selective etching of the aluminum wiring layer, the etching gas is changed with gas containing CF.sub.4 so that plasma process is performed on the surface of the interlayer insulating film. According to another method for the reforming, before formation of the fluoride amorphous carbon, ion implantation of silicon is performed on the surface of the interlayer insulating film.

Abstract: There is provided a method of fabricating a semiconductor device, including the steps of (a) forming impurity-diffused layers at a surface of a silicon semiconductor substrate in selected regions, (b) forming a refractory metal film over the impurity-diffused layers, (c) carrying out first thermal annealing in nitrogen atmosphere to convert the refractory metal film into a refractory metal silicide layer, (d) causing damage to a denaturated layer having been formed over the refractory metal film due to the first thermal annealing, (e) etching both the denaturated layer and non-reacted portions of the refractory metal film with a solution containing ammonia and hydrogen peroxide therein, and (f) carrying out second thermal annealing in nitrogen atmosphere to reduce resistance of the refractory metal silicide layer. For instance, the damage is caused to the denaturated layer by arsenic (As) ion implantation. The damage may be caused to the denaturated layer by exposing to oxygen plasma.

Abstract: There is provided a method of fabricating a semiconductor device, including the steps of (a) forming impurity-diffused layers at a surface of a silicon semiconductor substrate in selected regions, (b) forming a refractory metal film over the impurity-diffused layers, (c) carrying out first thermal annealing in nitrogen atmosphere to convert the refractory metal film into a refractory metal silicide layer, (d) causing damage to a denaturated layer having been formed over the refractory metal film due to the first thermal annealing, (e) etching both the denaturated layer and non-reacted portions of the refractory metal film with a solution containing ammonia and hydrogen peroxide therein, and (f) carrying out second thermal annealing in nitrogen atmosphere to reduce resistance of the refractory metal silicide layer. For instance, the damage is caused to the denaturated layer by arsenic (As) ion implantation. The damage may be caused to the denaturated layer by exposing to oxygen plasma.

Abstract: The present invention provides a novel interconnection structure which comprises an insulation layer having a contact hole which extends in a first vertical direction, a contact layer residing within the contact hole and being made of a first conductive material which has a first electromigration resistance, and an interconnection layer extending within the insulation layer. The interconnection layer has one end portion which is in contact with one end of the contact layer. The interconnection layer is made of a second conductive material having a second electromigration resistance which is smaller than the first electromigration resistance. The interconnection layer has a reservoir portion which is made of the second conductive material. The reservoir portion extends within the insulation layer and extends from the one end portion of the interconnection layer in a second vertical direction which is opposite to the first vertical direction.

Abstract: Disclosed is a semiconductor device, which has: a wiring corresponding to a critical path, a wiring delay time of which determines an operating speed of an entire circuity, and a wiring corresponding to other than the critical path. The critical path wiring the other wiring are formed on the same wiring layer, wherein a thickness of at least a part of the critical path wiring is greater than that of the other wiring.

Abstract: The present invention provides a novel interconnection structure which comprises an insulation layer having a contact hole which extends in a first vertical direction, a contact layer residing within the contact hole and being made of a first conductive material which has a first electromigration resistance, and an interconnection layer extending within the insulation layer. The interconnection layer has one end portion which is in contact with one end of the contact layer. The interconnection layer is made of a second conductive material having a second electromigration resistance which is smaller than the first electromigration resistance. The interconnection layer has a reservoir portion which is made of the second conductive material. The reservoir portion extends within the insulation layer and extends from the one end portion of the interconnection layer in a second vertical direction which is opposite to the first vertical direction.

Abstract: There is provided a method of fabricating a semiconductor device, including the steps of (a) forming impurity-diffused layers at a surface of a silicon semiconductor substrate in selected regions, (b) forming a refractory metal film over the impurity-diffused layers, (c) carrying out first thermal annealing in nitrogen atmosphere to convert the refractory metal film into a refractory metal silicide layer, (d) causing damage to a denaturated layer having been formed over the refractory metal film due to the first thermal annealing, (e) etching both the denaturated layer and non-reacted portions of the refractory metal film with a solution containing ammonia and hydrogen peroxide therein, and (f) carrying out second thermal annealing in nitrogen atmosphere to reduce resistance of the refractory metal silicide layer. For instance, the damage is caused to the denaturated layer by arsenic (As) ion implantation. The damage may be caused to the denaturated layer by exposing to oxygen plasma.

Abstract: A semiconductor device which comprises a first insulator, a first conductor disposed on one side near a semiconductor substrate, a second conductor disposed on the opposite side to the substrate forming a tubular member together with the first conductor, and a second insulator surrounding the member. The first insulator is incorporated into the member, and the member and the first insulator constitute an electrical wiring. Since the wiring is composed of the first insulator and the first and second conductors surrounding the first insulator, an electric current flows the tubular member of the conductors. Therefore, when the device is operated by a high-frequency (for example 80 GHz or more) electric current, apparent increase of the wiring resistance due to the "skin effect" hardly occur and as a result, reduction of the operating speed can be prevented.

Abstract: The present invention relates to a semiconductor device which has a wiring system including a wiring formed by completely surrounding a periphery of isolation films with a metal conductor as a main wiring material as viewed in a cross sectional profile and a contact opening and a through hole opening where the main wiring material is buried and a manufacturing method thereof.

Abstract: A semiconductor device which comprises a first insulator, a first conductor disposed on one side near a semiconductor substrate, a second conductor disposed on the opposite side to the substrate forming a tubular member together with the first conductor, and a second insulator surrounding the member. The first insulator is incorporated into the member, and the member and the first insulator constitute an electrical wiring. Since the wiring is composed of the first insulator and the first and second conductors surrounding the first insulator, an electric current flows through the tubular member of the conductors. Therefore, when the device is operated by a high-frequency (for example 80 GHz or more) electric current, apparent increase of the wiring resistance due to the "skin effect" hardly occurs and as a result, reduction of the operating speed can be prevented.

Abstract: A LDD MOS transistor having a small fringe capacitance is fabricated by the steps of forming, lightly-doped source and drain regions by introducing impurities into a semiconductor substrate by using gate electrode as a mask, forming a pair of sidewall spacers above side surfaces of the gate electrode, forming heavily doped source and drain regions by an ion implantation method using the pair of sidewall spacers as a mask, removing the pair of sidewall spacers, and forming a pair of new sidewall spacers having a dielectric constant lower than that of silicon oxide above the side surface of the gate electrode, including the use of polyimide or boron nitride as the spacer material.