Patents by Inventor Norio Kainuma

Norio Kainuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060099809
    Abstract: A method of flip-chip mounting a semiconductor chip can carry out bonding at normal temperature and improves the positional accuracy of bonding. The method of flip-chip bonding a semiconductor chip 52 includes a step of providing a hardening trigger that is not heat to insulating adhesive 51 either before the semiconductor chip 52 is mounted on the substrate 50 or during bonding; and a step of bonding the bumps of the semiconductor chip to the pads of the substrate 50 by pressure welding or metal combining while hardening of the insulating adhesive 51 is progressing due to provision of the hardening trigger.
    Type: Application
    Filed: February 28, 2005
    Publication date: May 11, 2006
    Inventors: Norio Kainuma, Hidehiko Kira, Kenji Kobae, Takayoshi Matsumura, Kimio Nakamura
  • Publication number: 20060097028
    Abstract: A method of ultrasonic mounting can increase mounting efficiency by using high-frequency ultrasound and can also mount large semiconductor chips. The method ultrasonically bonds a semiconductor chip 52 to a substrate 50 using an ultrasonic mounting apparatus including a horn 15 that propagates ultrasonic vibration of an ultrasonic vibrator, the horn 15 being made of a ceramic that has a higher vibration propagation speed than metal. The method includes steps of disposing the substrate 50 on a stage 13, disposing the semiconductor chip 52 on the substrate 50, and placing the semiconductor chip 52 in contact with a convex part 15a provided on the horn 15 and applying ultrasonic vibration to bond the semiconductor chip 52 to the substrate 50.
    Type: Application
    Filed: February 23, 2005
    Publication date: May 11, 2006
    Inventors: Norio Kainuma, Hidehiko Kira, Kenji Kobae, Takayoshi Matsumura
  • Publication number: 20060097029
    Abstract: A method of flip-chip bonding can favorably activate the bonding surfaces and remove oxide films when bonding pads and bumps of a semiconductor chip and a substrate and avoids problems such as the bumps being excessively flattened and the bonds between connection terminals being destroyed by subsequent ultrasonic vibration.
    Type: Application
    Filed: February 23, 2005
    Publication date: May 11, 2006
    Inventors: Norio Kainuma, Hidehiko Kira, Kenji Kobae, Takayoshi Matsumura, Yukio Ozaki
  • Publication number: 20060094157
    Abstract: The structure of mounting an electronic component on a circuit board is capable of securely flip-chip-bonding the electronic component having bumps, whose separations are very short, to the circuit board without displacement. The structure of mounting an electronic component on a circuit board is characterized in that bumps of the electronic component are respectively flip-chip-bonded to electrodes of the circuit board by applying ultrasonic vibrations to the electronic component, and that a center of each of the bumps is previously relatively displaced, with respect to a center of each of the electrodes in a width direction, in a direction parallel to a direction of the ultrasonic vibrations.
    Type: Application
    Filed: January 25, 2005
    Publication date: May 4, 2006
    Inventors: Kenji Kobae, Hidehiko Kira, Norio Kainuma, Takayoshi Matsumura
  • Publication number: 20060091185
    Abstract: The method is capable of securely mounting an electronic component on a circuit board by applying ultrasonic vibration. The method comprises the step of applying ultrasonic vibrations to the electronic component so as to flip-chip-bond the electronic component to the circuit board having electrodes. Portions of the circuit board, which correspond to peaks of amplitude of vibrations transmitted to the circuit board, are pressed when the ultrasonic vibrations are applied to the electronic component.
    Type: Application
    Filed: January 25, 2005
    Publication date: May 4, 2006
    Inventors: Takayoshi Matsumura, Hidehiko Kira, Kenji Kobae, Norio Kainuma
  • Publication number: 20060090833
    Abstract: The ultrasonic mounting method is capable of uniformly bonding bumps of an electronic component to a circuit board and improving reliability of ultrasonic-mounting the electronic component. The method comprises the step of applying ultrasonic vibrations to the electronic component so as to flip-chip-bond the electronic component to the circuit board having electrodes. The ultrasonic vibrations are applied in a direction parallel to a surface of the electronic component, and loads are vertically applied to the surface of the electronic component in conjunction with vibration cycles of the ultrasonic vibrations.
    Type: Application
    Filed: January 25, 2005
    Publication date: May 4, 2006
    Inventors: Takayoshi Matsumura, Hidehiko Kira, Kenji Kobae, Norio Kainuma
  • Publication number: 20060030076
    Abstract: The semiconductor device of the present invention is capable of restricting alloying metals and improving electrical connection between a semiconductor chip and a mount board. The semiconductor device comprises: the semiconductor chip having terminal sections; and bumps for electrical connection, the bumps being formed at the terminal sections. Each of the bumps is made of a two-layer wire, which includes a core member and a jacket member, and formed by a stud bump bonding process.
    Type: Application
    Filed: October 11, 2005
    Publication date: February 9, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi Kobayashi, Naoki Ishikawa, Kenji Kobae, Hidehiko Kira, Norio Kainuma, Shuichi Takeuchi, Takayoshi Matsumura
  • Patent number: 6943971
    Abstract: The slider tester is capable of solely testing a slider and securely selecting good sliders so as to reduce wasteful costs. The slider tester, which tests reading and writing functions of a slider for reading data from and writing data on a recording medium, includes a testing device for testing the functions of the slider, and a setting plate holding the slider and electrically connecting the slider to the testing device. The setting plate separates the slider a prescribed distance from the recording medium during the test so as to read data from and write data on the recording medium, wherein the slider can be independently attached to and detached from the setting plate.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: September 13, 2005
    Assignee: Fujitsu Limited
    Inventors: Norio Kainuma, Hidehiko Kira, Shinji Hiraoka, Hirokazu Yamanishi, Atsushi Suzuki
  • Publication number: 20050196529
    Abstract: A resin coating method for applying resin to a predetermined region of a wiring board includes the steps of imaging an external appearance of the resin extruded from a resin application device; and automatically adjusting an amount of the resin extruded from the resin application device based on the external appearance of the resin obtained in the imaging step.
    Type: Application
    Filed: April 29, 2005
    Publication date: September 8, 2005
    Applicant: FUJITSU LTD.
    Inventors: Shunji Baba, Takatoyo Yamakami, Norio Kainuma, Kenji Kobae, Hidehiko Kira, Hiroshi Kobayashi
  • Publication number: 20050196704
    Abstract: A resin coating method for applying resin to a predetermined region of a wiring board includes the steps of imaging an external appearance of the resin extruded from a resin application device; and automatically adjusting an amount of the resin extruded from the resin application device based on the external appearance of the resin obtained in the imaging step.
    Type: Application
    Filed: April 29, 2005
    Publication date: September 8, 2005
    Applicant: FUJITSU LTD.
    Inventors: Shunji Baba, Takatoyo Yamakami, Norio Kainuma, Kenji Kobae, Hidehiko Kira, Hiroshi Kobayashi
  • Publication number: 20050196703
    Abstract: A resin coating method for applying resin to a predetermined region of a wiring board includes the steps of imaging an external appearance of the resin extruded from a resin application device; and automatically adjusting an amount of the resin extruded from the resin application device based on the external appearance of the resin obtained in the imaging step.
    Type: Application
    Filed: April 29, 2005
    Publication date: September 8, 2005
    Applicant: FUJITSU LTD.
    Inventors: Shunji Baba, Takatoyo Yamakami, Norio Kainuma, Kenji Kobae, Hidehiko Kira, Hiroshi Kobayashi
  • Patent number: 6885522
    Abstract: A head assembly is provided with a mounting surface, and an integrated circuit chip which is mounted on the mounting surface and processes signals. The integrated circuit chip is covered by a layer which prevents generation of foreign particles from the integrated circuit chip by the provision of the layer.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: April 26, 2005
    Assignee: Fujitsu Limited
    Inventors: Hidehiko Kira, Shunji Baba, Norio Kainuma, Toru Okada, Takatoyo Yamakami, Yasunori Sasaki, Takeshi Komiyama, Kenji Kobae, Hiroshi Kobayashi
  • Publication number: 20050057856
    Abstract: A head assembly is provided with a mounting surface, and an integrated circuit chip which is mounted on the mounting surface and processes signals. The integrated circuit chip is covered by a layer which prevents generation of foreign particles from the integrated circuit chip by the provision of the layer.
    Type: Application
    Filed: October 26, 2004
    Publication date: March 17, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Hidehiko Kira, Shunji Baba, Norio Kainuma, Toru Okada, Takatoyo Yamakami, Yasunori Sasaki, Takeshi Komiyama, Kenji Kobae, Hiroshi Kobayashi
  • Publication number: 20050001014
    Abstract: The method of mounting an electronic part is capable of securely mounting the electronic part having fine solder bumps without excessively heating the part. The method of comprises the steps of: applying flux-fill, which acts as flux and under-filling resin, on a surface of a mount board, in which electrodes are formed; respectively connecting solder bums of the electronic part with the electrodes; and simultaneously filling a gap between the electronic part and the mount board with the flux-fill, wherein the solder bumps are made contact with the electrodes, and ultrasonic vibration energy is applied to contact portions of the solder bumps and the electrodes in the connecting step.
    Type: Application
    Filed: April 5, 2004
    Publication date: January 6, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Shuichi Takeuchi, Hidehiko Kira, Kenji Kobae, Norio Kainuma, Hiroshi Kobayashi, Takayoshi Matsumura, Shigeo Matsunuma, Tomohisa Yagi
  • Publication number: 20040251543
    Abstract: The semiconductor device of the present invention is capable of restricting alloying metals and improving electrical connection between a semiconductor chip and a mount board. The semiconductor device comprises: the semiconductor chip having terminal sections; and bumps for electrical connection, the bumps being formed at the terminal sections. Each of the bumps is made of a two-layer wire, which includes a core member and a jacket member, and formed by a stud bump bonding process.
    Type: Application
    Filed: February 26, 2004
    Publication date: December 16, 2004
    Inventors: Hiroshi Kobayashi, Naoki Ishikawa, Kenji Kobae, Hidehiko Kira, Norio Kainuma, Shuichi Takeuchi, Takayoshi Matsumura
  • Publication number: 20040213894
    Abstract: A resin coating method for applying resin to a predetermined region of a wiring board includes the steps of imaging an external appearance of the resin extruded from a resin application device; and automatically adjusting an amount of the resin extruded from the resin application device based on the external appearance of the resin obtained in the imaging step.
    Type: Application
    Filed: May 21, 2004
    Publication date: October 28, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Shunji Baba, Takatoyo Yamakami, Norio Kainuma, Kenji Kobae, Hidehiko Kira, Hiroshi Kobayashi
  • Patent number: 6787925
    Abstract: A method of mounting a semiconductor device having bumps on a board having pads so that each of the bumps is joined to a corresponding one of the pads is provided. Adhesive to be hardened by heat is provided between the semiconductor device and the board. The method includes the steps of pressing the bumps of the semiconductor device on the pads of the board, and heating a portion in which each of the bumps and a corresponding one of the pads are in contact with each other. A pressure of the bumps to the pads reaches a predetermined value before a temperature of the adhesive to which heat is supplied in the above step reaches a temperature at which the adhesive is hardened.
    Type: Grant
    Filed: March 14, 2001
    Date of Patent: September 7, 2004
    Assignee: Fujitsu Limited
    Inventors: Kazuhisa Tsunoi, Hidehiko Kira, Shunji Baba, Akira Fujii, Toshihiro Kusagaya, Kenji Kobae, Norio Kainuma, Naoki Ishikawa, Satoshi Emoto
  • Patent number: 6770319
    Abstract: A resin coating method for applying resin to a predetermined region of a wiring board includes the steps of imaging an external appearance of the resin extruded from a resin application device; and automatically adjusting an amount of the resin extruded from the resin application device based on the external appearance of the resin obtained in the imaging step.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: August 3, 2004
    Assignee: Fujitsu Limited
    Inventors: Shunji Baba, Takatoyo Yamakami, Norio Kainuma, Kenji Kobae, Hidehiko Kira, Hiroshi Kobayashi
  • Publication number: 20040104722
    Abstract: The magnetic head tester of the present invention drives a medium (40) for rotation to float a slider (10) from the medium (40) so as to test a magnetic head for its characteristics, and the tester comprises a holder (20) removably holding the slider (10) opposed to the surface of the medium (40), and suspension means (24) provided in the holder (20) which has the same function as a suspension supporting the slider (10) in a real apparatus. With this tester, tests can be executed by exchanging the slider (10) alone, and it is unnecessary to discard the suspension even when the magnetic head is judged to be out or order, thus loss of production cost for the suspension and processing cost for assembling the slider in the suspension can be avoided.
    Type: Application
    Filed: November 26, 2003
    Publication date: June 3, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Norio Kainuma, Hidehiko Kira, Kenji Kobae, Hiroshi Kobayashi, Katsutoshi Hirasawa, Takatoyo Yamakami, Masumi Katayama, Shinji Hiraoka
  • Patent number: 6716665
    Abstract: A wafer receiving conductive input/output bumps on the upward front side is placed on a platen. An underfill material sheet, adhered to the surface of the thin film tape, is superposed on the front side of the wafer. The underfill material sheet is forced to soften. When the underfill material sheet is urged against the wafer, the input/output bumps is allowed to penetrate through the underfill material sheet. After the underfill material is hardened, the thin film tape is peeled off from the hardened underfill material sheet. The underfill material can thus be supplied commonly to a large number of individual semiconductor chips included in the wafer. As compared with the case where the underfill material is supplied separately to the individual semiconductor chips, the working time can greatly be shortened.
    Type: Grant
    Filed: January 4, 2001
    Date of Patent: April 6, 2004
    Assignee: Fujitsu Limited
    Inventors: Shunji Baba, Takatoyo Yamakami, Norio Kainuma, Kenji Kobae, Hidehiko Kira, Hiroshi Kobayashi