Patents by Inventor P. Patel

P. Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9471453
    Abstract: Described are an apparatus and method for managing test artifacts. A test plan is selected for a product having a plurality of test artifacts comprising one selected from a group consisting of an execution record and a product requirement. One of the test artifacts is selected for a snapshot at a current time. The snapshot includes a storage record that includes information associated with the selected test artifact and its relationship with other test artifacts at the current time. The snapshot of the selected test artifact is acquired. A current state of the selected test artifact is stored as an element of the snapshot. A current state of relationships of the selected test artifact to the other test artifacts is stored. A current state of the other test artifacts having a relationship with the selected test artifact is stored.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: October 18, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Paul F. McMahan, Sachin P. Patel, John P. Whitfield, David Colasurdo
  • Patent number: 9454168
    Abstract: In an LDO regulator, two feedback loops are created. The first feedback loop includes a high power PNP bipolar power transistor connected in series between the input voltage Vin terminal and the output voltage Vout terminal. The first feedback loop includes a first error amplifier that controls a drive transistor to drive the base of the power transistor such that Vout matches a set voltage Vset. This first feedback loop circuitry uses an operating voltage (the upper rail voltage) that is regulated by a second feedback loop and is approximately 300 mV greater than Vout. As a result, the control circuitry will be powered by a low ripple supply to improve output PSRR. Further, the power transistor is connected such that any noise in the input voltage is a common mode voltage across the base-emitter of the transistor.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: September 27, 2016
    Assignee: Linear Technology Corporation
    Inventors: Amitkumar P. Patel, Carl Nelson
  • Patent number: 9450890
    Abstract: An egress packet modifier includes a script parser and a pipeline of processing stages. Rather than performing egress modifications using a processor that fetches and decodes and executes instructions in a classic processor fashion, and rather than storing a packet in memory and reading it out and modifying it and writing it back, the packet modifier pipeline processes the packet by passing parts of the packet through the pipeline. A processor identifies particular egress modifications to be performed by placing a script code at the beginning of the packet. The script parser then uses the code to identify a specific script of opcodes, where each opcode defines a modification. As a part passes through a stage, the stage can carry out the modification of such an opcode. As realized using current semiconductor fabrication process, the packet modifier can modify 200M packets/second at a sustained rate of up to 100 gigabits/second.
    Type: Grant
    Filed: July 13, 2013
    Date of Patent: September 20, 2016
    Assignee: Netronome Systems, Inc.
    Inventors: Chirag P. Patel, Gavin J. Stark
  • Publication number: 20160257292
    Abstract: A powertrain system employing multiple propulsion torque actuators is described. A method for controlling the powertrain system includes interpreting a driver request, including determining a driver torque request and a regenerative braking request based upon driver inputs to an accelerator pedal and a brake pedal. A desired request is determined based upon the driver torque request and the regenerative braking request. Torque limits for the powertrain system are coordinated based upon the desired request, the driver torque request, and a previous driver torque request to determine upper and lower output torque limits, and the upper and lower output torque limits are combined with system constraints to generate a final torque request. The final torque request is employed to determine torque commands for the propulsion torque actuators, and the propulsion torque actuators are controlled based upon the torque commands for the propulsion torque actuators.
    Type: Application
    Filed: September 23, 2015
    Publication date: September 8, 2016
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Tayoung Choi, Anthony H. Heap, Krunal P Patel, Steven M Hessell
  • Publication number: 20160248334
    Abstract: Power conversion systems, filter circuits and integrated filter resistor and inductor apparatus are presented, in which a damping resistor is integrated with a filter inductor by winding joined resistor winding portions proximate to one another at least partially around a filter inductor core leg to form an integrated filter resistor and inductor apparatus for interconnection with filter capacitors to provide an input filter or an output filter for a motor drive or other power conversion system.
    Type: Application
    Filed: February 25, 2015
    Publication date: August 25, 2016
    Applicant: Rockwell Automation Technologies, Inc.
    Inventors: Yogesh P. Patel, Lixiang Wei
  • Patent number: 9409765
    Abstract: The present invention relates to a method and apparatus for an isolating structure. Embodiments of the present invention provide a robust packaging process and a mechanical filter to reduce the mechanical shock from impact. The mechanical filter can be integrated within the package substrate as part of the packaging process, reducing the assembly complexity.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: August 9, 2016
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Hemant Desai, Viresh P. Patel
  • Publication number: 20160204709
    Abstract: Precharging systems and methods are presented for precharging a DC bus circuit in a power conversion system, in which precharging current is connected through a precharging resistance coupled between only a single AC input line and the DC bus circuit when the DC bus voltage is less than a non-zero threshold, and a controller individually activates controllable rectifier switching devices when the DC bus voltages greater than or equal to the threshold using DC gating or pulse width modulation to selectively provide a bypass path around the precharging resistance for normal load currents in the power conversion system.
    Type: Application
    Filed: January 14, 2015
    Publication date: July 14, 2016
    Applicant: Rockwell Automation Technologies, Inc.
    Inventors: Yogesh P. Patel, Rangarajan Tallam, Brian P. Brown, Jiangang Hu, James J. Campbell
  • Publication number: 20160144141
    Abstract: A detachable cap for measuring usage of an inhaler includes a hollow receiving portion adapted to removably receive the inhaler. A vent is formed in a roof portion of the cap to allow airflow through the cap to the inhaler. An extension portion is provided for containing electronic components, including an electronic circuit provided in the extension portion, the electronic circuit including a controller coupled to a storage device and a power source. A pressure sensor is provided adjacent to the vent, the pressure sensor communicatively coupled to the controller and adapted to detect an air pressure within the cap. The controller is programmed to calculate an air flow rate through the cap based on the detected air pressure and to store the calculated air flow rate in the storage device.
    Type: Application
    Filed: November 13, 2015
    Publication date: May 26, 2016
    Inventors: Rajoshi BISWAS, Gaurav P. PATEL, Ashutosh SABHARWAL
  • Patent number: 9338080
    Abstract: In one embodiment, an edge router receives an update message from a neighboring EBGP edge router, creates a modified origin validation state extended community, prepares a modified update message by attaching the modified origin validation state extended community to the update message, and sends the modified update message to a route reflector. The route reflector receives the modified update message, performs a prefix origin validation and a path validation based on the information contained in the modified update message, prepares a validation message based on the prefix origin validation and path validation, and sends the validation message to the edge router and to all other neighboring IBGP edge routers. The edge routers receive the validation message from the route reflector, parse the validation message, and inherit a validation state parsed from the validation message.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: May 10, 2016
    Assignee: Cisco Technology, Inc.
    Inventors: Keyur P. Patel, Burjiz F. Pithawala, Ed Kern
  • Patent number: 9330999
    Abstract: A multi-component heat spreader comprising a top component having a first surface and an opposing second surface with either a cavity extending therein from the second surface thereof or a projection extending from the second surface thereof. The multi-component heat spreader further includes at least one additional component, such as a footing component or a spacer component, having a first surface and an opposing second surface with either a cavity extending therein from the second surface thereof or a projection extending from the second surface thereof, which is opposite from the top component cavity/projection. The additional component is attached to the top component, such as by brazing, wherein the top component cavity/projection is mated to the additional component cavity/projection.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: May 3, 2016
    Assignee: Intel Corporation
    Inventors: Thomas J. Fitzgerald, Aravindha R. Antoniswamy, Carl L. Deppisch, Nikunj P. Patel
  • Publication number: 20160116474
    Abstract: The present invention provides compositions and methods for the diagnosis and treatment of glioblastoma, particularly tumor propagating cells within the glioblastoma.
    Type: Application
    Filed: June 19, 2014
    Publication date: April 28, 2016
    Applicants: THE BROAD INSTITUTE, INC., THE GENERAL HOSPITAL CORPORATION
    Inventors: MARIO L. SUVA, ESTHER RHEINBAY, ANOOP P. PATEL, BRADLEY E. BERNSTEIN
  • Publication number: 20160090444
    Abstract: Novel pentablock polymers having a PCL-PLA-PEG-PLA-PCL or PCL-PGA-PEG-PGA-PCL configuration, wherein PEG is polyethylene glycol, PCL is poly(8-caprolactone), PGA is poly(glycolic acid), and PLA is poly(lactic acid), and methods of making nanoparticles from the pentablock polymers, are disclosed. The invention is also directed to a method for preparing nanoparticle compositions comprised of polymers with high levels of bioactive or diagnostic agents.
    Type: Application
    Filed: May 16, 2014
    Publication date: March 31, 2016
    Applicant: THE CURATORS OF THE UNIVERSITY OF MISSOURI
    Inventors: ASHIM K. MITRA, SULABH P. PATEL, RAVI D. VAISHYA, VIBHUTI AGRAHARI
  • Patent number: 9273915
    Abstract: Liquid collector trays (5) are disclosed for use in vertical towers (7) in which vapor (9) moves upward and liquid (11) moves downward. The liquid collector trays (5) employ elongated plates (13) which in certain embodiments include a primary liquid collector trough (15) and a secondary liquid collector trough (17). In other embodiments, the primary liquid collector troughs (15) of adjacent plates (13) are aligned so as to form elongated, inwardly-tapering entrance channels (29) which are free of sharp corners. In further embodiments, when the liquid collector tray (5) is in its operative orientation and is viewed from above, each plate (13) includes first and second concave surfaces (31, 33), which collect liquid, and third and fourth convex surfaces (35, 37), which are adjacent to the first and second concave surfaces (31, 33) and serve to mechanically stabilize the plate (13).
    Type: Grant
    Filed: July 16, 2010
    Date of Patent: March 1, 2016
    Assignee: Amistco Seperation Products, Inc.
    Inventor: Kantilal P. Patel
  • Patent number: 9270536
    Abstract: In one embodiment, a router selects a particular peer from an original update group used with an Exterior Gateway Protocol (EGP) such as Border Gateway Protocol (BGP). The original update group includes a plurality of peers of the router that share a same outbound policy and that receive common update messages, from the router, of routing table information. The router determines that the particular peer is a potential slow peer based on a first type of indicia, wherein a slow peer is a peer that cannot keep up with a rate at which the router generates update messages over a prolonged period of time. The router confirms that one or more second types of indicia are consistent with the particular peer being a slow peer. In response to the confirmation, the router determines that the particular peer is a slow peer.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: February 23, 2016
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Balaji Pitta Venkatachalapathy, Isidor Kouvelas, Keyur P. Patel, Anantha Ramaiah
  • Publication number: 20160038474
    Abstract: This invention provides pharmaceutical compositions for the aliosteric modulation of hemoglobin (S) and methods for their use in treating disorders mediated by hemoglobin (S) and disorders that would benefit from tissue and/or cellular oxygenation.
    Type: Application
    Filed: March 10, 2014
    Publication date: February 11, 2016
    Applicant: Global Blood Therapeutics, Inc.
    Inventors: Uma SINHA, Brian W. METCALF, Donna OKSENBERG, Kobina N. DUFU, Mira P. PATEL
  • Patent number: 9250262
    Abstract: This invention relates generally to semiconductor manufacturing and packaging and more specifically to semiconductor manufacturing in MEMS (Microelectromechanical systems) inertial sensing products. Embodiments of the present invention provide a robust packaging process and a mechanical filter to reduce the mechanical shock from impact. The mechanical filter can be integrated within the package substrate as part of the packaging process, reducing the assembly complexity.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: February 2, 2016
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Hemant Desai, Viresh P. Patel
  • Publication number: 20160013715
    Abstract: Control apparatus, techniques and computer readable mediums are presented to mitigate LCL filter resonance issue for voltage source converters. Two level voltage source converter with and without passive damping of LCL filter are selected for the comparative study. Control algorithms are presented to estimate the source impedance based on variable carrier PWM. Estimated source impedance is used to tune the control of the VSC to avoid the resonance of LCL filter has been presented. In situations in which LCL resonance cannot be avoided by tuning the control parameters, energy efficient techniques are disclosed to provide selective passive damping to facilitate continued power conversion system operation without significant adverse impact on system performance.
    Type: Application
    Filed: December 11, 2014
    Publication date: January 14, 2016
    Applicant: Rockwell Automation Technologies, Inc.
    Inventors: Yogesh P. Patel, Lixiang Wei
  • Publication number: 20150372913
    Abstract: A method is provided in one particular example and may include obtaining routing information for a plurality of Internet Protocol (IP) addresses in a first network that natively supports a first Internet protocol, the routing information for the plurality of IP addresses in the first network further comprising an additional IP address in the first network and an indication that the additional IP address in the first network is to be used as a tunnel endpoint within the first network for receiving data destined to any of the plurality of IP addresses in the first network; and sending data destined to any one of the plurality of IP addresses in the first network to the additional IP address in the first network.
    Type: Application
    Filed: September 1, 2015
    Publication date: December 24, 2015
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Gunter Johan Van de Velde, William Mark Townsley, Ole Troan, Keyur P. Patel
  • Publication number: 20150362936
    Abstract: In an LDO regulator, two feedback loops are created. The first feedback loop includes a high power PNP bipolar power transistor connected in series between the input voltage Vin terminal and the output voltage Vout terminal. The first feedback loop includes a first error amplifier that controls a drive transistor to drive the base of the power transistor such that Vout matches a set voltage Vset. This first feedback loop circuitry uses an operating voltage (the upper rail voltage) that is regulated by a second feedback loop and is approximately 300 mV greater than Vout. As a result, the control circuitry will be powered by a low ripple supply to improve output PSRR. Further, the power transistor is connected such that any noise in the input voltage is a common mode voltage across the base-emitter of the transistor.
    Type: Application
    Filed: May 7, 2015
    Publication date: December 17, 2015
    Inventors: Amitkumar P. Patel, Carl Nelson
  • Publication number: 20150362935
    Abstract: A driver circuit for a PNP power transistor in an LDO regulator uses a Class AB (push-pull) buffer to supply the necessary base current to an NPN driver transistor, where the NPN driver transistor has its collector connected to the base of the PNP power transistor. A front end circuit of the driver, coupled to drive the Class AB buffer, uses a current diverting transistor, where a first portion of the current is used to control the pull-up transistor in the Class AB buffer, and the remainder of the current is used to control the pull-down transistor in the Class AB buffer, so the driver is very efficient. The portion of the driver circuit between the input of the driver circuit and the base of the NPN driver transistor is an inverting circuit. The driver can properly operate with an input voltage within two diode drops of ground.
    Type: Application
    Filed: May 7, 2015
    Publication date: December 17, 2015
    Inventors: Amitkumar P. Patel, Anthony K. Bonte