Patents by Inventor Pantas Sutardja

Pantas Sutardja has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8379341
    Abstract: A data storage device preamplifier circuit including (i) a write amplifier having an input and an output, and (ii) a read amplifier has an input and an output. The data storage device preamplifier circuit further includes a loopback circuit configured to selectively connect the output of the write amplifier to the input of the read amplifier.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: February 19, 2013
    Assignee: Marvell International Ltd.
    Inventor: Pantas Sutardja
  • Patent number: 8369041
    Abstract: A storage system includes a first buffer configured to store a first repeatable runout profile (RRP) for a sector of a rotating storage medium. A second buffer is configured to store a second RRP for the sector. A controller: controls a servo of the rotating storage medium based on the first RRP during a first revolution of the rotating storage medium; and learns the second RRP (i) while operating in a track-following mode, and (ii) during the first revolution. The controller ceases learning of the second RRP when one of (i) the controller is operating in a seek mode and (ii) the rotating storage medium is in an off-track state. Subsequent to the first revolution of the rotating storage medium and based on whether the learning of the second RRP was stopped during the first revolution, the controller replaces the first RRP with the second RRP in the first buffer.
    Type: Grant
    Filed: February 20, 2012
    Date of Patent: February 5, 2013
    Assignee: Marvell International Ltd.
    Inventors: Pantas Sutardja, Yuan Zheng, Yong Huang, Qiuliang Fu
  • Publication number: 20130020956
    Abstract: New and useful methods and systems for providing lighting control are disclosed. For example, in an embodiment a lighting system includes one or more first solid state lights having a first aesthetic color, one or more second solid state lights having a second aesthetic color, the second aesthetic color having an appreciably longer wavelength than the first aesthetic color, and an amplitude correlation circuit configured to control a ratio of first light produced by the one or more first solid state lights to second light produced by the one or more second solid state lights as a function of a received dimming control signal.
    Type: Application
    Filed: July 13, 2012
    Publication date: January 24, 2013
    Inventors: Wanfeng ZHANG, Pantas Sutardja
  • Patent number: 8358541
    Abstract: A system including a programming module and an interference module. The programming module is configured to determine a programming value to which a state of a target cell is to be programmed, wherein the programming value is determined based on states of one or more cells near the target cell. The interference module is configured to generate interference values based on (i) the state of the target cell and (ii) the states of the one or more cells near the target cell. The programming module is further configured to determine the programming value based on at least one of the interference values selected according to (i) the state of the target cell and (ii) the states of the one or more cells near the target cell.
    Type: Grant
    Filed: October 3, 2011
    Date of Patent: January 22, 2013
    Assignee: Marvell International Ltd.
    Inventors: Zining Wu, Xueshi Yang, Pantas Sutardja
  • Patent number: 8358479
    Abstract: In a perpendicular magnetic recording system, the data that is being written by the write channel is fed back into the read channel. The read channel processes the data and decides if the written sequence is likely to have very poor DC characteristics. If that is the case, the write channel changes a scrambler seed and rewrites the data using the new scrambler seed. The data may also be inspected for patterns that might cause large baseline wander before being written to disk, i.e., in the write channel. A data sequence may be repeatedly scrambled and encoded until an acceptable level of estimated DC-wander has been achieved. The data sequence may then be written to disk.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: January 22, 2013
    Assignee: Marvell International Ltd.
    Inventors: Mats Oberg, Pantas Sutardja
  • Patent number: 8359498
    Abstract: A method of communicating a bitstream having a characteristic Hamming weight to a destination via a channel comprises determining the characteristic Hamming weight of the bitstream, inverting each bit in the bitstream if the characteristic Hamming weight of the bitstream is below a threshold value and developing an indication of whether the bits in the bitstream are inverted, delivering the bitstream and the indication of whether the bits in the bitstream are inverted to the destination via the channel, and inverting each bit in the bitstream at the destination if the indication indicates that the bits are inverted.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: January 22, 2013
    Assignee: Marvell International Ltd.
    Inventors: Pantas Sutardja, Toai Doan
  • Patent number: 8345522
    Abstract: A method of controlling a laser driver includes determining a set of timing parameters in response to contents of a received bit stream. The method further includes creating a plurality of sets of pulse defining parameters in response to the set of timing parameters, and generating a plurality of generic pulses in response to the plurality of sets of pulse defining parameters. The method also includes combining the plurality of generic pulses into a plurality of enable signals, and creating a plurality of adapted enable signals by selectively replacing one of the plurality of enable signals with an alternative signal. The method further includes outputting the plurality of adapted enable signals to the laser driver.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: January 1, 2013
    Assignee: Marvell International Ltd.
    Inventors: Pantas Sutardja, Yingxuan Li, Daniel Mumford
  • Patent number: 8341503
    Abstract: Methods and systems for storing data in a memory system with different levels of redundancy are disclosed. Methods and systems consistent with the present invention provide allow a redundancy level to be associated with received data, wherein associating the redundancy level of the data includes determining a desired level of protection for that data and determining the redundancy level based on the desired level of protection. A zone within a memory system is located that has a redundancy level that matches the redundancy level of the data, and the data is stored in the located zone with the desired redundancy level.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: December 25, 2012
    Assignee: Marvell International Ltd.
    Inventors: Tony Yoon, Pantas Sutardja
  • Publication number: 20120319621
    Abstract: A system includes a transformer. The transformer includes a first coil and a second coil. The first coil is configured to receive a first voltage based on an output of a switching circuit. The second coil is configured to generate a first current based on the first voltage to power a solid-state load. The system also includes a third coil. The third coil is configured to generate a second voltage based on the first voltage.
    Type: Application
    Filed: June 18, 2012
    Publication date: December 20, 2012
    Inventors: Sehat Sutardja, Pantas Sutardja, Wanfeng Zhang, Jinho Choi
  • Patent number: 8335138
    Abstract: A tracking system for a drive includes a beam positioning actuator and a control module. The beam positioning actuator is configured to radially displace a laser beam relative to an optical storage medium. The control module is configured to increase a seek speed of the beam positioning actuator to a predetermined speed based on a seek command signal to move the laser beam to a target position on the optical storage medium. The control module is also configured to reduce the seek speed of the beam positioning actuator from the predetermined speed responsive to the laser beam being radially displaced within a predetermined distance of the target position on the optical storage medium.
    Type: Grant
    Filed: November 7, 2011
    Date of Patent: December 18, 2012
    Assignee: Marvell International, Ltd.
    Inventor: Pantas Sutardja
  • Patent number: 8319524
    Abstract: An apparatus, method, and system for removing glitches from a clock signal, including a duty cycle lock loop (DCLL) circuit. A glitch, which may produce errors in the clock signal, may occur when a read channel transitions from an acquired clock signal to an adjusted clock signal. In one embodiment of the inventive deglitch circuit, a first capacitor is charged and discharged in response to an input clock signal, and an output clock signal is provided depending upon the first capacitor's voltage. The output clock signal further charges and discharges a second capacitor whose ratio of charge to discharge currents provides a signal to bias the discharge current of the first capacitor. A second DCLL circuit may be provided to restore the output clock signal duty cycle to the original clock signal duty cycle.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: November 27, 2012
    Assignee: Marvell International Ltd.
    Inventors: Chi Fung Cheng, Pantas Sutardja
  • Patent number: 8320860
    Abstract: Methods and apparatuses for quiet spot detection for radio frequency transmission thereon. According to various embodiments, a device may include a local receiver configured to evaluate one or more frequencies of a frequency band to determine a quiet spot frequency, the device further including a local transmitter configured to transmit signals at the quiet spot frequency.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: November 27, 2012
    Assignee: Marvell International Ltd.
    Inventors: Patrick Clement, Lydi Smaini, Pantas Sutardja
  • Patent number: 8316206
    Abstract: A memory control module includes a format module that communicates with a memory array that includes B memory blocks each including P physical pages and Q logical pages. The format module selects X predetermined locations to write pilot data and read-back pilot signals in each of the B memory blocks. B, P, Q and X are integers greater than or equal to 1. The memory control module also includes a signal processing module that compares the written pilot data to the read-back pilot signals and that determines variations between the written pilot data and the read-back pilot signals based on the comparison.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: November 20, 2012
    Assignee: Marvell World Trade Ltd.
    Inventors: Xueshi Yang, Zining Wu, Pantas Sutardja
  • Patent number: 8315106
    Abstract: A system including a wear-leveling module, a nonvolatile memory, and a control module. The wear-leveling module is configured to distribute write operations across a plurality of memory blocks of a memory, wherein the write operations include erase operations, and wherein charge decay in memory cells of one of the memory blocks depends on a number of erase operations performed on the one of the memory blocks. The nonvolatile memory is configured to store a count representing the erase operations performed on all of the memory blocks. The control module is configured to (i) determine charge decay in memory cells of all the memory blocks based on the count, and (ii) increase a charge level of the memory cells of the memory blocks based on the count.
    Type: Grant
    Filed: October 3, 2011
    Date of Patent: November 20, 2012
    Assignee: Marvell International Ltd.
    Inventor: Pantas Sutardja
  • Patent number: 8315007
    Abstract: Some of the embodiments of the present disclosure provide a disk drive system comprising a disk drive system comprising a disk having a track upon a surface of the disk, the track including a first data-storing sector and a second data storing sector, and a servo sector located between the first data-storing sector and the second data-storing sector, the servo sector including a first flying height (FH) field having a predetermined pattern. Other embodiments are also described and claimed.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: November 20, 2012
    Assignee: Marvell International Ltd.
    Inventors: Pantas Sutardja, Supaket Katchmart, Henri Sutioso, David Liaw
  • Publication number: 20120278545
    Abstract: A memory system including a nonvolatile memory, and a memory control module. The nonvolatile memory includes memory cells arranged among physical memory blocks, wherein each physical memory block is of a predetermined size. The memory control module includes a write path module and a read path module. In response to the memory control module receiving data in a first format such that the data is evenly distributable among the physical memory blocks, the write path module modifies the first format of the data into a second format prior to writing the data to the physical memory blocks. The second format of the data is such that the data is no longer evenly distributable among the physical memory blocks. The read path module is configured to read the data from the nonvolatile memory in accordance with the second format.
    Type: Application
    Filed: July 10, 2012
    Publication date: November 1, 2012
    Inventors: Zining Wu, Lau Nguyen, Pantas Sutardja, Chi-Kong Lee, Tony Yoon
  • Patent number: 8294503
    Abstract: A driver chain circuit and methods are provided. The driver chain circuit includes a plurality of voltage regulators and an inverter chain. The plurality of voltage regulators are operable to provide a bias to respective groups of one or more inverters within the inverter chain. The inverter chain includes a plurality of groups of one or more inverters. Each group of inverters is configured to receive a bias from a respective one of the plurality of voltage regulators.
    Type: Grant
    Filed: November 22, 2004
    Date of Patent: October 23, 2012
    Assignee: Marvell International Ltd.
    Inventors: Yonghua Song, Pantas Sutardja
  • Publication number: 20120262994
    Abstract: A memory system including a memory array, and a read write/module. The memory includes a plurality of bit lines, a plurality of word lines, and a plurality of memory cells, in which each memory cell is formed at a corresponding intersection of a bit line and a word line in the memory array. The read/write module is configured to control activation of at least two memory cells in the memory array during a read operation or a write operation, wherein the at least two memory cells activated by the read/write module are located on a different word line and a different bit line in the memory array, and wherein each memory cell coupled to a same bit line of the plurality of bit lines is configured to be written to or read from based on selection of the bit line.
    Type: Application
    Filed: June 19, 2012
    Publication date: October 18, 2012
    Inventors: Pantas Sutardja, Winston Lee
  • Patent number: 8285980
    Abstract: A system-on-a-chip includes a first memory and a processor. The first memory is configured to store a boot code. The processor is configured to (i) access the first memory, and (ii) execute the boot code when booting up. The processor is configured to, while booting up, determine whether a first one-time-programmable memory has been previously programmed based on the boot code. The processor is configured to, in response to the first one-time-programmable memory not having been previously programmed based on the boot code, (i) load firmware from a second memory into a third memory, and (ii) execute the firmware loaded into the third memory. The processor is configured to, in response to the first one-time-programmable memory having been previously programmed, verify a digital signature of the firmware.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: October 9, 2012
    Assignee: Marvell International Ltd.
    Inventors: Weishi Feng, Marcus Carlson, Pantas Sutardja, Bin Ni
  • Patent number: 8279984
    Abstract: A system includes a first filter generating a first output signal based on an input signal. The first filter includes N tap weight coefficients, where N is an integer greater than 1. A first device updates the N tap weight coefficients of the first filter. A second filter generates a second output signal in response to the first output signal. The second filter includes M tap weight coefficients, where M is an integer greater than 1 and less than N. A second device determines a value of a first one of the M tap weight coefficients for each of multiple sampling times of the input signal. The second device updates the first one of the M tap weight coefficients based on the values of the first one of the M tap weight coefficients, a first gain constant, and a change in timing phase error of the first filter.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: October 2, 2012
    Assignee: Marvell International, Ltd.
    Inventor: Pantas Sutardja