Patents by Inventor Paolo Faraboschi

Paolo Faraboschi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160085653
    Abstract: According to an example, a resiliency group for a memory node in a memory network can provide error correction for a memory access in the memory node. The memory access may be received from a main memory controller of a processor connected to the memory network. The memory access may be executed by a memory controller of the memory node.
    Type: Application
    Filed: April 30, 2013
    Publication date: March 24, 2016
    Inventors: Sheng Li, Norman Paul Jouppi, Paolo Faraboschi, Doe Hyun Yoon, Dwight L. Barron
  • Publication number: 20160055095
    Abstract: A method for performing memory operations is provided. One or more processors can determine that at least a portion of data stored in a cache memory of the one or more processors is to be stored in the main memory. One or more ranges of addresses of the main memory is determined that correspond to a plurality of cache lines in the cache memory. A set of cache lines corresponding to addresses in the one or more ranges of addresses is identified, so that data stored in the identified set can be stored in the main memory. For each cache line of the identified set having data that has been modified since that cache line was first loaded to the cache memory or since a previous store operation, data stored in that cache line is caused to be stored in the main memory.
    Type: Application
    Filed: March 28, 2013
    Publication date: February 25, 2016
    Inventors: Paolo Faraboschi, Hans Boehm, Dhruva Chakrabarti, Naveen Muralimanohar
  • Publication number: 20160034195
    Abstract: According to an example, a memory network includes memory nodes. The memory nodes may each include memory and control logic. The control logic may operate the memory node as a destination for a memory access invoked by a processor connected to the memory network and may operate the memory node as a router to route data or memory access commands to a destination in the memory network.
    Type: Application
    Filed: April 30, 2013
    Publication date: February 4, 2016
    Inventors: Sheng Li, Norman P. Jouppi, Paolo Faraboschi, Michael R. Krause
  • Publication number: 20150350381
    Abstract: Systems and methods of vertically aggregating tiered servers in a data center are disclosed. An example method includes partitioning a plurality of servers in the data center to form an array of aggregated end points (AEPs). Multiple servers within each AEP are connected by an intra-AEP network fabric and different AEPs are connected by an inter-AEP network. Each AEP has one or multiple central hub servers acting as end-points on the inter-AEP network. The method includes resolving a target server identification (ID). If the target server ID is the central hub server in the first AEP, the request is handled in the first AEP. If the target server ID is another server local to the first AEP, the request is redirected over the intra-AEP fabric. If the target server ID is a server in a second AEP, the request is transferred to the second AEP.
    Type: Application
    Filed: January 15, 2013
    Publication date: December 3, 2015
    Inventors: Jichuan Chang, Paolo Faraboschi, Parthasarathy Ranganathan
  • Patent number: 9184982
    Abstract: Methods, systems, and machine-readable and executable instructions are provided for balancing the allocation of a number of virtual machines (VMs) in clouds systems. Balancing the allocation of VMs in cloud systems can include determining a number of relationships of a plurality of nodes in a cloud system. Balancing the allocation of VMs in cloud systems can include assigning a number of VMs to the plurality of nodes in response to a request based on a criteria of the request and the number of relationships of the plurality of nodes to balance VMs in the cloud system, where the criteria include a type and a priority for each of the number of VMs.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: November 10, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Abhishek Gupta, Dejan S. Milojicic, Paolo Faraboschi
  • Patent number: 9143403
    Abstract: Example embodiments relate to autonomous metric tracking and adjustment. In some examples, a computing node may include a processor to run a main operating system and an application that runs on top of the main operating system. The computing node may include a hardware-level controller that dynamically adjusts individual hardware components of the computing node via control signals that do not pass through the main operating system. The adjustments may be based on a target metric from a scheduling service external to the computing node and individual performance metrics from the computing node.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: September 22, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paolo Faraboschi, Dejan S Milojicic, Dwight L Barron
  • Patent number: 9098581
    Abstract: Example methods for finding a text reading order in a document are described in which text zones are determined, the text zones are clustered using semantic measure and correlation and a reading order is found within each of the clusters.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: August 4, 2015
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Sherif Yacoub, Daniel Ortega, Paolo Faraboschi, Jose Abad Peiro
  • Patent number: 9063750
    Abstract: The mapping of High Performance Computing (“HPC”) applications to platforms is provided. An HPC application characterization module determines an HPC application signature to characterize the HPC application. An HPC application mapping module selects a platform from a plurality of platforms to execute the HPC application based on the HPC application signature and a set of benchmarks. An HPC application monitoring module monitors the execution of the HPC application on the selected platform.
    Type: Grant
    Filed: February 1, 2012
    Date of Patent: June 23, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Abhishek Gupta, Dejan S Milojicic, Paolo Faraboschi
  • Publication number: 20150074456
    Abstract: Versioned memories using a multi-level cell (MLC) are disclosed. An example method includes comparing a global memory version to a block memory version, the global memory version corresponding to a plurality of memory blocks, the block memory version corresponding to one of the plurality of memory blocks. The example method includes determining, based on the comparison, which level in a multi-level cell of the one of the plurality of memory blocks stores checkpoint data.
    Type: Application
    Filed: March 2, 2012
    Publication date: March 12, 2015
    Inventors: Doe Hyun Yoon, Jichuan Chang, Naveen Muralimanohar, Robert Schreiber, Paolo Faraboschi, Parthasarathy Ranganathan
  • Patent number: 8948511
    Abstract: An automated document processing system is configured to normalize zones obtained from a document, and to extract articles from the normalized zones. In one configuration, the system receives at least one zone from the document, and applies at least one zone-breaking factor, thereby creating normalized sub-zones within which text lines are consistent with the at least one zone-breaking factor. The normalized sub-zones may be evaluated to obtain a reading order. Adjacent sub-zones are joined if text similarity exceeds a threshold value. Weakly joined sub-zones are separated where indicated by a topic vectors analysis of the weakly joined sub-zones.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: February 3, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Daniel Ortega, Sherif Yacoub, Jose Abad Peiro, Paolo Faraboschi
  • Publication number: 20150026318
    Abstract: Examples of the present disclosure include methods, devices, and/or systems. Identifying network communication patterns can include analyzing a distributed computer program of a network, estimating virtual network communication traffic based on the analysis, and mapping the virtual network communication traffic to a physical network link. Identifying network communications patterns can also include identifying the network communication pattern and categorizing the physical communication network link based on an estimated communication intensity of the mapped communication traffic and the network communication pattern. Identifying network communication patterns can further include optimizing an energy used by the network based on the categorization.
    Type: Application
    Filed: April 24, 2012
    Publication date: January 22, 2015
    Inventors: Paolo Faraboschi, Moray McLaren, Dejan S. Milojicic, Robert Schreiber
  • Publication number: 20140379889
    Abstract: Example embodiments relate to autonomous metric tracking and adjustment. In some examples, a computing node may include a processor to run a main operating system and an application that runs on top of the main operating system. The computing node may include a hardware-level controller that dynamically adjusts individual hardware components of the computing node via control signals that do not pass through the main operating system. The adjustments may be based on a target metric from a scheduling service external to the computing node and individual performance metrics from the computing node.
    Type: Application
    Filed: June 19, 2013
    Publication date: December 25, 2014
    Inventors: Paolo Faraboschi, Dejan S Milojicic, Dwight L Barron
  • Publication number: 20140351495
    Abstract: Local checkpointing using a multi-level call is described herein. An example method includes storing a first datum in a first level of a multi-level cell. A second datum is stored in a second level of the multi-level cell, the second datum representing a checkpoint of the first datum. The first datum is copied from the first level to the second level of the multi-level cell to create the checkpoint.
    Type: Application
    Filed: April 27, 2012
    Publication date: November 27, 2014
    Inventors: Doe Hyun Yoon, Robert Schreiber, Paolo Faraboschi, Jichuan Chang, Naveen Muralimanohar, Parthasarathy Ranganathan
  • Patent number: 8812400
    Abstract: In a method for managing a memory segment through use of a memory virtual appliance, data is encapsulated with the memory virtual appliance, in which the memory virtual appliance comprises a virtual machine configured to manage a memory segment in a physical memory. In addition, the memory virtual appliance is implemented using a virtualization wrapper comprising computer readable code enabling the encapsulated data to be shared among a plurality of clients. Moreover, the encapsulated data is stored in the memory segment controlled by the memory virtual appliance.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: August 19, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paolo Faraboschi, Moray McLaren, Antonio Lain, Jose Renato G. Santos
  • Publication number: 20140201371
    Abstract: Methods, systems, and machine-readable and executable instructions are provided for balancing the allocation of a number of virtual machines (VMs) in clouds systems. Balancing the allocation of VMs in cloud systems can include determining a number of relationships of a plurality of nodes in a cloud system. Balancing the allocation of VMs in cloud systems can include assigning a number of VMs to the plurality of nodes in response to a request based on a criteria of the request and the number of relationships of the plurality of nodes to balance VMs in the cloud system, where the criteria include a type and a priority for each of the number of VMs.
    Type: Application
    Filed: January 15, 2013
    Publication date: July 17, 2014
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Abhishek Gupta, Dejan S. Milojicic, Paolo Faraboschi
  • Publication number: 20140195673
    Abstract: Systems, methods, and machine-readable and executable instructions are provided for dynamically balancing execution resources to meet a budget and/or a QoS of projects. An example method can include analyzing a submitted program for a project, where the program comprises data to execute the project and a specification for the project, determining a computing resource allocation based upon the submitted data and the specification, and deploying for execution the submitted data to the determined computing resource allocation. The method can include monitoring progress during the execution of the data to determine a probability of project completion satisfying the specification, and dynamically balancing the execution resources to meet the budget and/or the QoS of the project to satisfy the specification.
    Type: Application
    Filed: January 10, 2013
    Publication date: July 10, 2014
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Nigel T. Cook, Paolo Faraboschi, Dejan S. Milojicic
  • Patent number: 8516271
    Abstract: Methods, apparatus and articles of manufacture to secure non-volatile memory regions are disclosed. An example method disclosed herein comprises associating a first key pair and a second key pair different than the first key pair with a process, using the first key pair to secure a first region of a non-volatile memory for the process, and using the second key pair to secure a second region of the non-volatile memory for the same process, the second region being different than the first region.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: August 20, 2013
    Assignee: Hewlett-Packard Development Company, L. P.
    Inventors: Paolo Faraboschi, Parthasarathy Ranganathan, Naveen Muralimanohar
  • Publication number: 20130198723
    Abstract: The mapping of High Performance Computing (“HPC”) applications to platforms is provided. An HPC application characterization module determines an HPC application signature to characterize the HPC application. An HPC application mapping module selects a platform from a plurality of platforms to execute the HPC application based on the HPC application signature and a set of benchmarks. An HPC application monitoring module monitors the execution of the HPC application on the selected platform.
    Type: Application
    Filed: February 1, 2012
    Publication date: August 1, 2013
    Inventors: Abhishek Gupta, Dejan S. Milojicic, Paolo Faraboschi
  • Patent number: 8392168
    Abstract: One example embodiment is a method that simulates a sampling period of an application to collect execution counts of basic blocks and compute cycles per instruction (CPI) data. A non-sampling period of the application is simulated to collect execution counts of basic blocks, and a comparison of the execution counts collected during the sampling period is performed to the execution counts collected during the non-sampling period. Based on the comparison, a determination is made whether to estimate CPI for the basic blocks during the non-sampling period using the CPI data collected during the sampling period.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: March 5, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ayose Falcon Samper, Paolo Faraboschi
  • Patent number: 8296496
    Abstract: One embodiment is main memory that includes a combination of non-volatile memory (NVM) and dynamic random access memory (DRAM). An operating system migrates data between the NVM and the DRAM.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: October 23, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey Clifford Mogul, Eduardo Argollo de Oliveira Dias, Jr., Paolo Faraboschi, Mehul A. Shah