Patents by Inventor Pei Yu

Pei Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145319
    Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.
    Type: Application
    Filed: January 2, 2024
    Publication date: May 2, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tsung-Yu LIN, Pei-Yu WANG, Chung-Wei HSU
  • Publication number: 20240145535
    Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate, an interlayer dielectric (ILD), and a conductive layer. The ILD is disposed on the substrate. The conductive layer is disposed on the substrate and spaced apart from the ILD by an air gap. The ILD is tapered toward the substrate.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: PEI-YU CHOU, TZE-LIANG LEE
  • Publication number: 20240139417
    Abstract: The application describes syringe carriers for medicament delivery devices such as autoinjectors. In particular, a medicament delivery device sub-assembly is described. The medicament delivery device sub-assembly has a housing extending along a longitudinal axis from a proximal end to a distal end, the housing has a tubular section with an internal surface facing towards the axis and an external surface facing away from the axis, wherein the housing has an aperture extending through the tubular section from the internal surface to the external surface; and a housing cover assembly attached in the aperture of the housing, the housing cover assembly being configured to secure a syringe in place relative to the housing.
    Type: Application
    Filed: February 4, 2022
    Publication date: May 2, 2024
    Inventors: Chia-Hsin Su, Nurettin Ali, Antonio Farieta, Meng-Jhen Chiou, Pei Yu Chao, Jason Mondro
  • Patent number: 11973027
    Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pei-Yu Chou, Jr-Hung Li, Liang-Yin Chen, Su-Hao Liu, Tze-Liang Lee, Meng-Han Chou, Kuo-Ju Chen, Huicheng Chang, Tsai-Jung Ho, Tzu-Yang Ho
  • Patent number: 11969874
    Abstract: A transmission device for lifting a sickbed contains a first casing, a second casing, a power input assembly, a power output assembly, and multiple screw elements. The first casing includes a first rotatable connection portion, a second rotatable connection portion, a first space, and multiple locking orifices. The second casing includes a third rotatable connection portion, a fourth rotatable connection portion, a second space, and multiple coupling orifices. The power input assembly includes an input shaft and a first bevel gear. The power output assembly includes an output shaft and a second bevel gear. The multiple screw elements are inserted through the multiple coupling orifices of the second casing to screw with the multiple locking orifices of the first casing.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: April 30, 2024
    Assignee: NANTONG SHUNLONG PHYSICAL THERAPY EQUIP. CO., LTD.
    Inventor: Pei-Yu Hsu
  • Publication number: 20240130714
    Abstract: Disclosed are computer-implemented or computer-aided method for diagnosing or predicting the risk of obstructive sleep apnea in a subject. The methods comprise determining whether the subject has obstructive sleep apnea based on at least one quantitative ultrasound parameter and/or at least one morphometric parameter.
    Type: Application
    Filed: May 16, 2023
    Publication date: April 25, 2024
    Applicant: AMCAD BIOMED CORPORATION
    Inventors: Argon CHEN, Yi-li LEE, Pei-Yu CHAO, Wei-Hao CHEN, Wei-Yu HSU
  • Publication number: 20240128231
    Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are presented. In embodiments the methods of manufacturing include depositing a first bonding layer on a first substrate, wherein the first substrate comprises a semiconductor substrate and a metallization layer. The first bonding layer and the semiconductor substrate are patterned to form first openings. A second substrate is bonded to the first substrate. After the bonding the second substrate, the second substrate is patterned to form second openings, at least one of the second openings exposing at least one of the first openings. After the patterning the second substrate, a third substrate is bonded to the second substrate, and after the bonding the third substrate, the third substrate is patterned to form third openings, at least one of the third openings exposing at least one of the second openings.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 18, 2024
    Inventors: Fu Wei Liu, Pei-Wei Lee, Yun-Chung Wu, Bo-Yu Chiu, Szu-Hsien Lee, Mirng-Ji Lii
  • Publication number: 20240126067
    Abstract: A color wheel module and a projector are provided. The projector includes the color wheel module, and the color wheel module includes a disk, an isolation framework, an assembly member, and an adhesive filler. The disk is configured to rotate around an axis. The isolation framework and the assembly member are disposed on the disk. The isolation framework is located between the disk and the assembly member. An air layer is formed between the assembly member and the isolation framework. The adhesive filler is disposed on the assembly member.
    Type: Application
    Filed: December 12, 2023
    Publication date: April 18, 2024
    Applicant: Coretronic Corporation
    Inventor: Pei-Yu Hsu
  • Patent number: 11960167
    Abstract: A backplane includes: a substrate including a circuit structure layer, a first reflective layer disposed on a bearing surface of the substrate, a plurality of light-emitting diode chips, and a plurality of optical structures. The first reflective layer includes a plurality of through holes spaced apart. A light-emitting diode chip in the plurality of light-emitting diode chips is located in one of the plurality of through holes. The plurality of light-emitting diode chips are electrically connected to the circuit structure layer. The circuit structure layer is configured to drive the plurality of light-emitting diode chips to emit light. An optical structure in the plurality of optical structures covers the light-emitting diode chip, a light incident surface of the optical structure is in contact with a light exit surface of the light-emitting diode chip, and a light exit surface of the optical structure is a curved surface.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: April 16, 2024
    Assignees: BOE MLED Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pei Li, Haiwei Sun, Ming Zhai, Lu Yu, Kangle Chang, Jinpeng Li, Pengjun Cao, Yutao Hao, Shubai Zhang, Shuo Wang, Pei Qin, Zewen Gao, Yali Zhang
  • Publication number: 20240117297
    Abstract: A p-aminobenzoic acid-producing microorganism is provided. The p-aminobenzoic acid-producing microorganism is obtained by a method for preparing a p-aminobenzoic acid-producing microorganism. The method for preparing a p-aminobenzoic acid-producing microorganism includes (a) performing an acclimation process on a source microorganism with at least one sulfonamide antibiotic to obtain at least one acclimatized microorganism and (b) screening out at least one p-aminobenzoic acid-producing microorganism from the at least one acclimatized microorganism, wherein the at least one p-aminobenzoic acid-producing microorganism has a higher p-aminobenzoic acid titer than the source microorganism.
    Type: Application
    Filed: December 29, 2022
    Publication date: April 11, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Pei-Ching CHANG, Jhong-De LIN, Ya-Lin LIN, Hung-Yu LIAO, Hsiang Yuan CHU, Jie-Len HUANG
  • Publication number: 20240120325
    Abstract: A stacked package structure and a manufacturing method thereof are provided. The stacked package structure includes an upper redistribution layer, a first chip, and an upper molding layer. The first chip is disposed on the upper redistribution layer and is electrically connected to the upper redistribution layer. The upper molding layer is disposed on the first chip and the upper redistribution layer, and is configured to package the first chip. The upper molding layer includes a recess, the recess is recessed relative to a surface of the upper molding layer away from the upper redistribution layer, and the recess is circumferentially formed around a periphery of the upper molding layer.
    Type: Application
    Filed: May 31, 2023
    Publication date: April 11, 2024
    Applicant: POWERTECH TECHNOLOGY INC.
    Inventors: Pei-chun TSAI, Hung-hsin HSU, Shang-yu CHANG CHIEN, Chia-ling LEE
  • Patent number: 11947103
    Abstract: A color wheel module and a projector are provided. The projector includes the color wheel module, and the color wheel module includes a disk, an isolation framework, an assembly member, and a colloidal filler. The disk is configured to rotate around an axis. The isolation framework and the assembly member are disposed on the disk. The isolation framework is located between the disk and the assembly member. An air layer is formed between the disk, the assembly member and the isolation framework. The colloidal filler is disposed on the assembly member.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: April 2, 2024
    Assignee: Coretronic Corporation
    Inventor: Pei-Yu Hsu
  • Publication number: 20240105847
    Abstract: A method for forming a semiconductor arrangement comprises forming a fin over a semiconductor layer. A gate structure is formed over a first portion of the fin. A second portion of the fin adjacent to the first portion of the fin and a portion of the semiconductor layer below the second portion of the fin are removed to define a recess. A stress-inducing material is formed in the recess. A first semiconductor material is formed in the recess over the stress-inducing material. The first semiconductor material is different than the stress-inducing material.
    Type: Application
    Filed: December 11, 2023
    Publication date: March 28, 2024
    Inventors: Pei-Yu WANG, Sai-Hooi YEONG
  • Publication number: 20240105794
    Abstract: An integrated circuit includes a semiconductor nanostructure transistor. The semiconductor nanostructure transistor includes a plurality of semiconductor nanostructures corresponding to channel regions conductor Nanostructure transistor. A gate metal surrounds the semiconductor nanostructures. The gate metal has differing gate length dimension above the semiconductor nanostructures compared to the gate length between the semiconductor nanostructures.
    Type: Application
    Filed: February 13, 2023
    Publication date: March 28, 2024
    Inventor: Pei-Yu WANG
  • Patent number: 11942523
    Abstract: In an embodiment, a device includes: a first nanostructure over a substrate, the first nanostructure including a channel region and a first lightly doped source/drain region, the first lightly doped source/drain region adjacent the channel region; a first epitaxial source/drain region wrapped around four sides of the first lightly doped source/drain region; an interlayer dielectric over the first epitaxial source/drain region; a source/drain contact extending through the interlayer dielectric, the source/drain contact wrapped around four sides of the first epitaxial source/drain region; and a gate stack adjacent the source/drain contact and the first epitaxial source/drain region, the gate stack wrapped around four sides of the channel region.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sai-Hooi Yeong, Pei-Yu Wang, Chi On Chui
  • Patent number: 11942530
    Abstract: The present disclosure relates to a semiconductor device having a backside source/drain contact, and method for forming the device. The semiconductor device includes a source/drain feature having a top surface and a bottom surface, a first silicide layer formed in contact with the top surface of the source/drain feature, a first conductive feature formed on the first silicide layer, and a second conductive feature having a body portion and a first sidewall portion extending from the body portion, wherein the body portion is below the bottom surface of the source/drain feature, and the first sidewall portion is in contact with the first conductive feature.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Yuan Chen, Pei-Yu Wang, Huan-Chieh Su, Chih-Hao Wang
  • Publication number: 20240097001
    Abstract: A semiconductor device according to the present disclosure includes a vertical stack of channel members, a gate structure over and around the vertical stack of channel members, and a first source/drain feature and a second source/drain feature. Each of the vertical stack of channel members extends along a first direction between the first source/drain feature and the second source/drain feature. Each of the vertical stack of channel members is spaced apart from the first source/drain feature by a silicide feature.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventor: Pei-Yu Wang
  • Publication number: 20240093345
    Abstract: The present disclosure provides a fixed-position defect doping method for a micro-nanostructure based on a self-alignment process, including: S1, sequentially forming a sacrificial layer and a photoresist layer on a surface of a crystal substrate; S2, performing a lithography on the photoresist layer to form a mask hole according to a micro-nano pattern; S3, performing an isotropic etching on the sacrificial layer through the mask hole, and amplifying the micro-nano pattern to the sacrificial layer; S4, performing an ion implantation doping on an exposed crystal surface below the mask hole; S5, removing the photoresist layer, and depositing a mask material; S6, removing the sacrificial layer, and transferring a micro-nano amplified pattern in the sacrificial layer to a mask material pattern; and S7, etching an exposed crystal surface, and removing the mask material on the surface and forming a specific defect by annealing.
    Type: Application
    Filed: November 30, 2020
    Publication date: March 21, 2024
    Inventors: Mengqi Wang, Ya Wang, Haoyu Sun, Xiangyu Ye, Pei Yu, Hangyu Liu, Pengfei Wang, Fazhan Shi, Jiangfeng Du
  • Publication number: 20240096498
    Abstract: A method for evaluating a risk of a subject getting a specific disease includes steps of: storing a reference database that contains original parameter sets; selecting target alleles from an SNP profile derived from genome sequencing data of a subject; selecting target parameter sets from among the original parameter sets; calculating, for each of the target parameter sets, a race factor based on a global risk allele frequency and a group-specific risk allele frequency included in the target parameter set; calculating a genetic factor based on statistics, global reference allele frequencies, the race factors for the target parameter sets, and numbers of chromosomes in homologous chromosome pairs included in the target parameter sets; calculating a citation factor based on numbers of citation times included in the target parameter sets; and calculating a risk score based on the genetic factor and the citation factor.
    Type: Application
    Filed: August 28, 2023
    Publication date: March 21, 2024
    Inventors: Yi-Ting CHEN, Sing-Han HUANG, Ching-Yung LIN, Xiang-Yu LIN, Cheng-Tang WANG, Raksha NANDANAHOSUR RAMESH, Pei-Hsin CHEN
  • Patent number: D1024352
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: April 23, 2024
    Inventors: Chien-Yu Peng, Pei-Hsiu Kao, Ching-Yu Chang