Patents by Inventor Pei Yu

Pei Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12276605
    Abstract: The present disclosure provides a detection and analysis method for rapid delineation of aging stages of styrene-butadiene-styrene (SBS) modified asphalt, including the following steps: performing a Fourier transform infrared spectroscopy (FTIR) test on unaged SBS-modified asphalt samples to obtain a copolymer index of IB0/S0 and neat asphalt functional group indexes, including the SI0, IB, aI0, ARI0, and CI0; performing the FTIR test on the aged SBS-modified asphalt samples to obtain an actual index of IB/S, SI, IB, aI, ARI, and CI; and delineating three aging stages of SBS-modified asphalt, including a polymer swelling stage, a polymer degradation stage and a component imbalance stage according to changes of functional group indexes. According to the present disclosure, the actual aging stages of the SBS-modified asphalt can be determined rapidly and accurately, providing a reasonable basis for the decision on pavement maintenance timing and mode.
    Type: Grant
    Filed: October 28, 2024
    Date of Patent: April 15, 2025
    Assignee: Huazhong University of Science and Technology
    Inventors: Derun Zhang, Peixin Xu, Ziyang Liu, Dongxing Luan, Zheng Liu, Yichen Guo, Pei Yu, Jinbiao Tang, Qisheng Hu, Chenhui Peng
  • Patent number: 12276881
    Abstract: A light-emitting substrate includes a substrate and a plurality of light-emitting assemblies. The plurality of light-emitting assemblies are located on a side of the substrate. At least one light-emitting assembly includes a light-emitting element and a light adjustment portion arranged around the light-emitting element. The light adjustment portion includes a plurality of sub-structures spaced apart from each other. In any two sub-structures in the light adjustment portion in any direction away from the light-emitting element, a height of a sub-structure closer to the light-emitting element is less than a height of a sub-structure farther from the light-emitting element.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: April 15, 2025
    Assignees: BOE MLED TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pei Qin, Yutao Hao, Hao Zhou, Donglei Li, Ying Chen, Honghao Yu, Jie Gao, Jiaxin Li, Jingran Niu, Jinpeng Li
  • Patent number: 12266114
    Abstract: An image processing method and apparatus, a device, and a storage medium. The image processing method includes: performing preliminary segmentation recognition on a raw image by using a first segmentation model to obtain a candidate foreground image region and a candidate background image region of the raw image; recombining the candidate foreground image region, the candidate background image region, and the raw image to obtain a recombined image, pixels in the recombined image being in a one-to-one correspondence with pixels in the raw image; and performing region segmentation recognition on the recombined image by using a second segmentation model to obtain a target foreground image region and a target background image region of the raw image.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: April 1, 2025
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Rui Zhang, Pei Cheng, Gang Yu, Bin Fu
  • Patent number: 12266188
    Abstract: A method of determining the position of a vehicle includes generating a vehicle-based point cloud of objects in proximity to the vehicle, referenced to a vehicle-based coordinate system. The method also includes receiving an infrastructure-based point cloud, referenced to a global coordinate system, of objects detected by a camera mounted at a fixed location external to the vehicle, and registering the vehicle-based point cloud with the infrastructure-based point cloud to determine the vehicle position in the global coordinate system.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: April 1, 2025
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Bo Yu, Kamran Ali, Vivek Vijaya Kumar, Curtis L. Hay, Pei Xu, Hariharan Krishnan
  • Publication number: 20250103284
    Abstract: An electronic device includes a first buffer, a second buffer, and a multiplexer. The first buffer receives and stores first data when the first buffer is not full, and performs a First-In-First-Out (FIFO) operation on the first data. The second buffer receives and stores second data when the first buffer is full, and performs the FIFO operation on the second data. The multiplexer is electrically connected between the first buffer and the second buffer. The multiplexer receives the first data from outside of the electronic device, or it receives the second data from the second buffer. A depth of the first buffer is less than that of the second buffer.
    Type: Application
    Filed: September 12, 2024
    Publication date: March 27, 2025
    Inventors: Ming-Hung HSIEH, Pei-Lun WU, Hsin-Yu CHANG, Yu-Cheng WU
  • Patent number: 12261089
    Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.
    Type: Grant
    Filed: January 2, 2024
    Date of Patent: March 25, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Tsung-Yu Lin, Pei-Yu Wang, Chung-Wei Hsu
  • Publication number: 20250094267
    Abstract: A time series anomaly detection method, system, and computer program product that processes time series data includes absorbing profiles of the time series data and anomaly types of a model as features, optimizing biased ranks to create optimized ranks through merging initial ranks with new ranks generated by real anomalies, and auto-suggesting the optimized ranks for saving a predetermined amount of data operation.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Inventors: Jun Wang, Jing Xu, Xiao Ming Ma, Xue Ying Zhang, Si Er Han, Jing James Xu, Wen Pei Yu
  • Publication number: 20250095690
    Abstract: Provided are systems and methods for the automatic generation of support videos from a source video. For example, the support video can more deeply explain or elaborate upon content included in source video. In particular, a computing system can obtain a source video and extract one or more sets of textual content associated with the source video. For example, the sets of textual content can include a transcript of speech that occurs within the source video. The computing system can process the one or more sets of textual content with a generative sequence processing model to generate, as an output of the generative sequence processing model, additional textual content for a support video.
    Type: Application
    Filed: September 16, 2024
    Publication date: March 20, 2025
    Inventors: Pei-Yu Chi, Sen-Po Hu, Irfan Aziz Essa, Tao Dong
  • Publication number: 20250085216
    Abstract: An examining method for a coating layer on a wafer is provided, including providing an incident light to the coating layer and generating a reflecting light after the coating layer receives the incident light. A spectral analysis of the reflecting light is then generated and compared with a first reference waveform to determine a material of the coating layer. Moreover, the spectral analysis may be further compared with a second reference waveform to determine a thickness of the coating layer. The incident light and reflecting light are provided and received by a spectroscope which is placed above on the wafer to provide perpendicular optical paths to the coating layer on the upper surface of the wafer. By employing the disclosed method, the material and thickness of the coating layer on the wafer can be examined and further classified so as to enhance the conventional efficiency in the prior arts.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 13, 2025
    Inventors: PEI-HSUAN CHIANG, CHENG-YU CHUNG
  • Publication number: 20250085521
    Abstract: A teleprompter includes an accommodating space and an optical assembly disposed in the accommodating space. The accommodating space is configured for accommodating an electronic device including an image display unit and a lens. The image display unit is configured to emit a light along a first path. The optical assembly includes a light-reflecting unit and a beam-splitting unit. The light-reflecting unit is configured to divert the light from the first path to a second path and has a first light-reflecting portion disposed on the first path. The beam-splitting unit is disposed on the second path and is configured to allow a first portion of the light to transmit and divert a second portion of the light from the second path to a third path. The third path has a same direction as a direction of an optic axis of the lens.
    Type: Application
    Filed: July 17, 2024
    Publication date: March 13, 2025
    Inventors: Tzu-Chieh HUNG, Jhih-Yu CHEN, Pei-Chun LAI
  • Publication number: 20250088002
    Abstract: A power system includes an energy storage system having a rechargeable energy storage element and a converter connected to the rechargeable energy storage element and configured to connect to a bus so that the energy storage system is connected in parallel with a load and a main power supply system. The energy storage system may cooperate with the main power supply system to supply power to the load with each of the energy storage system and the main power supply system configured as a voltage source with a corresponding droop function. The system may include a control circuit configured to monitor a voltage of the bus and control the converter to either charge or discharge the rechargeable energy storage element based on the voltage of the bus.
    Type: Application
    Filed: September 6, 2024
    Publication date: March 13, 2025
    Applicant: Flex Ltd.
    Inventors: James P. Novak, Yi Yuan Chung, Alexei Tikhonski, James E. Nelson, Guy Raz, Igor Pavolvsky, Robert L. Myers, Pei Chiao Chung, Sung Hsiang Tsang, Guanshiun Wang, Vern Chen, Sheldon Liu, Miler Li, Deng Yu Tsai
  • Patent number: 12249575
    Abstract: An integrated circuit (IC) structure includes a gate structure, a source epitaxial structure, a drain epitaxial structure, a front-side interconnection structure, a backside dielectric layer, an epitaxial regrowth layer, and a backside via. The source epitaxial structure and the drain epitaxial structure are respectively on opposite sides of the gate structure. The front-side interconnection structure is over a front-side of the source epitaxial structure and a front-side of the drain epitaxial structure. The backside dielectric layer is over a backside of the source epitaxial structure and a backside of the drain epitaxial structure. The epitaxial regrowth layer is on the backside of a first one of the source epitaxial structure and the drain epitaxial structure. The backside via extends through the backside dielectric layer and overlaps the epitaxial regrowth layer.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: March 11, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pei-Yu Wang, Yu-Xuan Huang
  • Patent number: 12249012
    Abstract: A method, computer system, and a computer program product are provided for post-modeling feature evaluation. In one embodiment, at least at least one post model visual output and associated data is obtained that at least includes an individual conditional expectation (ICE) plot and a partial dependence (PDP) plot. Using the associated data and the plots, a Feature Importance (PI) plot is provided. A plurality of features is then determined for each PI, PDP and ICE plots to calculate at least one Interesting Value for each plot. An overall score is also calculated for each plurality of features based on the associated Interesting Values for each PDP, ICE and PI plots. At least one top feature is selected based on said scores. A final plot is then generated at least reflecting the top feature. The final plot combines the PI, PDP and ICE plots together.
    Type: Grant
    Filed: November 17, 2022
    Date of Patent: March 11, 2025
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Xiao Ming Ma, Wen Pei Yu, Jing James Xu, Xue Ying Zhang, Si Er Han, Jing Xu, Jun Wang
  • Publication number: 20250081692
    Abstract: Provided are a light emitting substrate, a method for manufacturing same, and a display apparatus. The light emitting substrate includes a base substrate; a plurality of light emitting units located at a side of the base substrate; a plurality of protective structures located at a side of the plurality of light emitting units facing away from the base substrate; the plurality of protective structures each covers a respective one of the plurality of light emitting units; and a plurality of reflective patterns located at a side of the plurality of protective structures facing away from the plurality of light emitting units; orthographic projections of the plurality of reflective patterns on the base substrate fall within orthographic projections of the plurality of protective structures on the base substrate.
    Type: Application
    Filed: May 27, 2022
    Publication date: March 6, 2025
    Inventors: Honghao YU, Yutao HAO, Donglei LI, Ying CHEN, Jie GAO, Jiaxin LI, Pei QIN, Lili JIA
  • Publication number: 20250077180
    Abstract: A digital compute-in-memory (DCIM) macro includes a memory cell array and an arithmetic logic unit (ALU). The memory cell array stores weight data of a neural network. The ALU receives parallel bits of a same input channel in an activation input, and generates a convolution computation output of the parallel bits and target weight data in the memory cell array.
    Type: Application
    Filed: August 30, 2024
    Publication date: March 6, 2025
    Applicant: MEDIATEK INC.
    Inventors: Ming-Hung Lin, Ming-En Shih, Shih-Wei Hsieh, Ping-Yuan Tsai, You-Yu Nian, Pei-Kuei Tsung, Jen-Wei Liang, Shu-Hsin Chang, En-Jui Chang, Chih-Wei Chen, Po-Hua Huang, Chung-Lun Huang
  • Publication number: 20250077282
    Abstract: A digital compute-in-memory (DCIM) system includes a first DCIM macro. The first DCIM macro includes a first memory cell array and a first arithmetic logic unit (ALU). The first memory cell array has N rows that are configured to store weight data of a neural network in a single weight data download session, wherein N is a positive integer not smaller than two. The first ALU is configured to receive a first activation input, and perform convolution operations upon the first activation input and a single row of weight data selected from the N rows of the first memory cell array to generate first convolution outputs.
    Type: Application
    Filed: August 30, 2024
    Publication date: March 6, 2025
    Applicant: MEDIATEK INC.
    Inventors: Ming-Hung Lin, Ming-En Shih, Shih-Wei Hsieh, Ping-Yuan Tsai, You-Yu Nian, Pei-Kuei Tsung, Jen-Wei Liang, Shu-Hsin Chang, En-Jui Chang, Chih-Wei Chen, Po-Hua Huang, Chung-Lun Huang
  • Patent number: 12242367
    Abstract: Disclosed are a computer-implemented method, a system and a computer program product for model exploration. Model feature importance of each model of a plurality of models can be obtained, the plurality of models can be grouped into a plurality of model clusters based on the model feature importance of each model, and the model feature importance can be presented by box-plot or confidence interval.
    Type: Grant
    Filed: May 15, 2022
    Date of Patent: March 4, 2025
    Assignee: International Business Machines Corporation
    Inventors: Jing Xu, Xue Ying Zhang, Si Er Han, Jing James Xu, Xiao Ming Ma, Jun Wang, Wen Pei Yu
  • Patent number: 12243940
    Abstract: A semiconductor structure includes a source/drain (S/D) feature disposed in a semiconductor layer, a metal gate stack (MG) disposed in a first interlayer dielectric (ILD) layer and adjacent to the S/D feature, a second ILD layer disposed over the MG, and an S/D contact disposed over the S/D feature. The semiconductor structure further includes an air gap disposed between a sidewall of a bottom portion of the S/D contact and the first ILD layer, where a sidewall of a top portion of the S/D contact is in direct contact with the second ILD layer.
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: March 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chao-Hsun Wang, Chen-Ming Lee, Kuo-Yi Chao, Mei-Yun Wang, Pei-Yu Chou, Kuo-Ju Chen
  • Patent number: D1067425
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: March 18, 2025
    Assignee: GENEREACH BIOTECHNOLOGY CORPORATION
    Inventors: Chi-Horng Bair, Wen-Shan Yang, Pei-Cheng Huang, Te-Yu Chung
  • Patent number: D1069164
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: April 1, 2025
    Assignee: GENEREACH BIOTECHNOLOGY CORPORATION
    Inventors: Chi-Horng Bair, Wen-Shan Yang, Pei-Cheng Huang, Te-Yu Chung