Abstract: A device includes a first semiconductor strip protruding from a substrate, a second semiconductor strip protruding from the substrate, an isolation material surrounding the first semiconductor strip and the second semiconductor strip, a nanosheet structure over the first semiconductor strip, wherein the nanosheet structure is separated from the first semiconductor strip by a first gate structure including a gate electrode material, wherein the first gate structure partially surrounds the nanosheet structure, and a first semiconductor channel region and a semiconductor second channel region over the second semiconductor strip, wherein the first semiconductor channel region is separated from the second semiconductor channel region by a second gate structure including the gate electrode material, wherein the second gate structure extends on a top surface of the second semiconductor strip.

Abstract: An anti-opening container includes a first box and a second box. The first box includes a first body, a first box section and a first gripping section. The first box section is formed by the extension of the first body. The second box includes a second body, a second box section, a second gripping section, an extension section, and a fastener section. The second box section is formed by the extension of the second body. The fastener section is connected to the extension section via a perforated line. The fastener section is embedded in the first box section. When the first gripping section and the second gripping section are displaced in opposite directions, the perforated line breaks, and the first box section and the fastener section are separated from the second box section together to separate the first box and the second box.

Abstract: This disclosure provides modified natural killer (NK) cells possessing both NK cell function and dendritic cell function and method of culturing the same. By administration of the modified NK cell, cancer cells in a subject may be effectively inhibited via cell-mediated immunity.

Abstract: The disclosure provides a communication system between dies and a repairing method for lanes between dies. The communication system includes a transmitting device disposed on a first die and a receiving device disposed on a second die. During the transmission process in which the transmitting device transmits a data unit stream to the receiving device through a native lane, after the native lane is determined to be a degraded lane, the transmitting device transmits a synchronization flag to the receiving device through a redundant lane to notify a repair time point. During the uninterrupted transmission process of the data unit stream, the transmitting device uses the redundant lane instead of the degraded lane based on the repair time point, and the receiving device uses the redundant lane instead of the degraded lane based on the repair time point notified by the synchronization flag.

Abstract: A transmitter for wireless communications includes an encoder, a normalizer, a binarizer, and a radio frequency (RF) circuit. The encoder is configured to encode a control message into a channel dimensional vector according to a channel dimension and the number of semantic fields by utilizing a training model. The control message includes at least one of control plane media access control layer information and control plane physical layer information. The normalizer is configured to normalize the channel dimensional vector to generate a normalized channel dimensional vector. The binarizer is configured to binarize the normalized channel dimensional vector to generate a fixed-point number. The RF circuit is configured to modulate the fixed-point number into an RF signal and transmit the RF signal.

Abstract: A semiconductor structure includes an epitaxial region having a front side and a backside. The semiconductor structure includes an amorphous layer formed over the backside of the epitaxial region, wherein the amorphous layer includes silicon. The semiconductor structure includes a first silicide layer formed over the amorphous layer. The semiconductor structure includes a first metal contact formed over the first silicide layer.

Abstract: This disclosure is directed to devices, systems, and techniques for enforcing access to resources within a computer network. In some examples, a system includes a network managed by a service provider and configured to provide a plurality of microservices to a plurality of tenants each having one or more users and a controller having access to the network. The controller is configured to output, to a user interface, data indicative of a plurality of capabilities for presentation by the user interface and receive, from the user interface, data indicative of a user selection of a set of capabilities and a user selection of a new role identifier. The controller is further configured to create, based on the set of capabilities and the role identifier, a role which enables access to a set of actions within a computer network, the set of actions corresponding to the set of capabilities.

Abstract: A computer-implemented method, a system and a computer program product for abnormal point simulation are disclosed. A processor analyzes a plurality of data blocks in first time series data to determine traits of respective data blocks. For the respective data blocks, a processor simulates one or more abnormal points based on the traits of the respective data blocks.

Abstract: A computer-implemented method for treating post-modeling data includes computing, sequentially for each category of a feature, a category importance (CI) value. The CI value is based on a model accuracy change when records of a category being examined are reassigned to a remaining set of categories of the feature according to a cumulative distribution of records among the remaining set of categories of the feature, wherein the remaining set of categories include all categories of the feature, except for the category being examined. A post-modeling category is performed to merge of each category having the CI value less than a CI value threshold.

Abstract: Base plates of a substrate retainer transportation mechanism are provided with damping members to assist elastic members in damping and limiting movement of the substrate retainer transportation mechanism when the substrate transportation mechanism is subjected to unwanted external forces, e.g., seismic forces. By damping and limiting movement of the substrate retainer transportation mechanism, undesirable damage to substrates contained in a substrate retainer being carried by the substrate retainer transport mechanism can be minimized.

Abstract: The technology is directed to artificial intelligence (AI) powered tools that can enhance existing digital video components and simplify and automate the creation of new digital video components. The technology includes a digital video component creation tool that leverages existing assets to generate digital video components, a voice-over tool that can add voice-overs, generated from text to, video components, and a video component evaluation tool that can evaluate video components for conformity with attributes associated with best practices for video creative s.

Abstract: A semiconductor device and method of manufacture which utilize isolation structures between semiconductor regions is provided. In embodiments different isolation structures are formed between different fins in different regions with different spacings. Some of the isolation structures are formed using flowable processes. The use of such isolation structures helps to prevent damage while also allowing for a reduction in spacing between different fins of the devices.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes channel layers, a mask structure, a gate structure and a source/drain pattern. The channel layers are stacked vertically apart along a first direction over a substrate. The mask structure is disposed over and apart from the channel layers along the first direction. The gate structure laterally extends along a second direction perpendicular to the first direction disposed, wherein the gate structure wraps around the channel layers and laterally surround the mask structure. The source/drain pattern is in contact with the channel layers.

Abstract: A die-to-die communication system and an operation method thereof are provided. The die-to-die communication system includes a transmitting device disposed at a first die and a receiving device disposed at a second die, wherein the first die and second die are disposed in a same integrated circuit package. The receiving device is coupled to the transmitting device via a communication interface. The transmitting device transmits a data unit stream to a data channel in the communication interface. The receiving device receives the data unit stream from the data channel in the communication interface. The receiving device returns transmission management information to the transmitting device via a feedback channel different from the data channel in the communication interface. In various embodiments, the transmission management information includes flow control information and/or error replay information.

Abstract: A mask inspection system employs TDI imaging. The mask inspection system is calibrated by iteratively repeating, until a stopping criterion is met: (i) simultaneously acquiring first and second TDI images using respective first and second TDI image sensors of the mask inspection system, the first and second TDI image sensors being configured to acquire the respective first and second TDI images with light of mutually orthogonal polarizations, and (ii) automatically adjusting a position of the second TDI image sensor using an electronic controller that receives a feedback error signal indicative of the shift of the second TDI image respective to the first TDI image along the shift direction. The adjusting may utilize an electronic controller that controls the motor based on a received feedback error signal indicative of the shift of the second TDI image respective to the first TDI image along the shift direction.

Abstract: Embodiments of the present disclosure provide a method for forming backside metal contacts with reduced Cgd and increased speed. Particularly, source/drain features on the drain side, or source/drain features without backside metal contact, are recessed from the backside to the level of the inner spacer to reduce Cgd. Some embodiments of the present disclosure use a sacrificial liner to protect backside alignment feature during backside processing, thus, preventing shape erosion of metal conducts and improving device performance.

Abstract: A method includes forming a dummy gate stack on a semiconductor fin, forming gate spacers on sidewalls of the dummy gate stack, forming a first inter-layer dielectric, with the gate spacers and the dummy gate stack being in the first inter-layer dielectric, removing the dummy gate stack to form a trench between the gate spacers, forming a replacement gate stack in the trench, and depositing a dielectric capping layer. A bottom surface of the dielectric capping layer contacts a first top surface of the replacement gate stack and a second top surface of the first inter-layer dielectric. A second inter-layer dielectric is deposited over the dielectric capping layer. A source/drain contact plug is formed and extends into the second inter-layer dielectric, the dielectric capping layer, and the first inter-layer dielectric.

Abstract: A semiconductor device includes a plurality of semiconductor fins, at least one gate stack, a refill isolation, and an air gap. Each of the semiconductor fins extends in an X direction. Two adjacent ones of the semiconductor fins are spaced apart from each other in a Y direction transverse to the X direction. The at least one gate stack has two stack sections spaced apart from each other in the Y direction. The stack sections are disposed over two adjacent ones of the semiconductor fins, respectively. The refill isolation and the air gap are disposed between the stack sections.

Abstract: A semiconductor structure includes an epitaxial region having a front side and a backside. The semiconductor structure includes an amorphous layer formed over the backside of the epitaxial region, wherein the amorphous layer includes silicon. The semiconductor structure includes a first silicide layer formed over the amorphous layer. The semiconductor structure includes a first metal contact formed over the first silicide layer.

Abstract: In an embodiment, a device includes: a first interconnect structure including metallization patterns; a second interconnect structure including a power rail; a device layer between the first interconnect structure and the second interconnect structure, the device layer including a first transistor, the first transistor including an epitaxial source/drain region; and a conductive via extending through the device layer, the conductive via connecting the power rail to the metallization patterns, the conductive via contacting the epitaxial source/drain region.