Abstract: An Analog-to-Digital-Conversion control system includes a first sample and hold circuit configured to provide a first sampled output to be converted by an Analog-to-Digital-Converter, which comprises a first sampling control circuit configured to receive a first trigger information to trigger sampling of a first analog input and to receive a first collision detection information from the Analog-to-Digital-Converter to detect a collision, a first sample and hold stage coupled to the first sampling control circuit and configured to sample the first analog input, only if no collision has been detected by the first sampling control circuit, wherein the first sampling control circuit is further configured to check predefined first sampling criteria and to output a first conversion request to the Analog-to-Digital-Converter, only if the predefined first sampling criteria are fulfilled.

Abstract: Representative implementations of devices and techniques provide gain calibration for analog to digital conversion of time-discrete analog inputs. An adjustable capacitance arrangement is used to reduce or eliminate gain error caused by capacitor mismatch within the ADC. For example, the capacitance arrangement may include an array of multiple switched capacitances arranged to track gain error during search algorithm operation.

Abstract: Representative implementations of devices and techniques provide a built-in self-test (BIST) for an analog-to-digital converter (ADC). Stimuli needed to test an ADC are generated within the chip containing the ADC. Evaluation circuitry is also available on-chip. Generation and evaluation circuits and systems are based on existing circuits and/or components of the chip.

Abstract: A switching circuitry is configured to provide, during an ON-State, a connection between a first port and second port and to electrically disconnect, during an OFF-State, the first port from the second port. The switching interface comprises a first and a second cascode transistor element having an applicable operational voltage and comprising a control terminal, wherein the first cascode transistor element is connected with the first port of the switching interface and wherein the second cascode transistor element is connected with the second port of the switching interface. The switching interface comprises a switching transistor element, having the applicable operational voltage and comprising a third control terminal, the switching transistor element being serially connected the first and second cascode transistor elements.

Abstract: A circuit (100) comprises an input terminal (141) which is configured to receive an analog input signal (142). The circuit (100) also comprises a combination element (601) which is configured to combine a number of time-displaced signal values of the input signal (142) to form an analog combination signal (144). The circuit (100) also comprises a quantizer (131) having a converter core which is configured to receive the combination signal (144) via passive charge redistribution from the combination element (601) and to convert it into a digital output signal (145). Such techniques can thus provide for an analog/digital conversion with filtering in the analog domain.

Abstract: A multi voltage sensor system includes one or more charge pumps, a sensor bridge and readout circuitry. The one or more charge pumps are configured to provide a high voltage. The sensor bridge is biased by the high voltage and is configured to provide sensor values. The readout circuitry includes only low voltage components. The readout circuitry is configured to receive the sensor values.

Abstract: An apparatus for converting an analog signal to a digital signal comprises an input node to be set to an input voltage that is based on the analog signal. The input node is configured to be coupled to a tank capacitor to receive charge from the tank capacitor. The apparatus further comprises a current source configured to be coupled to the tank capacitor to change an amount of charge stored on the tank capacitor. A method for use in operating an analog-to-digital converter to convert an analog signal into a digital signal comprises, in a sensing mode, setting an input voltage based on the analog signal to a sampling capacitor and, in a non-sensing mode, providing a sample voltage to a comparator.

Abstract: Measurement apparatuses and methods are described. A measurement input is coupled with a first terminal of a capacitance via a first switch, and a reference voltage is coupled with the first terminal of the capacitance via a second switch. A measurement circuit is coupled to a second terminal of said capacitance.

Abstract: In some examples, a method includes controlling a first set of switches to deliver a first voltage signal through a first set of capacitors to a common node. The method also includes controlling a second set of switches to deliver a second voltage signal through a second set of capacitors to the common node, wherein the first set of capacitors is electrically connected to the second set of capacitors by the common node. The method further includes measuring a time duration to discharge the common node. The second voltage signal includes an opposing polarity to the first voltage signal.

Abstract: A radio frequency (RF) receive circuit is described herein. In accordance with one embodiment, the RF receive circuit includes a mixer configured to receive an RF input signal to down-convert the RF input signal into a base-band or intermediate frequency (IF) band, an analog-to-digital converter (ADC), and a signal processing chain coupled between the mixer and the ADC. The signal processing chain includes at least two circuit nodes. The RF receive circuit further includes an oscillator circuit that is configured to generate a test signal. The oscillator circuit is coupled to the signal processing chain and is configured to selectively feed the oscillator signal into one of the at least two circuit nodes.

Abstract: A method for use in testing an analog-to-digital converter. The method includes providing a set of bins, varying a voltage, taking samples of the voltage, providing a selection flag, associating each sample with one bin of the set of bins, and observing a number of samples associated with the bins. An apparatus includes an analog-to-digital converter configured to convert a voltage at an input node to a digital representation provided at an output node. The input node is configured to be coupled to a voltage generator. A sample select unit is configured to determine if a voltage at the input node at least equals a first threshold level and does not exceed a second threshold level. The apparatus is configured, based on the determining, to selectively associate the digital representation with a bin of a set of bins.

Abstract: A circuit for processing an input-signal voltage comprises an input capacitance coupled between an input node of the circuit and a sense node of a comparator and a reference capacitance coupled to the sense node of the comparator. A method for processing an input-signal voltage comprises configuring a reference capacitance coupled to an input capacitance; during a charge phase, charging the reference capacitance to a first-level reference voltage; and, during an operative phase, setting the input capacitance to an input-signal voltage to obtain, at the sense node, a sense voltage.

Abstract: A circuit for processing an input-signal voltage comprises a first comparator comprising a first-comparator sense node and a reference capacitance that is coupled to the first-comparator sense node, a second comparator comprising a second-comparator sense node, and a comparator select switch coupled between a path input terminal of the circuit and the first-comparator sense node and the second-comparator sense node. A method of processing at least one input-signal voltage using at least one associated threshold voltage in a circuit, wherein a plurality of comparators comprises more comparators than there are path input terminals coupled to path output terminals, comprises selectively making a coupling via one comparator of two comparators provided in parallel to form a coupling path from the path input terminal to an associated path output terminal, while breaking the coupling via the other comparator.

Abstract: In accordance with an embodiment, a method of operating a switched capacitor circuit includes pre-charging a capacitor using a voltage buffer having an input coupled to an input node of the switched capacitor circuit and an output coupled to the capacitor, coupling the input node to the capacitor, wherein a first charge is collected on the capacitor, and integrating the first charge using an integrator.

Abstract: This disclosure describes techniques for measuring the resistance of a component with measurement circuitry that is electrically coupled to the component via one or more electrical conductors (e.g., one or more bond wires). The resistance measurement techniques of this disclosure may measure a resistance of an electrical conductor, and generate a value indicative of a resistance of a component other than the electrical conductor based on the measured resistance of the electrical conductor. The electrical conductor for which the resistance is measured may be the same as or different than one or more of the electrical conductors that the couple the measurement circuitry to the component to be measured. Using an electrical conductor resistance measurement to determine the resistance of a component may improve the accuracy of the resistance measurement for the component.

Abstract: A method and an apparatus for a shunt measurement are provided. In one embodiment a measurement unit includes an input for a source device, the source device configured to provide a first analog voltage level to be measured in a first operating mode of the source device and a second analog voltage level to be measured in a second operating mode of the source device, a control input configured to detect the operating mode of the source device and an input stage configured to minimize a reaction time of the measurement unit after a change of the operating mode of the source device.

Abstract: A method for use in testing an analog-to-digital converter. The method includes providing a set of bins, varying a voltage, taking samples of the voltage, providing a selection flag, associating each sample with one bin of the set of bins, and observing a number of samples associated with the bins. An apparatus includes an analog-to-digital converter configured to convert a voltage at an input node to a digital representation provided at an output node. The input node is configured to be coupled to a voltage generator. A sample select unit is configured to determine if a voltage at the input node at least equals a first threshold level and does not exceed a second threshold level. The apparatus is configured, based on the determining, to selectively associate the digital representation with a bin of a set of bins.

Abstract: A circuit arrangement for measuring a load current provided to a load via a first load terminal of a load transistor is disclosed. In accordance with one example of the invention, the circuit arrangement includes a sense transistor coupled to the load transistor to provide a sense current representing the load current at a first load terminal of the sense transistor. The first load terminals of the load and the sense transistors are at respective floating electric potentials. A floating sense circuit coupled between the load terminals of sense transistor and load transistor, at least in one mode of operation the sense circuit receives the sense current and provides a floating signal representing the sense current. A non-floating measurement circuit is coupled to the sense circuit via a DC decoupling capacitor for transferring the floating signal representing the sense current to the non-floating measurement circuit.

Abstract: Disclosed herein are embodiments of a precharge sample-and-hold circuit. The circuit has an input terminal, a reference voltage terminal and an output terminal. Further, the circuit has a sampling capacitance coupled between the input terminal and the reference voltage terminal and configured to provide the sample voltage when said sample-and-hold circuit is in a holding mode and a cancellation capacitance. Implementations of a precharge sample-and-hold circuit and of methods to operate a precharge sample-and-hold circuit in an analog/digital converter are also disclosed.

Abstract: A sensor device includes an implantable sensor unit, a transponder unit, and a wired connection flexibly and electrically connecting the implantable sensor unit and the transponder unit. The implantable sensor unit is adapted to be implanted into a body. The implantable sensor unit includes a comparator and a sensor adapted to sense a characteristic of the body in vivo. The sensor is adapted to supply an analogue signal to a first input of the comparator. The transponder unit is adapted to supply a control signal to the implantable sensor unit and to receive an output signal of the comparator. The implantable sensor unit is adapted to supply an analogue approximation signal to a second input of the comparator in response to the control signal. The wired connection is adapted to transmit the control signal and the output signal of the comparator.