Patents by Inventor Peter Bogner
Peter Bogner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8766833Abstract: In accordance with an embodiment, a method of calibrating a circuit includes coupling a first reference voltage to a first input of the circuit, coupling a programmable reference voltage to a reference node of a digital-to-analog converter (DAC), such that the gain of the DAC is dependent on an input value at the reference node. The method further includes providing a first predetermined input code to the DAC, summing an output of the DAC with the first reference voltage to produce a summed output, comparing the summed output to a threshold, and adjusting the programmable reference voltage until the summed output is within a predetermined range of the threshold.Type: GrantFiled: March 6, 2013Date of Patent: July 1, 2014Assignee: Infineon Technologies Austria AGInventor: Peter Bogner
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Patent number: 8754635Abstract: A circuit arrangement for measuring a load current provided to a load via a first load terminal of a load transistor is disclosed. In accordance with one example of the invention, the circuit arrangement includes a sense transistor coupled to the load transistor to provide a sense current representing the load current at a first load terminal of the sense transistor. The first load terminals of the load and the sense transistors are at respective floating electric potentials. A floating sense circuit coupled between the load terminals of sense transistor and load transistor, at least in one mode of operation the sense circuit receives the sense current and provides a floating signal representing the sense current. A non-floating measurement circuit is coupled to the sense circuit via a DC decoupling capacitor for transferring the floating signal representing the sense current to the non-floating measurement circuit.Type: GrantFiled: June 14, 2011Date of Patent: June 17, 2014Assignee: Infineon Technologies AGInventors: Peter Bogner, Luca Petruzzi
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Publication number: 20140002286Abstract: Representative implementations of devices and techniques provide analog to digital conversion of multiple parallel analog inputs. An input interface is arranged to organize the parallel analog inputs and an analog-to-digital converter (ADC) is arranged to sequentially convert the multiple parallel analog inputs to digital results.Type: ApplicationFiled: July 2, 2012Publication date: January 2, 2014Inventors: Peter BOGNER, Franz KUTTNER
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Publication number: 20130343109Abstract: In various embodiments a circuit is provided which may include a node at which a circuit potential may be provided; an alternating voltage providing circuit configured to provide a DC current free alternating voltage; a rectifier coupled to the alternating voltage providing circuit, the rectifier including a first rectifier terminal and a second rectifier terminal, wherein the first rectifier terminal or the second rectifier terminal may be coupled to the node; and a first output terminal and a second output terminal, wherein the first output terminal may be coupled to the first rectifier terminal to provide a first potential and wherein the second output terminal may be coupled to the second rectifier terminal to provide a second potential different from the first potential, the difference between the first potential and the second potential defining an output voltage, wherein the output voltage may be constant independent of the circuit potential.Type: ApplicationFiled: June 22, 2012Publication date: December 26, 2013Applicant: INFINEON TECHNOLOGIES AGInventor: Peter Bogner
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Patent number: 8604961Abstract: In various embodiments an analog-to-digital converter arrangement is provided, which may include an input terminal configured to receive a signal to be converted; a reference terminal configured to receive a reference signal; a voltage domain specific reference terminal configured to receive a voltage domain specific reference signal; an analog-to-digital converter circuit coupled to the input terminal, the reference terminal, and to the voltage domain specific reference terminal configured to compare the signal to be converted with the voltage domain specific reference signal, thereby generating a first digital comparison signal, and to compare the reference signal with the voltage domain specific reference signal, thereby generating a second digital comparison signal; and a ratiometric circuit configured to determine a digitally converted signal of the signal to be converted using the first digital comparison signal and the second digital comparison signal.Type: GrantFiled: August 27, 2012Date of Patent: December 10, 2013Assignee: Infineon Technologies Austria AGInventors: Peter Bogner, Hubert Rothleitner
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Publication number: 20130321053Abstract: In accordance with various embodiments, a method for sampling an input signal may be provided, wherein the method may include providing a single frequency clock signal; selecting clock pulses from the single frequency clock signal in a random manner to generate a spread spectrum clock signal; and sampling the input signal using the spread spectrum clock signal. A corresponding device for sampling an input signal may be provided.Type: ApplicationFiled: May 30, 2012Publication date: December 5, 2013Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Peter Bogner, Marco Faricelli
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Patent number: 8564470Abstract: A current input analog-to-digital converter and a corresponding current measurement circuit is disclosed. In accordance with one example of the invention, an analog-to-digital conversion circuit includes a register for storing a digital register value and a digital-to-analog converter that is configured to provide a reference current at a circuit node which is set in accordance to the digital register value. The electric potential of the input node is responsive to the reference current set. A comparator circuit is configured to compare the potential of the circuit node with at least one threshold, thus assessing whether the potential of the circuit node is at least approximately at a desired value. Control circuitry is responsive to the comparator circuit and is configured to adjust the digital register value stored in the register and to adjust the reference current until the comparator indicates that the potential of the circuit node does not deviate from the desired value.Type: GrantFiled: June 14, 2011Date of Patent: October 22, 2013Assignee: Infineon Technologies AGInventors: Peter Bogner, Franz Kuttner
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Publication number: 20120319677Abstract: A circuit arrangement for measuring a load current provided to a load via a first load terminal of a load transistor is disclosed. In accordance with one example of the invention, the circuit arrangement includes a sense transistor coupled to the load transistor to provide a sense current representing the load current at a first load terminal of the sense transistor. The first load terminals of the load and the sense transistors are at respective floating electric potentials. A floating sense circuit coupled between the load terminals of sense transistor and load transistor, at least in one mode of operation the sense circuit receives the sense current and provides a floating signal representing the sense current. A non-floating measurement circuit is coupled to the sense circuit via a DC decoupling capacitor for transferring the floating signal representing the sense current to the non-floating measurement circuit.Type: ApplicationFiled: June 14, 2011Publication date: December 20, 2012Applicant: Infineon Technologies AGInventors: Peter Bogner, Luca Petruzzi
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Publication number: 20120319878Abstract: A current input analog-to-digital converter and a corresponding current measurement circuit is disclosed. In accordance with one example of the invention, an analog-to-digital conversion circuit includes a register for storing a digital register value and a digital-to-analog converter that is configured to provide a reference current at a circuit node which is set in accordance to the digital register value. The electric potential of the input node is responsive to the reference current set. A comparator circuit is configured to compare the potential of the circuit node with at least one threshold, thus assessing whether the potential of the circuit node is at least approximately at a desired value. Control circuitry is responsive to the comparator circuit and is configured to adjust the digital register value stored in the register and to adjust the reference current until the comparator indicates that the potential of the circuit node does not deviate from the desired value.Type: ApplicationFiled: June 14, 2011Publication date: December 20, 2012Applicant: Infineon Technologies AGInventors: Peter Bogner, Franz Kuttner
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Publication number: 20110254569Abstract: Measurement apparatuses and methods are described. A measurement input is coupled with a first terminal of a capacitance via a first switch, and a reference voltage is coupled with the first terminal of the capacitance via a second switch. A measurement circuit is coupled to a second terminal of said capacitance.Type: ApplicationFiled: April 15, 2010Publication date: October 20, 2011Inventors: Peter BOGNER, Franz KUTTNER
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Patent number: 7304598Abstract: A circuit has a first amplifier having first positive and negative inputs and a second amplifier having second positive and negative inputs. A first unit is connectable to the first and second inputs of the amplifiers and a second unit is connectable to the first and second inputs of the amplifiers. In a first phase, the first unit is connected to the amplifiers, wherein the positive input of the first amplifier is coupled to the positive input of the second amplifier and the negative input of the first amplifier is coupled to the negative input of the second amplifier. In a second phase, the second unit is connected to the amplifiers, wherein the positive input of the first amplifier is coupled to the negative input of the second amplifier and the negative input of the first amplifier is coupled to the positive input of the second amplifier.Type: GrantFiled: August 30, 2006Date of Patent: December 4, 2007Assignee: Infineon Technologies AGInventor: Peter Bogner
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Patent number: 7095346Abstract: An A/D converter has at least one converter stage which, respectively, has a sample and hold circuit for sampling an analog input signal. The converter stage also includes a comparator unit that compares the analog input signal with a reference value in order to produce a digital output value from the converter stage, a digital/analog converter for converting the digital output value into an analog signal, a subtractor for subtracting the analog signal from the sampled input signal, a signal amplifier for amplifying the output signal which is output by the subtractor with a particularl singal gain factor for the next converter stage, and a weighting unit for multiplying the digital output value by a multiplier for addition to further weighted output values from converter stages to produce the digital output value from the A/D converter.Type: GrantFiled: October 26, 2004Date of Patent: August 22, 2006Assignee: Infineon Technologies AGInventor: Peter Bogner
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Patent number: 7053711Abstract: The invention relates to a multistage differential amplifier circuit having a multistage differential amplifier which has an input stage and at least one output stage connected downstream of the input stage, having a CMFB circuit whose input side is connected to outputs on the output stage, having a first control loop, which can be used to set a load for the input stage using a first control signal from the CMFB circuit, having at least one second control loop, which is arranged between the outputs of the output stage and a control input on the CMFB circuit and which uses an output common-mode level which can be tapped off at the output stage to produce a continuous-time, second control signal for setting an operating point for the CMFB circuit.Type: GrantFiled: September 17, 2004Date of Patent: May 30, 2006Assignee: Infineon Technologies AGInventor: Peter Bogner
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Patent number: 6965258Abstract: An integrated circuit having a sample-and-hold device is provided, which can be operated in successive cycles which each include a sample phase and a hold phase. During a sample phase a first storage device is charged to a voltage value proportional to an analog input signal, which voltage value is provided for a further circuit part of the integrated circuit in the hold phase. A second storage device is charged during a first cycle to a voltage value which is inverted relative to a final voltage value of the first storage device in the hold phase. In the sample phase of the next cycle following the first cycle, the second storage device is connected to the first storage device in order to discharge the first storage device.Type: GrantFiled: July 12, 2004Date of Patent: November 15, 2005Assignee: Infineon Technologies AGInventor: Peter Bogner
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Publication number: 20050116777Abstract: The invention relates to a multistage differential amplifier circuit having a multistage differential amplifier which has an input stage and at least one output stage connected downstream of the input stage, having a CMFB circuit whose input side is connected to outputs on the output stage, having a first control loop, which can be used to set a load for the input stage using a first control signal from the CMFB circuit, having at least one second control loop, which is arranged between the outputs of the output stage and a control input on the CMFB circuit and which uses an output common-mode level which can be tapped off at the output stage to produce a continuous-time, second control signal for setting an operating point for the CMFB circuit.Type: ApplicationFiled: September 17, 2004Publication date: June 2, 2005Applicant: Infineon Technologies AGInventor: Peter Bogner
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Publication number: 20050116846Abstract: An A/D converter has at least one converter stage which, respectively, has a sample and hold circuit for sampling an analog input signal. The converter stage also includes a comparator unit that compares the analog input signal with a reference value in order to produce a digital output value from the converter stage, a digital/analog converter for converting the digital output value into an analog signal, a subtractor for subtracting the analog signal from the sampled input signal, a signal amplifier for amplifying the output signal which is output by the subtractor with a particularl singal gain factor for the next converter stage, and a weighting unit for multiplying the digital output value by a multiplier for addition to further weighted output values from converter stages to produce the digital output value from the A/D converter.Type: ApplicationFiled: October 26, 2004Publication date: June 2, 2005Applicant: Infineon Technologies AGInventor: Peter Bogner
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Patent number: 6831582Abstract: A digital to analogue converter with current output and a mixer with current input are used, and the entire circuit configuration operates within the current area. This means that the current output of the digital to analogue converter, if necessary, is directly connected to the current input of the mixer with intermediate insertion of a filter operating within the current area, without any conversion of the current signals occurring between the digital to analogue converter and the mixer into a voltage. Therefore, the circuitry cost can be reduced because various components are dispensed with and the signal quality improved, since distortions and noise are prevented due to current to voltage conversion at the end of the digital to analogue converter or voltage to current conversion at the input of the mixer.Type: GrantFiled: October 24, 2003Date of Patent: December 14, 2004Assignee: Infineon Technologies AGInventors: Franz Kuttner, Peter Bogner
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Publication number: 20040239378Abstract: An integrated circuit having a sample-and-hold device is provided, which can be operated in successive cycles which each include a sample phase and a hold phase. During a sample phase a first storage device is charged to a voltage value proportional to an analog input signal, which voltage value is provided for a further circuit part of the integrated circuit in the hold phase. A second storage device is charged during a first cycle to a voltage value which is inverted relative to a final voltage value of the first storage device in the hold phase. In the sample phase of the next cycle following the first cycle, the second storage device is connected to the first storage device in order to discharge the first storage device.Type: ApplicationFiled: July 12, 2004Publication date: December 2, 2004Inventor: Peter Bogner
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Publication number: 20040135714Abstract: A method and circuit configuration for mixing a digital signal with an analogue signal. A digital to analogue converter with current output and a mixer with current input are used, and, according to the invention, the entire circuit configuration operates within the current area. This means that the current output of the digital to analogue converter, if necessary, is directly connected to the current input of the mixer with intermediate insertion of a filter operating within the current area, without any conversion of the current signals occurring between the digital to analogue converter and the mixer into a voltage. Therefore, the circuitry cost can be reduced because various components are dispensed with and the signal quality improved, since distortions and noise are prevented due to current to voltage conversion at the end of the digital to analogue converter or voltage to current conversion at the input of the mixer.Type: ApplicationFiled: October 24, 2003Publication date: July 15, 2004Applicant: INFINEON TECHNOLOGIES AGInventors: Franz Kuttner, Peter Bogner