Patents by Inventor Peter J. Zampardi

Peter J. Zampardi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9525078
    Abstract: A device includes a field effect transistor (FET) integrated with at least a portion of a bipolar junction transistor (BJT), in which a back gate of the FET shares an electrical connection with a base of the BJT, and in which a reverse voltage can be applied to the back gate of the FET.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: December 20, 2016
    Assignee: Skyworks Solutions, Inc.
    Inventors: Bin Li, Peter J. Zampardi, Jr., Andre G. Metzger
  • Patent number: 9520835
    Abstract: One aspect of this disclosure is a power amplifier module that includes a first die including a power amplifier and a passive component, the power amplifier including a bipolar transistor having a collector, a base abutting the collector, and an emitter, the collector having a doping concentration of at least about 3×1016 cm?3 at an interface with the base, the collector also having a grading in which doping concentration increases away from the base; and a second die including a bias circuit configured to generate a bias signal based at least partly on an indication of an electrical property of the passive component of the first die and to provide the bias signal to the power amplifier. Other embodiments of the module are provided along with related methods and components thereof.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: December 13, 2016
    Assignee: Skyworks Solutions, Inc.
    Inventors: Tin Myint Ko, Philip John Lehtola, Matthew Thomas Ozalas, David Steven Ripley, Hongxiao Shao, Peter J. Zampardi, Jr.
  • Publication number: 20160358907
    Abstract: Disclosed are structures and methods related to a barrier layer for metallization of a selected semiconductor such as indium gallium phosphide (InGaP). In some embodiments, the barrier layer can include tantalum nitride (TaN). Such a barrier layer can provide desirable features such as barrier functionality, improved adhesion of a metal layer, reduced diffusion, reduced reactivity between the metal and InGaP, and stability during the fabrication process. In some embodiments, structures formed in such a manner can be configured as an emitter of a gallium arsenide (GaAs) heterojunction bipolar transistor (HBT) or an on-die high-value capacitance element.
    Type: Application
    Filed: August 16, 2016
    Publication date: December 8, 2016
    Inventors: Cristian Cismaru, Peter J. Zampardi, JR.
  • Patent number: 9502510
    Abstract: The present disclosure relates to heterojunction bipolar transistors for improved radio frequency (RF) performance. In this regard, a heterojunction bipolar transistor includes a base, an emitter, and a collector. The base is formed over the collector such that a base-collector junction is formed between the base and the collector. The base-collector junction is configured to become forward-biased at a first turn-on voltage. The emitter is formed over the base such that a base-emitter junction is formed between the base and the emitter. The base-emitter junction is configured to become forward-biased at a second turn-on voltage, as opposed to the first turn-on voltage. Notably, the second turn-on voltage is lower than the first turn-on voltage.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: November 22, 2016
    Assignee: Qorvo US, Inc.
    Inventors: Peter J. Zampardi, Brian G. Moser, Jing Zhang, Thomas James Rogers, Dheeraj Mohata
  • Patent number: 9490751
    Abstract: One aspect of this disclosure is a power amplifier module that includes a first die including a power amplifier and a passive component, the power amplifier including a bipolar transistor having a collector, a base abutting the collector, and an emitter, the collector having a doping concentration of at least about 3×1016 cm?3 at an interface with the base, the collector also having a grading in which doping concentration increases away from the base; and a second die including a bias circuit configured to generate a bias signal based at least partly on an indication of an electrical property of the passive component of the first die and to provide the bias signal to the power amplifier. Other embodiments of the module are provided along with related methods and components thereof.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: November 8, 2016
    Assignee: Skyworks Solutions, Inc.
    Inventors: Tin Myint Ko, Philip John Lehtola, Matthew Thomas Ozalas, David Steven Ripley, Hongxiao Shao, Peter J. Zampardi, Jr.
  • Publication number: 20160307671
    Abstract: Designs and methodologies related to attenuators having a thin-film resistor assembly are disclosed. In some embodiments, the thin-film assembly can include a first and second thin-film resistor, each having a main portion with an input end and an output end. The input end of the first thin-film resistor is interconnected to the input end of the second thin-film resistors, and the output end of the first thin-film resistor is interconnected to the output end of the second thin-film resistor. The first and second thin-film resistors are disposed relative to one another so as to define a separation. The separation region reduces the likelihood of hot spot regions forming at or near the center of the thin-film structure and improves power handling capability for a given resistor width. Also disclosed are examples of how the foregoing features can be implemented in different products and methods of fabrication.
    Type: Application
    Filed: June 29, 2016
    Publication date: October 20, 2016
    Inventors: Peter J. Zampardi, JR., Kai Hay Kwok
  • Patent number: 9472514
    Abstract: To reduce radio frequency (RF) losses during operation of a radio frequency integrated circuit (RFIC) module, the RFIC module is fabricated such that at least one of an edge of the wirebond pad on the copper trace and a sidewall of the copper trace is free from high-resistivity plating material. The unplated portion provides a path for the RF current to flow around the high-resistivity material, which reduces the RF signal loss associated with the high resistivity plating material.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: October 18, 2016
    Assignee: Skyworks Solutions, Inc.
    Inventors: Weimin Sun, Peter J. Zampardi, Jr., Hongxiao Shao
  • Publication number: 20160293700
    Abstract: A transistor includes a sub-collector, a base, a collector between the sub-collector and the base, and an emitter on the base opposite the collector. The collector includes a first region adjacent to the base and a second region between the first region and the sub-collector. The first region has a graduated doping profile such that a doping concentration of the first region decreases in proportion to a distance from the base. The second region has a substantially constant doping profile. By providing the collector with a doping profile as described, the linearity of the transistor is significantly improved while maintaining the radio frequency (RF) gain thereof.
    Type: Application
    Filed: March 29, 2016
    Publication date: October 6, 2016
    Inventors: Peter J. Zampardi, Brian G. Moser, Jing Zhang, Thomas James Rogers
  • Patent number: 9461153
    Abstract: Disclosed are structures and methods related to a barrier layer for metallization of a selected semiconductor such as indium gallium phosphide (InGaP). In some embodiments, the barrier layer can include tantalum nitride (TaN). Such a barrier layer can provide desirable features such as barrier functionality, improved adhesion of a metal layer, reduced diffusion, reduced reactivity between the metal and InGaP, and stability during the fabrication process. In some embodiments, structures formed in such a manner can be configured as an emitter of a gallium arsenide (GaAs) heterojunction bipolar transistor (HBT) or an on-die high-value capacitance element.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: October 4, 2016
    Assignee: Skyworks Solutions, Inc.
    Inventors: Cristian Cismaru, Peter J. Zampardi, Jr.
  • Patent number: 9419567
    Abstract: The present disclosure relates to a system for biasing a power amplifier. The system can include a first die that includes a power amplifier circuit and a passive component having an electrical property that depends on one or more conditions of the first die. Further, the system can include a second die including a bias signal generating circuit that is configured to generate a bias signal based at least in part on measurement of the electrical property of the passive component of the first die.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: August 16, 2016
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: David Steven Ripley, Philip John Lehtola, Peter J. Zampardi, Jr., Hongxiao Shao, Tin Myint Ko, Matthew Thomas Ozalas
  • Patent number: 9406741
    Abstract: Designs and methodologies related to attenuators having a thin-film resistor assembly are disclosed. In some embodiments, the thin-film assembly can include a first and second thin-film resistor, each having a main portion with an input end and an output end. The input end of the first thin-film resistor is interconnected to the input end of the second thin-film resistors, and the output end of the first thin-film resistor is interconnected to the output end of the second thin-film resistor. The first and second thin-film resistors are disposed relative to one another so as to define a separation. The separation region reduces the likelihood of hot spot regions forming at or near the center of the thin-film structure and improves power handling capability for a given resistor width. Also disclosed are examples of how the foregoing features can be implemented in different products and methods of fabrication.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: August 2, 2016
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Peter J. Zampardi, Jr., Kai Hay Kwok
  • Patent number: 9385200
    Abstract: This disclosure relates to bipolar transistors, such as heterojunction bipolar transistors, having at a doping spike in the collector. The doping spike can be disposed relatively near an interface between the collector and the base. For instance, the doping spike can be disposed within half of the thickness of the collector from the interface between the collector and the base. Such bipolar transistors can be implemented, for example, in power amplifiers.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: July 5, 2016
    Inventors: Peter J. Zampardi, Jr., Kai Hay Kwok
  • Patent number: 9287226
    Abstract: To reduce the radio frequency (RF) losses associated with high RF loss plating, such as, for example, Nickel/Palladium/Gold (Ni/Pd/Au) plating, an on-die passive device, such as a capacitor, resistor, or inductor, associated with a radio frequency integrated circuit (RFIC) is placed in an RF upper signal path with respect to the RF signal output of the RFIC. By placing the on-die passive device in the RF upper signal path, the RF current does not directly pass through the high RF loss plating material of the passive device bonding pad.
    Type: Grant
    Filed: November 11, 2014
    Date of Patent: March 15, 2016
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Weimin Sun, Peter J. Zampardi, Jr., Hongxiao Shao
  • Publication number: 20150380399
    Abstract: A semiconductor structure includes a heterojunction bipolar transistor (HBT) including a collector layer located over a substrate, the collector layer including a semiconductor material, and a field effect transistor (FET) located over the substrate, the FET having a channel formed in the semiconductor material that forms the collector layer of the HBT. In some implementations, a second FET can be provided so as to be located over the substrate and configured to include a channel formed in a semiconductor material that forms an emitter of the HBT. One or more of the foregoing features can be implemented in devices such as a die, a packaged module, and a wireless device.
    Type: Application
    Filed: July 1, 2015
    Publication date: December 31, 2015
    Inventors: Peter J. Zampardi, Hsiang-Chih Sun
  • Publication number: 20150372098
    Abstract: The present disclosure relates to heterojunction bipolar transistors for improved radio frequency (RF) performance. In this regard, a heterojunction bipolar transistor includes a base, an emitter, and a collector. The base is formed over the collector such that a base-collector junction is formed between the base and the collector. The base-collector junction is configured to become forward-biased at a first turn-on voltage. The emitter is formed over the base such that a base-emitter junction is formed between the base and the emitter. The base-emitter junction is configured to become forward-biased at a second turn-on voltage, as opposed to the first turn-on voltage. Notably, the second turn-on voltage is lower than the first turn-on voltage.
    Type: Application
    Filed: June 19, 2015
    Publication date: December 24, 2015
    Inventors: Peter J. Zampardi, Brian G. Moser, Jing Zhang, Thomas James Rogers, Dheeraj Mohata
  • Publication number: 20150326181
    Abstract: A power amplifier module includes a power amplifier including a GaAs bipolar transistor having a collector, a base abutting the collector, and an emitter, the collector having a doping concentration of at least about 3×1016 cm?3 at a junction with the base, the collector also having at least a first grading in which doping concentration increases away from the base; and an RF transmission line driven by the power amplifier, the RF transmission line including a conductive layer and finish plating on the conductive layer, the finish plating including a gold layer, a palladium layer proximate the gold layer, and a diffusion barrier layer proximate the palladium layer, the diffusion barrier layer including nickel and having a thickness that is less than about the skin depth of nickel at 0.9 GHz. Other embodiments of the module are provided along with related methods and components thereof.
    Type: Application
    Filed: April 14, 2015
    Publication date: November 12, 2015
    Inventors: Howard E. Chen, Yifan Guo, Dinhphuoc Vu Hoang, Mehran Janani, Tin Myint Ko, Philip John Lehtola, Anthony James LoBianco, Hardik Bhupendra Modi, Hoang Mong Nguyen, Matthew Thomas Ozalas, Sandra Louise Petty-Weeks, Matthew Sean Read, Jens Albrecht Riege, David Steven Ripley, Hongxiao Shao, Hong Shen, Weimin Sun, Hsiang-Chih Sun, Patrick Lawrence Welch, Peter J. Zampardi, JR., Guohao Zhang
  • Publication number: 20150326183
    Abstract: One aspect of this disclosure is a power amplifier module that includes a power amplifier die including a power amplifier configured to amplify a radio frequency (RF) signal, the power amplifier including a heterojunction bipolar transistor (HBT) and a p-type field effect transistor (PFET), the PFET including a semiconductor segment that includes substantially the same material as a layer of a collector of the HBT, the semiconductor segment corresponding to a channel of the PFET; a load line electrically connected to an output of the power amplifier and configured to provide impedance matching at a fundamental frequency of the RF signal; and a harmonic termination circuit electrically connected to the output of the power amplifier and configured to terminate at a phase corresponding to a harmonic frequency of the RF signal. Other embodiments of the module are provided along with related methods and components thereof.
    Type: Application
    Filed: April 14, 2015
    Publication date: November 12, 2015
    Inventors: Howard E. Chen, Yifan Guo, Dinhphuoc Vu Hoang, Mehran Janani, Tin Myint Ko, Philip John Lehtola, Anthony James LoBianco, Hardik Bhupendra Modi, Hoang Mong Nguyen, Matthew Thomas Ozalas, Sandra Louise Petty-Weeks, Matthew Sean Read, Jens Albrecht Riege, David Steven Ripley, Hongxiao Shao, Hong Shen, Weimin Sun, Hsiang-Chih Sun, Patrick Lawrence Welch, Peter J. Zampardi, JR., Guohao Zhang
  • Publication number: 20150326182
    Abstract: A power amplifier module includes a power amplifier including a GaAs bipolar transistor having a collector, a base abutting the collector, and an emitter, the collector having a doping concentration of at least about 3×1016 cm?3 at a junction with the base, the collector also having at least a first grading in which doping concentration increases away from the base; and an RF transmission line driven by the power amplifier, the RF transmission line including a conductive layer and finish plating on the conductive layer, the finish plating including a gold layer, a palladium layer proximate the gold layer, and a diffusion barrier layer proximate the palladium layer, the diffusion barrier layer including nickel and having a thickness that is less than about the skin depth of nickel at 0.9 GHz. Other embodiments of the module are provided along with related methods and components thereof.
    Type: Application
    Filed: April 14, 2015
    Publication date: November 12, 2015
    Inventors: Howard E. Chen, Yifan Guo, Dinhphuoc Vu Hoang, Mehran Janani, Tin Myint Ko, Philip John Lehtola, Anthony James LoBianco, Hardik Bhupendra Modi, Hoang Mong Nguyen, Matthew Thomas Ozalas, Sandra Louise Petty-Weeks, Matthew Sean Read, Jens Albrecht Riege, David Steven Ripley, Hongxiao Shao, Hong Shen, Weimin Sun, Hsiang-Chih Sun, Patrick Lawrence Welch, Peter J. Zampardi, JR., Guohao Zhang
  • Publication number: 20150318406
    Abstract: A varactor includes a field effect transistor (FET) integrated with at least a portion of a bipolar junction transistor (BJT), in which a back gate of the FET shares an electrical connection with a base of the BJT, and in which a reverse voltage applied to the back gate of the FET creates a continuously variable capacitance in a channel of the FET.
    Type: Application
    Filed: May 12, 2015
    Publication date: November 5, 2015
    Inventors: Bin Li, Peter J. Zampardi, JR., Andre G. Metzger
  • Publication number: 20150255550
    Abstract: This disclosure relates to bipolar transistors, such as heterojunction bipolar transistors, having at a doping spike in the collector. The doping spike can be disposed relatively near an interface between the collector and the base. For instance, the doping spike can be disposed within half of the thickness of the collector from the interface between the collector and the base. Such bipolar transistors can be implemented, for example, in power amplifiers.
    Type: Application
    Filed: May 22, 2015
    Publication date: September 10, 2015
    Inventors: Peter J. Zampardi, JR., Kai Hay Kwok