Patents by Inventor Peter Mayer

Peter Mayer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120231743
    Abstract: The invention relates to a mobile communications device (10), particularly mobile terminal of a cellular communications network, comprising a data transmission interface (14) capable of wireless data transmission, wherein said communications device (10) is configured to output directional information indicating in which spatial direction to move the communications device (10) in order to improve a predetermined quality measure of a data transmission.
    Type: Application
    Filed: September 17, 2010
    Publication date: September 13, 2012
    Inventors: Hans-Peter Mayer, Thorsten Wild, Michael Ohm
  • Publication number: 20120189105
    Abstract: A sensor positioning and stabilizing device is provided. The sensor positioning and stabilizing device holds and stabilizes dental x-ray film or digital sensors during implant surgery with requiring a patient to bite down or manually hold it in position in order to take an x-ray.
    Type: Application
    Filed: January 26, 2012
    Publication date: July 26, 2012
    Inventor: Peter Mayer
  • Publication number: 20120012432
    Abstract: A coupling device for coupling a large gear unit to a rotative device has an inner sleeve rotatively coupleable to one of the large gear unit and the rotative device, and an outer sleeve rotatively coupleable to the other of the large gear unit and rotative device. An inner diameter of the outer sleeve can be fitted axially to an outer diameter of the inner sleeve. A first connection device connected to the inner sleeve terminates in a first coupling portion, and a second connection device connected to the outer sleeve terminates in a second coupling portion that is connectable to the first coupling portion. An actuator integrated in one of the first and second connection devices moves the associated connection arm axially. A testing arrangement is outfitted with the coupling device and performs a method of coupling the large gear unit to the rotative device.
    Type: Application
    Filed: February 16, 2011
    Publication date: January 19, 2012
    Applicant: RENK Aktiengesellschaft
    Inventor: Peter MAYER
  • Publication number: 20120002967
    Abstract: The invention relates to a method for synchronizing RF antenna signals (5a to 5i) of a plurality of RF antenna sites (3a to 3i) arranged at different locations of a radio transmission system (1b), the method comprising; generating a reference signal (7) in a reference oscillator (6) located at a central unit (2) of the radio transmission system (1b), transmitting the reference signal (7) as an optical signal from the central unit (2) to the RF antenna sites (3a to 3i) via a plurality of optical fiber links (9a? to 9i?), and using the transmitted reference signal (7) for synchronizing the RF antenna signals (5a to 5i) of the different RF antenna sites (3a to 3i), The invention also relates to a radio transmission system (1b).
    Type: Application
    Filed: March 8, 2010
    Publication date: January 5, 2012
    Applicant: Alcatel Lucent
    Inventors: Hans-Peter Mayer, Heinz Schlesinger
  • Publication number: 20110263751
    Abstract: The invention relates to a suspension comprising: fine-particulate particles in an amount of 0.01-50 wt %, wherein the particles have a fractal mass dimension Dm of less than or equal to 2.8, —fluid-elastic adhesive in an amount of 101-1000 parts by weight based on 100 parts of particles.
    Type: Application
    Filed: December 1, 2009
    Publication date: October 27, 2011
    Applicant: Wacker Chemie AG
    Inventors: Erwin-Peter Mayer, Herbert Barthel, Arnulf Schindelar
  • Patent number: 7843753
    Abstract: An integrated circuit includes an array of memory cells and a first circuit. The array includes word lines. Each word line is coupled to a plurality of memory cells. The first circuit is configured to refresh memory cells along a first number of word lines in response to a refresh command. The first number of word lines is based on a sensed temperature.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: November 30, 2010
    Assignee: Qimonda AG
    Inventors: Peter Mayer, Nicholas Heath, Rom-Shen Kao, Jason Parrish
  • Publication number: 20100280031
    Abstract: An orally deliverable pharmaceutical composition comprises a drug-carrier system having a Bcl-2 family protein inhibitory compound, e.g., ABT-263, in solution in a substantially non-aqueous carrier that comprises at least one phospholipid and a pharmaceutically acceptable solubilizing agent. The composition is suitable for oral administration to a subject in need thereof for treatment of a disease characterized by overexpression of one or more anti-apoptotic Bcl-2 family proteins, for example cancer.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 4, 2010
    Inventors: Paul David, Michael G. Fickes, Cristina M. Fischer, Anthony R. Haight, Katherine Heemstra, Kennan Marsh, Peter Mayer, Vitaly Rubin, Yeshwant D. Sanzgiri, Eric A. Schmitt, Ping Tong, Deliang Zhou
  • Publication number: 20100233795
    Abstract: A fermentation apparatus (10) with a fermentation vessel (12) having a low speed stirrer comprising a shaft (14) with at least one stirring element (18) mounted thereon. First and second seal assemblies (30, 50), spaced axially from one another to define a chamber (64) therebetween, are provided to seal a gap between the shaft and a vessel aperture. An inlet (66) opens into the chamber for connecting the chamber to a processing gas, the first seal assembly (30) is located between the fermentation vessel and the chamber comprising a seat (32) mounted on the shaft for rotation therewith and a mating ring mounted (36) in fixed rotational relationship but moveably axially of the housing. A sealing face (44) of the mating ring is resiliently biassed into engagement with a sealing face (42) of the seat, and the sealing face has grooves (18) which provide separation of the sealing faces upon rotation of the shaft.
    Type: Application
    Filed: December 27, 2006
    Publication date: September 16, 2010
    Applicant: JOHN CRANE UK LIMITED
    Inventor: Hans-Peter Mayer
  • Patent number: 7757064
    Abstract: A method of sending data on request from a memory to a device, wherein the memory receives a request from the device for sending predetermined data to the device, wherein the memory sends data and information about the data to the device.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: July 13, 2010
    Assignee: Infineon Technologies AG
    Inventors: Markus Balb, Peter Mayer, Wolfgang Spirkl, Christoph Bilger, Martin Brox, Thomas Hein, Michael Richter
  • Patent number: 7746098
    Abstract: Embodiments of the invention are generally related to systems comprising devices connected by a bus. A device in the system may include termination control logic capable of detecting changes in the system clock frequency. Upon detecting a clock frequency, the termination control logic may determine whether the clock frequency is greater than a threshold frequency. If so, the termination control logic may enable bus termination. However, if the new clock frequency is lower than the threshold frequency, bus termination may be disabled, thereby conserving power.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: June 29, 2010
    Assignee: Qimonda North America Corp.
    Inventors: Nicholas Heath, Peter Mayer
  • Patent number: 7746724
    Abstract: A method and apparatus for accessing a memory device. The method includes providing control signals for an access command to the memory device via an asynchronous interface and transmitting data for the access command to the memory device. The method also includes encoding, into the transmitted data, a clock signal. The encoded clock signal in the transmitted data is used by the memory device for receiving the data transmission.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: June 29, 2010
    Assignee: Qimonda AG
    Inventors: Peter Mayer, Wolfgang Spirkl, Markus Balb, Christoph Bilger, Martin Brox, Thomas Hein, Michael Richter
  • Publication number: 20090316511
    Abstract: In one embodiment, an electronic device comprises control circuitry. The control circuitry disables termination circuitry coupled to one or more input/output (I/O) signals of the electronic device during at least a portion of a relatively low frequency operation which causes insubstantial signal reflections at the I/O signals. The control circuitry re-enables the termination circuitry prior to the electronic device performing a relatively high frequency operation after completion of the low frequency operation, the high frequency operation causing substantial signal reflections at the I/O signals. The electronic device is a memory device in one embodiment. This way, the termination circuitry may be disabled during at least a portion of a refresh operation performed by the memory device and re-enabled prior to the memory device resuming normal operation (i.e., reads and writes) after completion of the refresh operation.
    Type: Application
    Filed: June 24, 2008
    Publication date: December 24, 2009
    Applicant: Qimonda North America Corp.
    Inventors: Peter Mayer, Nicholas Heath
  • Publication number: 20090238020
    Abstract: An integrated circuit includes an array of memory cells and a first circuit. The array includes word lines. Each word line is coupled to a plurality of memory cells. The first circuit is configured to refresh memory cells along a first number of word lines in response to a refresh command. The first number of word lines is based on a sensed temperature.
    Type: Application
    Filed: March 19, 2008
    Publication date: September 24, 2009
    Inventors: Peter Mayer, Nicholas Heath, Rom-Shen Kao, Jason Parrish
  • Publication number: 20090224796
    Abstract: Embodiments of the invention are generally related to systems comprising devices connected by a bus. A device in the system may include termination control logic capable of detecting changes in the system clock frequency. Upon detecting a clock frequency, the termination control logic may determine whether the clock frequency is greater than a threshold frequency. If so, the termination control logic may enable bus termination. However, if the new clock frequency is lower than the threshold frequency, bus termination may be disabled, thereby conserving power.
    Type: Application
    Filed: March 10, 2008
    Publication date: September 10, 2009
    Inventors: NICHOLAS HEATH, Peter MAYER
  • Patent number: 7527175
    Abstract: To meter catalysts into a reactor, the catalyst is firstly suspended in a hydrocarbon in a reservoir and the suspension obtained is kept in motion by stirring and then fed via a three-way metering valve and an ejector into the actual reactor, wherein the suspension containing the catalyst is firstly discharged from the reservoir by means of a pump and continuously circulated by returning the suspension via the three-way metering valve within a closed piping system to the reservoir, subsequently setting a pressure in the reservoir which is from 0.1 to 30 bar higher than the pressure in the reactor and then continuously introducing the suspension into the reactor via a flow meter which controls the three-way metering valve and via a downstream ejector by pulse operation of the now open three-way metering valve.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: May 5, 2009
    Assignee: Basell Polyolefine GmbH
    Inventors: Hermann Gebhart, Volker Dolle, Elisabeth Glattki-Mayer, legal representative, Angel Sanchez, Herbert Plötz, Peter Götz, Franz Langhauser, Klaus-Peter Mayer
  • Patent number: 7515456
    Abstract: A memory circuit comprises a D/A converter connected with an input/output circuit and with a writing circuit, wherein the D/A converter converts a digital data with at least two digital bits received from the input/output circuit to one analog value and forwards the analog value to the writing circuit, wherein the digital data is at least a part of a floating point number, wherein the writing circuit writes the analog value in at least one selected memory cell, and an A/D converter connected with a reading circuit and with the input/output circuit, wherein the reading circuit reads an analog value from a selected memory cell and forwards the analog value to the A/D converter, wherein the A/D converter converts the analog value to digital data, and wherein the A/D converter forwards the digital data to the input/output circuit.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: April 7, 2009
    Assignee: Infineon Technologies AG
    Inventors: Peter Mayer, Wolfgang Spirkl, Markus Balb, Christoph Bilger, Martin Brox, Thomas Hein, Michael Richter
  • Publication number: 20080286951
    Abstract: A semiconductor wafer is formed of a substrate wafer of single crystal silicon doped with dopant atoms of the n type or p type, with a front surface and a back surface, contains a layer deposited epitaxially on the front surface of the substrate wafer. The substrate wafer additionally includes an n++ or p++ doped layer, which extends from the front surface of the substrate wafer into the substrate wafer and has a defined thickness. The semiconductor wafer is produced by a process in which dopant atoms of the n type or p type are introduced into the substrate wafer through the front surface of the substrate wafer, the dopant concentration in a layer which extends from the front surface of the substrate wafer into the substrate wafer being increased from the level n+ or p+ to the level n++ or p++, and an epitaxial layer is then deposited on this layer.
    Type: Application
    Filed: July 28, 2008
    Publication date: November 20, 2008
    Applicant: Siltronic AG
    Inventors: Rupert Krautbauer, Gerhard Huettl, Andrej Lenz, Erwin-Peter Mayer, Rainer Winkler
  • Patent number: 7439761
    Abstract: Method of controlling a driver strength and a termination impedance of a signal line of an interface, wherein the driver sends an output signal as an alternating voltage with a frequency, wherein the signal line is terminated with a termination impedance, wherein the driver strength is changed depending on a changing of the frequency of the output signal.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: October 21, 2008
    Assignee: Infineon Technologies AG
    Inventors: Peter Mayer, Wolfgang Spirkl, Markus Balb, Christoph Bilger, Martin Brox, Thomas Hein, Michael Richter
  • Publication number: 20080189481
    Abstract: Methods and apparatus for storing data in different regions of the memory device based on, for example, a reliability requirement of the data. A memory controller may determine a category for data, for example, high reliability data and low reliability data, prior to storing the data in memory. The data may be stored in a region of memory associated with the category of data according to a method associated with the category of data. For example, high reliability data may be stored in a particular region of memory using lower clock frequencies, with additional error correction bits, and/or at multiple redundant locations. In contrast, low reliability data may be stored other regions of the memory using higher clock frequencies, without additional error correction bits and/or at singular locations (i.e., without redundant locations.
    Type: Application
    Filed: February 7, 2007
    Publication date: August 7, 2008
    Inventors: Peter Mayer, Wolfgang Spirkl, Markus Balb, Christoph Bilger, Martin Brox, Thomas Hein, Michael Richter
  • Publication number: 20080187055
    Abstract: The invention concerns a method for interleaving a dedicated set of bits that is divided in an appropriate number of blocks using for each block an interleaver matrix with a predefined first dimension for interleaving the bits within each block, whereby said appropriate number of blocks is estimated in such a way that a value of a second dimension of the interleaver matrix that is needed to interleave the bits within each block lies within a dedicated range, a base station (BS1-BS8), a user terminal (T1-T4) and a communication network (CN) therefor.
    Type: Application
    Filed: February 4, 2008
    Publication date: August 7, 2008
    Applicant: Alcatel Lucent
    Inventors: Carsten HAASE, Holger Heimpel, Michael Ohm, Hans-Peter Mayer