Abstract: A method and apparatus for accessing one or more memory devices using an optical multi-mode signal. The method includes providing an optical multi-mode signal including a first mode and a second mode and transmitting the optical multi-mode signal via an optical multi-mode bus to the one or more memory devices. The first mode is used to perform a first access to the one or more memory devices and the second mode is used to perform a second access to the one or more memory devices.

Abstract: A method and apparatus for accessing a memory device. The method includes providing control signals for an access command to the memory device via an asynchronous interface and transmitting data for the access command to the memory device. The method also includes encoding, into the transmitted data, a clock signal. The encoded clock signal in the transmitted data is used by the memory device for receiving the data transmission.

Abstract: An in vivo screening assay for identifying an agent that interferes with T cell activation and/or -differentiation and/or modulation of other inflammatory effector cells.

Abstract: A display having a screen, and memory for storing picture data is disclosed. In one embodiment, the screen includes a plurality of pixels, the pixels in a first mode of the display being controlled by the picture data stored in the memory, and in a second mode of the display being controlled by picture data received from an external processing unit.

Abstract: Method and apparatus for refreshing selective memory cells. A refresh circuit is connected with the memory cells and operates to refresh data stored in the memory cells on the basis of the values of valid bits having a predefined association with the memory cells.

Abstract: A memory circuit comprises a D/A converter connected with an input/output circuit and with a writing circuit, wherein the D/A converter converts a digital data with at least two digital bits received from the input/output circuit to one analog value and forwards the analog value to the writing circuit, wherein the digital data is at least a part of a floating point number, wherein the writing circuit writes the analog value in at least one selected memory cell, and an A/D converter connected with a reading circuit and with the input/output circuit, wherein the reading circuit reads an analog value from a selected memory cell and forwards the analog value to the A/D converter, wherein the A/D converter converts the analog value to digital data, and wherein the A/D converter forwards the digital data to the input/output circuit.

Abstract: A method of sending data on request from a memory to a device, wherein the memory receives a request from the device for sending predetermined data to the device, wherein the memory sends data and information about the data to the device.

Abstract: A method and system comprising at least two processing units that are connected with at least two memory units, wherein first data buses are connected with the memory units, wherein second data buses are connected with processing units, wherein cross bar switches are disposed between first and second data buses, and wherein a control unit controls the cross bar switches for connecting selected processing units with selected memory units.

Abstract: Memory with at least two memory banks each having memory cells, a control circuit, and at least one bank mode register, wherein the bank mode register stores information about an operation mode of a memory bank, wherein the control circuit operates at least one of the memory banks according to the information of the mode register.

Abstract: Method of controlling a driver strength and a termination impedance of a signal line of an interface, wherein the driver sends an output signal as an alternating voltage with a frequency, wherein the signal line is terminated with a termination impedance, wherein the driver strength is changed depending on a changing of the frequency of the output signal.

Abstract: The present application provides a subcutaneously implantable device for removing fluid from a first location in a body of a patient. The device includes a fluid controller having a fluid inlet and a fluid outlet. The fluid controller is continually operable between a first and second cycle, wherein in the first cycle the fluid controller draws fluid in through the fluid inlet and in the second cycle the fluid controller expels a first portion of the fluid out through the fluid inlet and a second portion of the fluid out through the fluid outlet.

Abstract: A method for testing an electronic module having a memory cell device includes writing an information item to the memory cell device at a first clock frequency and then reading-out the information item from the memory cell device at a second clock frequency. The read out information item is reflected at a reflection point and is written back to the memory cell device at the second clock frequency. The reflected information unit is then read-out from the memory cell device with the first clock frequency.

Abstract: The present invention provides a rotatable storage device including a rotatable platform configured for storing and allowing ease of access to electronic devices such as, printers, facsimile machines, computers, scanners, and others. The rotatable platform include high and low voltage receptacle for connection to the electronic devices. The high and low voltage receptacles provide power, as well as data and voice communication to the electronic devices. The receptacles are connected to a rotatable connector allowing the rotatable platform and receptacle to be rotated in unison without the twisting or tangling of the power and connecting wires. The rotatable connector can take the form of sliprings, brushes, mercury rotatable connectors, or other known devises.

Abstract: The present invention provides interchangeable activity centers having a variety of themes, complexity, or content. Parents, teachers, therapists, or others can select, combine, and arrange two or more activity centers according to a user's interests and capabilities at that time. As the user develops greater skills or begins to lose interest, one or more of the activity centers may be removed, rearranged, or substituted for one or more other activity centers. This may lead to longer interest in the device and better correlate its subject matter with information or materials needed for further development.

Abstract: The invention is directed to systems and methods of digital signal processing and in particular to systems and methods for measurements of thermoreflectance signals, even when they are smaller than the code width of a digital detector used for detection. For example, in some embodiments, the number of measurements done is selected to be sufficiently large so as to obtain an uncertainty less than the code width of the detector. This allows for obtaining images having an enhanced temperature resolution. The invention is also directed to methods for predicting the uncertainty in measurement of the signal based on one or more noise variables associated with the detection process and the number of measurement iterations.

Abstract: A planar lightwave circuit (PLC) (1; 20) comprises an optical device, where the optical device comprises at least one piece of waveguide structure (5; 24), in particular one piece of fiber, which has at least one thin film layer deposited on an end facet (9; 28). Thus, a thin film filter can be integrated in a PLC with minimized insertion loss and high mechanical stability for athermalization.

Abstract: To meter catalysts into a reactor, the catalyst is firstly suspended in a hydrocarbon in a reservoir and the suspension obtained is kept in motion by stirring and then fed via a three-way metering valve and an ejector into the actual reactor, wherein the suspension containing the catalyst is firstly discharged from the reservoir by means of a pump and continuously circulated by returning the suspension via the three-way metering valve within a closed piping system to the reservoir, subsequently setting a pressure in the reservoir which is from 0.1 to 30 bar higher than the pressure in the reactor and then continuously introducing the suspension into the reactor via a flow meter which controls the three-way metering valve and via a downstream ejector by pulse operation of the now open three-way metering valve.

Abstract: A semiconductor wafer is formed of a substrate wafer of single crystal silicon doped with dopant atoms of the n type or p type, with a front surface and a back surface, contains a layer deposited epitaxially on the front surface of the substrate wafer. The substrate wafer additionally includes an n++ or p++ doped layer, which extends from the front surface of the substrate wafer into the substrate wafer and has a defined thickness. The semiconductor wafer is produced by a process in which dopant atoms of the n type or p type are introduced into the substrate wafer through the front surface of the substrate wafer, the dopant concentration in a layer which extends from the front surface of the substrate wafer into the substrate wafer being increased from the level n+ or p+ to the level n++ or p++, and an epitaxial layer is then deposited on this layer.

Abstract: An in vivo screening assay for identifying an agent that interferes with T cell activation and/or -differentiation and/or modulation of other inflammatory effector cells.

Abstract: A system and a method for functionally testing fast semiconductor memory chips. The data shifting method proposed here is based on the fact that a low speed tester writes data and data strobe test patterns to a memory block with a low clock frequency. The connection between the tester and the memory chip is subsequently disconnected for all the data and data strobe lines. This can be done by a relay or integrated circuits on an external circuit board or by test modes in the output circuit of the memory chip, that is to say on-chip. The data and data strobe lights are subsequently divided into two groups of the same size and connected to one another. The data and data strobe test pattern written to the first memory block is then shifted with a high clock frequency into a second memory block, from where it is then shifted back into the first memory block in a further read-write cycle with the high clock frequency.