Patents by Inventor Ping Chuang
Ping Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240137431Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.Type: ApplicationFiled: January 16, 2023Publication date: April 25, 2024Applicants: Chung Yuan Christian University, KGI Securities Co. Ltd.Inventors: Yu-Kuen Lai, Chao-Lin Wang, He-Ping Li, Cheng-Han Chuang, Kai-Po Chang
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Patent number: 11940737Abstract: A method includes receiving a device design layout and a scribe line design layout surrounding the device design layout. The device design layout and the scribe line design layout are rotated in different directions. An optical proximity correction (OPC) process is performed on the rotated device design layout and the rotated scribe line design layout. A reticle includes the device design layout and the scribe line design layout is formed after performing the OPC process.Type: GrantFiled: May 7, 2021Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsueh-Yi Chung, Yung-Cheng Chen, Fei-Gwo Tsai, Chi-Hung Liao, Shih-Chi Fu, Wei-Ti Hsu, Jui-Ping Chuang, Tzong-Sheng Chang, Kuei-Shun Chen, Meng-Wei Chen
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Patent number: 11915755Abstract: A layout of a semiconductor memory device includes a substrate and a ternary content addressable memory (TCAM). The TCAM is disposed on the substrate and includes a plurality of TCAM bit cells, where at least two of the TCAM bit cells are mirror-symmetrical along an axis of symmetry, and each of the TCAM bit cells includes two storage units electrically connected to two word lines respectively, and a logic circuit electrically connected to the storage units. The logic circuit includes two first reading transistors, and two second reading transistors, where each of the second reading transistors includes a gate and source and drain regions, the source and drain regions of the second reading transistors are electrically connected to two matching lines and the first reading transistors, respectively, where the word lines are disposed parallel to and between the matching lines.Type: GrantFiled: January 20, 2022Date of Patent: February 27, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Chun-Hsien Huang, Hsin-Chih Yu, Meng-Ping Chuang, Li-Ping Huang, Yu-Fang Chen
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Publication number: 20240023807Abstract: An optical biometer including a light source, a first-stage coupler, a first and a second second-stage coupler, a first and a second optical path difference generator, a first and a second optical component set, a first and a second detection device is disclosed. The first-stage coupler receives an incident light from the light source and emits first and second first-stage lights. The first second-stage coupler receives the first first-stage light and emits first and second second-stage lights. The second second-stage coupler receives the second first-stage light and emits third and fourth second-stage lights. The first/second optical path difference generator generates the first/fourth second-stage light with the first/second optical path difference. The first/second optical component set emits the second/third second-stage light to a first/second position of an eye and receives a first/second reflected light. The first/second detector receives a first/second detection light.Type: ApplicationFiled: July 13, 2023Publication date: January 25, 2024Inventors: Che-Liang TSAI, William WANG, Chung-Ping CHUANG, Sung-Yang WEI, Hsuan-Hao CHAO, Chung-Cheng CHOU
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Publication number: 20230275142Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.Type: ApplicationFiled: May 5, 2023Publication date: August 31, 2023Inventors: Che-Cheng Chang, Jui-Ping Chuang, Chen-Hsiang Lu, Yu-Cheng Liu, Wei-Ting Chen
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Publication number: 20230269042Abstract: A device is provided, which includes radio-frequency circuitry and an encoder. The encoder is configured to modulate input data to generate a long-range packet, and to transmit the long-range packet to a receiver through the radio-frequency circuitry. The long-range packet includes a long-range signal field (LR-SIG) and a long-range data field (LR-DATA). Each modulated bit in the long-range signal field and the long-range data field is spread into a plurality of spread modulated bits that are distributed into a plurality of symbols in a frequency domain.Type: ApplicationFiled: February 17, 2023Publication date: August 24, 2023Inventors: Tung-Sheng YANG, Hung-Tao HSIEH, Yen-Shuo LU, Wei-Ping CHUANG, Ting-Che TSENG, Wen-Hsien CHIU
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Publication number: 20230197153Abstract: A layout of a semiconductor memory device includes a substrate and a ternary content addressable memory (TCAM). The TCAM is disposed on the substrate and includes a plurality of TCAM bit cells, where at least two of the TCAM bit cells are mirror-symmetrical along an axis of symmetry, and each of the TCAM bit cells includes two storage units electrically connected to two word lines respectively, and a logic circuit electrically connected to the storage units. The logic circuit includes two first reading transistors, and two second reading transistors, where each of the second reading transistors includes a gate and source and drain regions, the source and drain regions of the second reading transistors are electrically connected to two matching lines and the first reading transistors, respectively, where the word lines are disposed parallel to and between the matching lines.Type: ApplicationFiled: January 20, 2022Publication date: June 22, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Chun-Hsien Huang, Hsin-Chih Yu, Meng-Ping Chuang, Li-Ping Huang, Yu-Fang Chen
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Patent number: 11682716Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.Type: GrantFiled: June 15, 2020Date of Patent: June 20, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Che-Cheng Chang, Jui-Ping Chuang, Chen-Hsiang Lu, Yu-Cheng Liu, Wei-Ting Chen
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Publication number: 20230107649Abstract: An automatic eye test device and an automatic eye test method are disclosed. The automatic eye test device includes an automatic positioning module, an automatic test module and an automatic analysis module. The automatic positioning module is configured to automatically complete positioning of an eye of a person to be tested. The automatic test module is coupled to the positioning module and configured to automatically test the eye of the person to be tested to obtain a test result. The automatic analysis module is coupled to the automatic test module and configured to automatically analyze the test result to provide a personalized test suggestion for the person to be tested.Type: ApplicationFiled: July 27, 2022Publication date: April 6, 2023Inventors: William WANG, Chung-Ping CHUANG, Chun Nan LIN, Chung-Cheng CHOU
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Patent number: 11475953Abstract: The invention provides a semiconductor layout pattern, the semiconductor layout pattern includes a substrate, a plurality of ternary content addressable memories (TCAM) are arranged on the substrate, the layout of at least two TCAM is mirror symmetric with each other along an axis of symmetry, and the two TCAM are connected to the same search line (SL) together.Type: GrantFiled: July 16, 2021Date of Patent: October 18, 2022Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Chun-Hsien Huang, Hsin-Chih Yu, Meng-Ping Chuang, Li-Ping Huang
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Patent number: 11248903Abstract: A three-dimension measurement device includes a moving device, a projecting device, a surface-type image-capturing device and a processing device. The moving device carries an object, and moves the object to a plurality of positions. The projecting device generates a first light to the object. The surface-type image-capturing device senses a second light generated by the object in response to the first light to generate a phase image on each of the positions. The processing device is coupled to the surface-type image-capturing device and receives the phase images. The processing device performs a region-of-interest (ROI) operation for the phase images to generate a plurality of ROI images. The processing device performs a multi-step phase-shifting operation for the ROI images to calculate the surface height distribution of the object.Type: GrantFiled: December 17, 2019Date of Patent: February 15, 2022Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chia-Hung Cho, Po-Yi Chang, Yi-Sha Ku, Kai-Ping Chuang, Chih-Hsiang Liu, Fu-Cheng Yang
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Patent number: 11150558Abstract: A developing method is provided. The developing method includes rotating a wafer. The developing method also includes dispensing, through a first nozzle, a developer solution onto the rotated wafer through a first nozzle at a first rotating speed. The developing method further includes dispensing, through a second nozzle, a rinse solution onto the rotated wafer through a second nozzle at a second rotating speed. The second rotating speed is less than the first rotating speed. In addition, the developing method includes simultaneously moving the first nozzle and the second nozzle during either the dispensing of the developer solution or the dispensing of the rinse solution.Type: GrantFiled: April 15, 2020Date of Patent: October 19, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Rem Chen, Ming-Shane Lu, Chung-Hao Chang, Jui-Ping Chuang, Li-Kong Turn, Fei-Gwo Tsai
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Publication number: 20210263425Abstract: A method includes receiving a device design layout and a scribe line design layout surrounding the device design layout. The device design layout and the scribe line design layout are rotated in different directions. An optical proximity correction (OPC) process is performed on the rotated device design layout and the rotated scribe line design layout. A reticle includes the device design layout and the scribe line design layout is formed after performing the OPC process.Type: ApplicationFiled: May 7, 2021Publication date: August 26, 2021Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsueh-Yi CHUNG, Yung-Cheng CHEN, Fei-Gwo TSAI, Chi-Hung LIAO, Shih-Chi FU, Wei-Ti HSU, Jui-Ping CHUANG, Tzong-Sheng CHANG, Kuei-Shun CHEN, Meng-Wei CHEN
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Patent number: 11003091Abstract: A method for exposing a wafer substrate includes forming a reticle having a device pattern. A relative orientation between the device pattern and a mask field of an exposure tool is determined based on mask field utilization. The reticle is loaded on the exposure tool. The wafer substrate is rotated based on an orientation of the device pattern. Radiation is projected through the reticle onto the rotated wafer substrate by the exposure tool, thereby imaging the device pattern onto the rotated wafer substrate.Type: GrantFiled: January 10, 2020Date of Patent: May 11, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsueh-Yi Chung, Yung-Cheng Chen, Fei-Gwo Tsai, Chi-Hung Liao, Shih-Chi Fu, Wei-Ti Hsu, Jui-Ping Chuang, Tzong-Sheng Chang, Kuei-Shun Chen, Meng-Wei Chen
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Publication number: 20210080252Abstract: A three-dimension measurement device includes a moving device, a projecting device, a surface-type image-capturing device and a processing device. The moving device carries an object, and moves the object to a plurality of positions. The projecting device generates a first light to the object. The surface-type image-capturing device senses a second light generated by the object in response to the first light to generate a phase image on each of the positions. The processing device is coupled to the surface-type image-capturing device and receives the phase images. The processing device performs a region-of-interest (ROI) operation for the phase images to generate a plurality of ROI images. The processing device performs a multi-step phase-shifting operation for the ROI images to calculate the surface height distribution of the object.Type: ApplicationFiled: December 17, 2019Publication date: March 18, 2021Applicant: Industrial Technology Research InstituteInventors: Chia-Hung CHO, Po-Yi CHANG, Yi-Sha KU, Kai-Ping CHUANG, Chih-Hsiang LIU, Fu-Cheng YANG
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Publication number: 20210030579Abstract: An arthritis correction and fixation device is used to connect distal and middle phalanges of a finger. The arthritis correction and fixation device includes a first unit, a second unit and a connection unit. The first unit connects with the distal phalange and has a first threaded portion and a first connecting portion. The second unit connects with the middle phalange and has a second threaded portion and a second connecting portion. The first connecting portion and the second connecting portion are connected through the connection unit, so that the first unit and the second unit can actuate relative to each other. When the first threaded portion is rotated, the first connecting portion drives the second unit to move together in a direction away from the first threaded portion, thereby changing a distance between the distal and middle phalanges.Type: ApplicationFiled: July 30, 2019Publication date: February 4, 2021Inventors: Meng-Shin YEN, Cheng-Yu LIU, Chung-Ping CHUANG
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Publication number: 20200337745Abstract: A hallux valgus traction device is disclosed. The hallux valgus traction device includes a first traction unit, a second traction unit and a connection unit. The first traction unit and the second traction unit wind around a first metatarsal bone and a second metatarsal bone respectively. The first traction unit and the second traction unit are connected to each other through the connection unit. When the connection unit is tightened, the connection unit brings the first traction unit and the second traction unit to approach each other, so that the first metatarsal bone and the second metatarsal bone also approach each other.Type: ApplicationFiled: January 22, 2020Publication date: October 29, 2020Inventors: Meng-Shin YEN, Cheng-Yu LIU, Chung-Ping CHUANG
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Publication number: 20200312985Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.Type: ApplicationFiled: June 15, 2020Publication date: October 1, 2020Inventors: Che-Cheng Chang, Jui-Ping Chuang, Chen-Hsiang Lu, Yu-Cheng Liu, Wei-Ting Chen
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Patent number: 10785682Abstract: A data unit processing method performed by a first communication device, comprising: configuring a data unit by the first communication device, the data unit comprising: a specific format preamble following a first packet format; and a symbol part, comprising at least one symbol and following a Wi-Fi long range packet format. The specific format preamble can be decoded according to a first communication standard and the symbol can be decoded according to a Wi-Fi long range mode. The symbol part can be identified according to the specific format preamble. A method can decode the above-mentioned data unit and a communication device can perform the methods are also disclosed.Type: GrantFiled: November 30, 2018Date of Patent: September 22, 2020Assignee: MEDIATEK INC.Inventors: Wei-Ping Chuang, Hsuan-Yu Liu, Hung-Tao Hsieh, Wen-Hsien Chiu, Ching-Chia Cheng, Hsin-Yi Lee
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Publication number: 20200241421Abstract: A developing method is provided. The developing method includes rotating a wafer. The developing method also includes dispensing, through a first nozzle, a developer solution onto the rotated wafer through a first nozzle at a first rotating speed. The developing method further includes dispensing, through a second nozzle, a rinse solution onto the rotated wafer through a second nozzle at a second rotating speed. The second rotating speed is less than the first rotating speed. In addition, the developing method includes simultaneously moving the first nozzle and the second nozzle during either the dispensing of the developer solution or the dispensing of the rinse solution.Type: ApplicationFiled: April 15, 2020Publication date: July 30, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Rem CHEN, Ming-Shane LU, Chung-Hao CHANG, Jui-Ping CHUANG, Li-Kong TURN, Fei-Gwo TSAI