Patents by Inventor Ping Chuang

Ping Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7354623
    Abstract: An organic layer, such as a porous low-K dielectric in an IC, contains pores open at its surface. To close the pores, the organic layer is contacted by a supercritical fluid that is a solvent for the layer. After a small amount of the surface and the wall of the open pores is solvated, a phase transition of the solvated organic material is effected at the surface to cover it with a dense, smooth, non-porous film that seals the open pores.
    Type: Grant
    Filed: May 24, 2004
    Date of Patent: April 8, 2008
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Ya Wang, Ping Chuang, Sunny Wu, Yu-Liang Lin, Hung-Jung Tu, Mei-Sheng Zhou, Henry Lo
  • Publication number: 20070171529
    Abstract: The present invention provides an optical element for diffusing and focusing light. The optical element comprises an optical substrate and a plurality of convexes thereon, wherein the convexes are micrometer-scaled or smaller pyramid structures.
    Type: Application
    Filed: March 15, 2007
    Publication date: July 26, 2007
    Applicant: SPEED TECH CORP.
    Inventor: Ping Chuang
  • Publication number: 20070153669
    Abstract: The present invention provides a method of adjusting light diffusing and light focusing capability of an optical element. First, an optical substrate having a first surface area is provided. Then, pluralities of pervious convexes are formed on an optical substrate, wherein the pervious convexes occupy a second surface area on the optical substrate. Diffusing effect of the optical element can be lowered/improved by increasing/decreasing an arrangement regularity of the pervious convexes. Diffusing effect enlarging/reducing the size of the optical element can also be lowered/increased by enlarging/reducing the size of pervious convexes. The focusing effects of the optical element can be improved/lowered by increasing/decreasing the ratio of the second surface area and the first surface area.
    Type: Application
    Filed: June 22, 2006
    Publication date: July 5, 2007
    Inventor: Ping Chuang
  • Publication number: 20070153391
    Abstract: An optical module is provided. The optical module comprises a light source, a first lens array and a second lens array. The first lens array is located on the light source and the second lens array is located on the first lens array. There are a plurality of curved bumps on the surface of the first lens array. There are a plurality of pyramid bumps on the surface of the second lens array.
    Type: Application
    Filed: June 22, 2006
    Publication date: July 5, 2007
    Inventor: Ping Chuang
  • Publication number: 20060249863
    Abstract: The present invention describes a prism manufacturing method. According to the method, a semiconductor process method is applied to a wafer for forming a master mold. Then, an electroform process is applied to the master mold for forming a mold. The mold can be used to mass-produce prisms by a well-known manufacturing method.
    Type: Application
    Filed: July 6, 2005
    Publication date: November 9, 2006
    Inventor: Ping Chuang
  • Patent number: 7129151
    Abstract: A planarizing method for forming a patterned planarized aperture fill layer within an aperture employs a planarizing stop layer formed of a reductant based material, such as but not limited to a hydrogenated silicon nitride material. The reductant based material provides the planarizing stop layer with enhanced planarizing stop properties. The method is particularly useful within the context of CMP planarizing methods.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: October 31, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ping Chuang, Henry Lo, Mei Shang Zhou
  • Publication number: 20060084288
    Abstract: An LGA connector is used to interconnect an LGA package and a printed circuit board. The LGA connector includes an elastomeric body with a plurality of through-holes. Metal films are formed on inner walls of through-holes and splay out around the mouths of their upper and lower openings. The metal films are formed by vacuum metallization, sputtering, chemical plating, electrical plating or PVD. The through-holes have a funnel-like shape to absorb external stresses and redirect the stress to shrink the through-hole diameters. Moreover, the metal films' elastic deformation is larger than conventional metal conductive fillers so as to improve reliability.
    Type: Application
    Filed: October 19, 2004
    Publication date: April 20, 2006
    Inventors: Ping Chuang, Li-Sen Chen, Chien-Yu Hsu
  • Patent number: 7021941
    Abstract: An LGA connector is used to interconnect an LGA package and a printed circuit board. The LGA connector includes an elastomeric body with a plurality of through-holes. Metal films are formed on inner walls of through-holes and splay out around the mouths of their upper and lower openings. The metal films are formed by vacuum metallization, sputtering, chemical plating, electrical plating or PVD. The through-holes have a funnel-like shape to absorb external stresses and redirect the stress to shrink the through-hole diameters. Moreover, the metal films' elastic deformation is larger than conventional metal conductive fillers so as to improve reliability.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: April 4, 2006
    Assignee: Speed Tech Corp.
    Inventors: Ping Chuang, Li-Sen Chen, Chien-Yu Hsu
  • Patent number: 6987064
    Abstract: A method for wet etching a metal nitride containing layer overlying a silicon oxide containing layer in a semiconductor device or micro-electro-mechanical device manufacturing process including providing a substrate including a silicon oxide containing layer and an overlying exposed metal nitride containing layer; providing a wet etching solution including phosphoric acid and water; adding a silicon containing compound which undergoes a hydrolysis reaction in the wet etching solution; and, contacting the exposed metal nitride containing layer with the wet etching solution for a period of time to remove the metal nitride containing layer.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: January 17, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Ping Chuang, Huxley Lee, Henry Lo
  • Publication number: 20060003169
    Abstract: A method for applying a metal layer to silicon rubber is described. A polyurethane (PU) primer is applied and cured before application of the metal layer. The metal layer can be applied on a PU-coated silicon rubber material or article by vacuum metallization, chemical plating, electrical plating or physical vapor deposition, and preferably by sputtering. The coated metal layer manufactured by the disclosure herein shows high resistance to thermal and oxidative degradations and also has high resistance to water absorption in the work environment.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Inventors: Ping Chuang, Lu-Chin Wu
  • Publication number: 20050260402
    Abstract: An organic layer, such as a porous low-K dielectric in an IC, contains pores open at its surface. To close the pores, the organic layer is contacted by a supercritical fluid that is a solvent for the layer. After a small amount of the surface and the wall of the open pores is solvated, a phase transition of the solvated organic material is effected at the surface to cover it with a dense, smooth, non-porous film that seals the open pores.
    Type: Application
    Filed: May 24, 2004
    Publication date: November 24, 2005
    Inventors: Ching-Ya Wang, Ping Chuang, Sunny Wu, Yu-Liang Lin, Hung-Jung Tu, Mei-Sheng Zhou, Henry Lo
  • Publication number: 20050202763
    Abstract: A method and system for delivering a mixed slurry for use chemical mechanical polishing operation. A first slurry may be mixed with a second slurry to provide a mixed slurry thereof. A flow rate and a mixing ratio associated with the mixed slurry can be controlled to provide an accurate flow rate control and adjustable mixing ratio thereof. The first slurry and the second slurry may be mixed in-line utilizing an in-line mixing mechanism to provide a mixed slurry thereof. Alternatively, the first and second slurries may be pre-mixed utilizing a pre-mixing mechanism to provide a mixed slurry there.
    Type: Application
    Filed: March 9, 2004
    Publication date: September 15, 2005
    Inventors: Ping-Hsu Chen, Chao-Jung Chang, Jui-Cheng Lo, Yu-Liang Lin, Shang-Ting Tsai, Ping Chuang
  • Publication number: 20050186753
    Abstract: A new and improved method for exposing alignment marks on a substrate by locally cutting through a metal or non-metal layer or layers sequentially deposited on the substrate above the alignment marks, using focused ion beam (FIB) technology. In a preferred embodiment, a method for exposing alignment marks on a substrate can be carried out by first providing a substrate that has multiple alignment marks provided thereon and at least one overlying opaque layer, typically but not necessarily metal, deposited on the substrate above the alignment marks. A focused ion beam is then directed against the overlying opaque layer or layers to cut through the layer or layers and expose the alignment marks on the substrate. A noble gas, preferably argon, is typically used as the ion source for the focused ion beam.
    Type: Application
    Filed: February 25, 2004
    Publication date: August 25, 2005
    Inventors: Ping-Hsu Chen, Ping Chuang, Mei-Sheng Zhou, Francis Ko, Huxley Lee, Joshua Tseng, Henry Lo
  • Publication number: 20050158664
    Abstract: A method of integrating a post-etching cleaning process with deposition for a semiconductor device. A substrate having a damascene structure formed by etching a dielectric layer formed thereon using an overlying photoresist mask as an etching mask is provided. A cleaning process is performed by a supercritical fluid to remove the photoresist mask and post-etching by-products. An interconnect layer is formed in-situ in the damascene structure using the supercritical fluid as a reaction medium, wherein the cleaning process and the subsequent interconnect layer formation are performed in one process chamber or in different process chambers of a processing tool.
    Type: Application
    Filed: January 20, 2004
    Publication date: July 21, 2005
    Inventors: Joshua Tseng, Ping Chuang, Hung-Jung Tu, Ching-Ya Wang, Yu-Liang Lin, Henry Lo, Mei-Sheng Zhou
  • Publication number: 20050130449
    Abstract: A method of forming an oxide layer. A fluid, such as water, is heated and pressurized to supercritical or near-supercritical conditions and mixed with at least one oxidizing agent. The supercritical state mixture of the fluid and at least one oxidizing agent is then applied on the workpiece, forming an oxide layer on the workpiece. The at least one oxidizing agent may comprise nitrogen, and the oxide layer formed on the workpiece may comprise a nitrogen doped oxide.
    Type: Application
    Filed: March 10, 2004
    Publication date: June 16, 2005
    Inventors: Ping Chuang, Yu-Liang Lin, Mei-Sheng Zhou
  • Publication number: 20050106895
    Abstract: The present disclosure provides for a method and system for fabricating an insulating layer on a substrate. The method and system provide a fluid to a substrate, wherein the fluid is provided in an aerosol form. The method and system also provides for generating a supercritical process environment proximate to the substrate. The method and system further provides a proximate supercritical process environment having a supercritical process temperature and a supercritical process pressure for altering the fluid, and placing the substrate in contact with the altered fluid, wherein the insulating layer is formed on the substrate by a reaction between the substrate and the fluid.
    Type: Application
    Filed: November 17, 2003
    Publication date: May 19, 2005
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Liang Lin, Ping Chuang, Mei-Sheng Zhou
  • Publication number: 20050095864
    Abstract: A planarizing method for forming a patterned planarized aperture fill layer within an aperture employs a planarizing stop layer formed of a reductant based material, such as but not limited to a hydrogenated silicon nitride material. The reductant based material provides the planarizing stop layer with enhanced planarizing stop properties. The method is particularly useful within the context of CMP planarizing methods.
    Type: Application
    Filed: November 4, 2003
    Publication date: May 5, 2005
    Inventors: Ping Chuang, Henry Lo, Mei Shang Zhou
  • Patent number: 6884149
    Abstract: A method and system for monitoring the quality of a slurry utilized in a chemical mechanical polishing operation. A slurry is generally delivered through a tubular path during a chemical mechanical polishing operation. A laser light is generally transmitted from a laser light source, such that the laser light comes into contact with the slurry during the chemical mechanical polishing operation. The laser light can then be detected, after the laser light comes into contact with the slurry to thereby monitor the quality of the slurry utilized during the chemical mechanical polishing operation. The laser light that comes into contact with the slurry can be also be utilized to monitor a mixing ratio associated with the slurry.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: April 26, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shang-Ting Tsai, Ping Chuang, Henry Lo, Chao-Jung Chang, Ping-Hsu Chen, Yu-Liang Lin, Yu-Huei Chen, Ai-Sen Liu, Syun-Ming Jang
  • Patent number: 6875285
    Abstract: System and method for reducing damage to a semiconductor substrate when using cleaning fluids at elevated pressures to clean the semiconductor substrates. A preferred embodiment comprises applying the cleaning fluid at a first pressure for a first time period, wherein the first pressure is relatively low, and then increasing the pressure of the cleaning fluid to a pressure level that can effectively clean the semiconductor substrate and maintaining the pressure level for a second time period. The application of the cleaning fluid at the relatively low initial pressure acts as a temporary filler and creates a buffer of the cleaning fluid on the semiconductor substrate and helps to dampen the impact of the subsequent high pressure application of the cleaning fluid on the semiconductor substrate.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: April 5, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Ya Wang, Ping Chuang, Yu-Liang Lin, Mei-Sheng Zhou, Henry Lo
  • Patent number: 6872127
    Abstract: The invention relates to disks for conditioning pads used in the chemical mechanical polishing of semiconductor wafers, and a method of fabricating the pads. In one embodiment, the conditioning pad includes multiple, pyramid-shaped, truncated protrusions which are cut or shaped in the surface of a typically stainless steel substrate. Each of the truncated protrusions includes a plateau in the top thereof. A seed layer, typically titanium nitride (TiN), is provided on the surface of the protrusions, and a contact layer such as diamond-like carbon (DLC) or other suitable film is provided over the seed layer. In another embodiment, each of the protrusions is pyramid-shaped and includes a pointed apex at the top thereof.
    Type: Grant
    Filed: July 11, 2002
    Date of Patent: March 29, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Yu-Liang Lin, Henry Lo, Ping Chuang