Abstract: A method for exposing a wafer substrate includes forming a reticle having a device pattern. A relative orientation between the device pattern and a mask field of an exposure tool is determined based on mask field utilization. The reticle is loaded on the exposure tool. The wafer substrate is rotated based on an orientation of the device pattern. Radiation is projected through the reticle onto the rotated wafer substrate by the exposure tool, thereby imaging the device pattern onto the rotated wafer substrate.

Abstract: A layout pattern of a static random access memory (SRAM) includes a substrate, a first pull-up transistor (PL1), a first pull-down transistor (PD1), a second (PL2), and a second pull-down transistor (PD2) on the substrate, and a first pass gate transistor (PG1A), a second pass gate transistor (PG1B), a third pass gate transistor (PG2A) and a fourth pass gate transistor (PG2B), wherein the PG1A and the PG1B comprise an identical first fin structure, the PG2A and the PG2B comprise an identical second fin structure, a first local interconnection layer disposed between the PG1A and the PG1B and disposed on the fin structures of the PL1 and the PD1, a second local interconnection layer disposed between the PG2A and the PG2B and disposed between the fin structures of the PL2 and the PD2.

Abstract: A semiconductor memory device including a memory cell having a plurality of memory cells, a first P-type well region, a second P-type well region, and an N-type well region disposed between the first P-Type well region and the second P-type well region. The semiconductor memory element defines a plurality of first regions and a plurality of second regions, each of the first regions and each of the second regions including one of the memory cells, each of the second regions further includes at least two first voltage providing contacts, and at least one second voltage providing contact, wherein the first voltage providing contacts and the second voltage providing contact are not located within each first region.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.

Abstract: An image sensor and a manufacturing method thereof are provided. The image sensor includes a pixel sensing circuit, a pixel electrode, and an opto-electrical conversion layer. The pixel sensing circuit is corresponding to a plurality of pixel regions. The pixel electrode is disposed on the pixel sensing circuit. The pixel electrode includes a first electrode and a second electrode and is electrically connected to the pixel sensing circuit. The first electrode and the second electrode are coplanar, and have different polarities. The opto-electrical conversion layer is disposed on the pixel sensing circuit. The opto-electrical conversion layer includes a plurality of opto-electrical conversion portions, each of the opto-electrical conversion portions is corresponding to each of the pixel regions, and the opto-electrical conversion portions are separated from each other by a pixel isolation trench.

Abstract: A developing method includes rotating a wafer. A developer solution is dispensed onto the rotated wafer through a first nozzle. The first nozzle is moved from a first position to a second position. The first position and the second position are over the wafer and within a perimeter of the wafer when viewed from a top of the wafer. The developer solution is dispensed through the first nozzle when moving the first nozzle from the first position to the second position. The first nozzle is moved back from the second position to the first position immediately after the first nozzle is moved from the first position to the second position. The developer solution is dispensed through the first nozzle when moving the first nozzle from the second position to the first position.

Abstract: A semiconductor memory device including a memory cell having a plurality of memory cells, a first P-type well region, a second P-type well region, and an N-type well region disposed between the first P-Type well region and the second P-type well region. The semiconductor memory element defines a plurality of first regions and a plurality of second regions, each of the first regions and each of the second regions including one of the memory cells, each of the second regions further includes at least two first voltage providing contacts, and at least one second voltage providing contact, wherein the first voltage providing contacts and the second voltage providing contact are not located within each first region.

Abstract: A semiconductor memory device having a memory cell including a plurality of memory cells, a first P-type well region, a second P-type well region, and an N-type well region disposed between the first P-Type well region and the second P-type well region. The semiconductor memory element defines a plurality of first regions, a plurality of second regions, a plurality of third regions, and a plurality of fourth regions, and each first region includes the memory cell. Each second region, each third region and each fourth region include a voltage contact to provide a voltage to the first P-type well region, the second P-type well region, and the N-type well region. The first region to the fourth region do not overlap with each other.

Abstract: A semiconductor memory device having a memory cell including a plurality of memory cells, a first P-type well region, a second P-type well region, and an N-type well region disposed between the first P-Type well region and the second P-type well region. The semiconductor memory element defines a plurality of first regions, a plurality of second regions, a plurality of third regions, and a plurality of fourth regions, and each first region includes the memory cell. Each second region, each third region and each fourth region include a voltage contact to provide a voltage to the first P-type well region, the second P-type well region, and the N-type well region. The first region to the fourth region do not overlap with each other.

Abstract: A measurement apparatus used to measure an object is disclosed. The measurement apparatus includes at least one sensing unit, a first optical module, a second optical module, a data processing unit and at least one prompting unit. The at least one sensing unit is disposed near the object to perform a contact or proximity sensing on the object. The first optical module is disposed near the object and adjacent to the at least one sensing unit. The first optical module includes at least one lens unit. The second optical module and the object are disposed at opposite sides of the first optical module. The second optical module includes a light source and at least one optical component. The data processing unit is coupled to at least one sensing unit. The at least one prompting unit is coupled to the data processing unit.

Abstract: A method for exposing a wafer substrate includes forming a reticle having a device pattern. A relative orientation between the device pattern and a mask field of an exposure tool is determined based on mask field utilization. The reticle is loaded on the exposure tool. The wafer substrate is rotated based on an orientation of the device pattern. Radiation is projected through the reticle onto the rotated wafer substrate by the exposure tool, thereby imaging the device pattern onto the rotated wafer substrate.

Abstract: An image sensor and a manufacturing method thereof are provided. The image sensor includes a pixel sensing circuit, a pixel electrode, and an opto-electrical conversion layer. The pixel sensing circuit is corresponding to a plurality of pixel regions. The pixel electrode is disposed on the pixel sensing circuit. The pixel electrode includes a first electrode and a second electrode and is electrically connected to the pixel sensing circuit. The first electrode and the second electrode are coplanar, and have different polarities. The opto-electrical conversion layer is disposed on the pixel sensing circuit. The opto-electrical conversion layer includes a plurality of opto-electrical conversion portions, each of the opto-electrical conversion portions is corresponding to each of the pixel regions, and the opto-electrical conversion portions are separated from each other by a pixel isolation trench.

Abstract: An optical measuring apparatus includes a first light source, a second light source and a switching unit. The first light source is used to emit a first light toward a first direction. The second light source is used to emit a second light toward a second direction. The switching unit selectively switches to a first mode or a second mode. When the switching unit switches to the first mode, it blocks the second light and let the first light emitted to an aiming region on eyeball to perform an optical aiming and determine an eye axis center position on the eyeball; when the switching unit switches to the second mode, the switching unit changes the second light from the second direction to the first direction to let the second light emitted to the eye axis center position on the eyeball to perform an optical measurement.

Abstract: An image sensor is provided. The image sensor includes a pixel sensing circuit corresponding to at least a first pixel region and a second pixel region adjacent to each other, a pixel electrode disposed on the pixel sensing circuit, and a opto electrical conversion layer including a photo sensing layer and a carrier transport layer disposed on the pixel sensing circuit and the pixel electrode. The pixel electrode is electrically connected to the pixel sensing circuit and includes a plurality of first electrodes and a plurality of second electrodes. The first electrodes and the second electrodes are coplanar and have different polarities. The first electrode or the second electrode located in the first pixel region is adjacent to the first electrode or the second electrode having the same polarity located in the second pixel region.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate and a gate stack covering a portion of the fin structure. The gate stack includes a work function layer and a gate dielectric layer. The semiconductor device structure also includes an isolation element over the semiconductor substrate and adjacent to the gate stack.

Abstract: An apparatus comprises a process chamber, and a loadlock connected to the process chamber. The loadlock is configured to have a wafer holder disposed therein. The wafer holder is configured to store a plurality of wafers, and is configured to transport the plurality of wafers away from the loadlock.

Abstract: An image sensor including a plurality of pixels and a plurality of pixel sensing circuits is provided. The pixels are arranged in a pixel array. The pixels are configured to sense an image to obtain a plurality of reference pictures. The pixels include a plurality of pixel types. The pixel sensing circuits are respectively and electrically connected to the pixels. The pixel sensing circuits are configured to respectively receive a photo current generated by each of the pixels. The pixels have different characteristic curves based on the pixel types, and at least one of an electrode structure parameter and an electrode bias of each of the pixels is determined according to a correspondingly characteristic curve. In addition, an image sensing method is also provided.

Abstract: A surface measurement device includes a rotating platform, a motion lever, a measuring module and a control module. The rotating platform rotates an object at a rotating speed. The motion lever is above the rotating platform. The measuring module moves to a variety of measuring positions on the motion lever. When the measuring module is at one of the measuring positions, the measuring module measures the heights of a plurality of sampling points on the surface of the object in a sampling frequency. The control module selectively modifies the rotating speed of the rotating platform or the sampling frequency of the measuring module according to the measuring position of the measuring module to make the distance between the sampling points in at least a region of the surface of the object match a sampling rule.

Abstract: An image sensor and a manufacturing method thereof are provided. The image sensor includes a pixel sensing circuit, a pixel electrode, and an opto-electrical conversion layer. The pixel sensing circuit is corresponding to a plurality of pixel regions. The pixel electrode is disposed on the pixel sensing circuit. The pixel electrode includes a first electrode and a second electrode and is electrically connected to the pixel sensing circuit. The first electrode and the second electrode are coplanar, and have different polarities. The opto-electrical conversion layer is disposed on the pixel sensing circuit. The opto-electrical conversion layer includes a plurality of opto-electrical conversion portions, each of the opto-electrical conversion portions is corresponding to each of the pixel regions, and the opto-electrical conversion portions are separated from each other by a pixel isolation trench.