Patents by Inventor Ping Wang

Ping Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • VOLTAGE DETECTION DEVICE AND METHOD FOR PREVENTING SYSTEM FAILURE
    Publication number: 20240142498
    Abstract: A voltage detection device includes: a reference voltage latch circuit, outputting one of a first set of reference voltages and a second sets of reference voltages lower than the first set of reference voltages, as a third set of reference voltages according to a selection signal, and being selectively to be reset or to continue outputting the one of the first and second sets of reference voltages as the third set of reference voltages according to a first detection signal; a first voltage detector, generating the first detection signal according to a fourth set of reference voltages lower than or equal to the first set of reference voltages and an input voltage; a second voltage detector, generating a second detection signal according to the third set of reference voltages and the input voltage; and a digital circuit, generating the selection signal according to the second detection signal.
    Type: Application
    Filed: October 16, 2023
    Publication date: May 2, 2024
    Inventor: Wei-Ping WANG
  • Semiconductor device and method for fabricating the same
    Patent number: 11968911
    Abstract: A method for fabricating a semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) stack on a substrate; forming a first spin orbit torque (SOT) layer on the MTJ stack; forming a first hard mask on the first SOT layer; and using a second hard mask to pattern the first hard mask, the first SOT layer, and the MTJ stack to form a MTJ.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: April 23, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hung-Chan Lin, Yu-Ping Wang, Chien-Ting Lin
  • Semiconductor device and method for fabricating the same
    Patent number: 11968910
    Abstract: A method for fabricating a semiconductor device includes the steps of first forming a magnetic tunneling junction (MTJ) stack on a substrate, forming an etch stop layer on the MTJ stack, forming a first spin orbit torque (SOT) layer on the etch stop layer, and then patterning the first SOT layer, the etch stop layer, and the MTJ stack to form a MTJ.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: April 23, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hung-Chan Lin, Yu-Ping Wang, Chien-Ting Lin
  • METHOD OF SYNTHESIZING THYROID HORMONE ANALOGS AND POLYMORPHS THEREOF
    Publication number: 20240122936
    Abstract: The disclosure describes methods of synthesis of pyridazinone compounds as thyroid hormone analogs and their prodrugs. Preferred methods according to the disclosure allow for large-scale preparation of pyridazinone compounds having high purity. In some embodiments, preferred methods according to the disclosure also allow for the preparation of pyridazinone compounds in better yield than previously used methods for preparing such compounds. Also disclosed are morphic forms of a pyridazinone compound. Further disclosed is a method for treating resistance to thyroid hormone in a subject having at least one TR? mutation.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 18, 2024
    Inventors: D. Keith HESTER, II, Robert J. DUGUID, Martha J. KELLY, Anna CHASNOFF, Gang DONG, Edwin L. CROW, Lianhe SHU, Ping WANG, Duk Soon CHOI
  • LAYOUT PATTERN FOR MAGNETORESISTIVE RANDOM ACCESS MEMORY
    Publication number: 20240130141
    Abstract: A layout pattern for magnetoresistive random access memory (MRAM) includes a substrate having a first active region, a second active region, and a word line connecting region between the first active region and the second active region, a first gate pattern extending along a first direction from the first active region to the second active region, a second gate pattern extending along the first direction from the first active region to the second active region, a first magnetic tunneling junction (MTJ) between the first gate pattern and the second pattern and within the word line connecting region, and a second MTJ between the first gate pattern and the second gate pattern in the first active region. Preferably, top surfaces of the first MTJ and the second MTJ are coplanar.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 18, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Ya-Huei Tsai, Rai-Min Huang, Yu-Ping Wang, Hung-Yueh Chen
  • GUAIANOLIDE SESQUITERPENE LACTONE DERIVATIVES AND PHARMACEUTICAL USE THEREOF
    Publication number: 20240124409
    Abstract: The present application discloses a class of guaianolide sesquiterpene lactone derivatives and pharmaceutical use thereof. The guaianolide sesquiterpene lactone derivative or a pharmaceutically acceptable salt thereof is shown as general formula I. In the present application, a class of novel guaianolide sesquiterpene lactone derivatives are found by structural optimization with abundant natural ingredients such as parthenolide and dehydrocostus lactone as raw materials, which derivatives have good inhibitory activity on the activation of the NLRP3 inflammasome, and the chemical stability, water solubility and oral bioavailability of which are significantly improved, and it is verified by experiments that the derivatives have inhibitory effects on the activity of the NLRP3 inflammasome and have potential pharmaceutical applications.
    Type: Application
    Filed: November 26, 2023
    Publication date: April 18, 2024
    Applicant: NANJING UNIVERSITY OF CHINESE MEDICINE
    Inventors: Lihong HU, Jian LIU, Qi LV, Yang HU, Dong DONG, Ping WANG, Meng YANG
  • Antenna Effect Protection and Electrostatic Discharge Protection for Three-Dimensional Integrated Circuit
    Publication number: 20240120639
    Abstract: A 3D IC package is provided. The 3D IC package includes: a first IC die comprising a first substrate at a back side of the first IC die; a second IC die stacked at the back side of the first IC die and facing the first substrate; a TSV through the first substrate and electrically connecting the first IC die and the second IC die, the TSV having a TSV cell including a TSV cell boundary surrounding the TSV; and a protection module fabricated in the first substrate, wherein the protection module is electrically connected to the TSV, and the protection module is within the TSV cell.
    Type: Application
    Filed: August 10, 2023
    Publication date: April 11, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Hsiang Huang, Fong-Yuan Chang, Tsui-Ping Wang, Yi-Shin Chu
  • Magnetoresistive random access memory and method for fabricating the same
    Patent number: 11956973
    Abstract: A method for fabricating a semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) on a substrate; forming a first spin orbit torque (SOT) layer on the MTJ; forming a passivation layer around the MTJ; forming a second SOT layer on the first SOT layer and the passivation layer; and patterning the second SOT layer and the passivation layer.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hung-Chan Lin, Yu-Ping Wang
  • Semiconductor devices and methods of manufacture
    Patent number: 11955370
    Abstract: A system and methods of forming a dielectric material within a trench are described herein. In an embodiment of the method, the method includes introducing a first precursor into a trench of a dielectric layer, such that portions of the first precursor react with the dielectric layer and attach on sidewalls of the trench. The method further includes partially etching portions of the first precursor on the sidewalls of the trench to expose upper portions of the sidewalls of the trench. The method further includes introducing a second precursor into the trench, such that portions of the second precursor react with the remaining portions of the first precursor to form the dielectric material at the bottom of the trench.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Bo-Cyuan Lu, Ting-Gang Chen, Sung-En Lin, Chunyao Wang, Yung-Cheng Lu, Chi On Chui, Tai-Chun Huang, Chieh-Ping Wang
  • Judgment method for edge node computing result trustworthiness based on trust evaluation
    Patent number: 11956372
    Abstract: The present invention relates to a judgment method for edge node computing result trustworthiness based on trust evaluation, and belongs to the technical field of data processing. By means of the present invention, a security mechanism for trustworthiness of a computing result output by an industrial edge node is guaranteed, the industrial edge node is prevented from outputting error data, and attacks of false data of malicious edge nodes are resisted, it is guaranteed that trustworthy computing results not be tampered are input in the industrial cloud, and a site device is made to receive correct computing results rather than malicious or meaningless messages, thereby improving efficiency and security of industrial production.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: April 9, 2024
    Assignee: CHONGQING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Min Wei, Er Xiong Liang, Ping Wang
  • Semiconductor device and method for fabricating the same
    Patent number: 11957064
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • AUDIO MIXING AND SIGNAL TRANSMISSION METHOD FOR NETWORK STREAMING
    Publication number: 20240114212
    Abstract: An audio mixing method for network streaming includes the steps of establishing a network streaming connection between the first end and the second end, generating a text voiced audio signal based on a trigger signal by the first end, mixing a play signal and the text voiced audio signal into a play signal with the text voiced audio signal, in the state of the network streaming connection, transmitting the play signal with text voiced audio signal to the second end, and the play signal with text voiced audio signal is played by the second end.
    Type: Application
    Filed: December 7, 2023
    Publication date: April 4, 2024
    Inventor: Fu-Ping Wang
  • IRON-RICH PERMANENT MAGNET
    Publication number: 20240112855
    Abstract: The disclosure is directed to an iron-nitride material having a polycrystalline microstructure including a plurality of elongated crystallographic grains with grain boundaries, the iron-nitride material including at least one of an ??-Fe16N2 phase and a body-center-tetragonal (bct) phase comprising Fe and N. The disclosure is also directed a method producing an iron-nitride material.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 4, 2024
    Inventors: Jian-Ping WANG, Md MEHEDI, YanFeng JIANG, Bin MA, Delin ZHANG, Fan ZHANG, Jinming LIU
  • Disposable endoscopy cannula with integrated grasper
    Patent number: 11944267
    Abstract: An endoscopic system includes an integrated grasper device passing through a device lumen in the cannula. The grasper device has distal end forming two jaw portions that are biased to remain in an open position if unconstrained. The grasper has arch shaped portions that push against the inner surface of the device lumen when the grasper is retracted. To close the jaws of the grasper the grasper is retracted proximally until the arch shaped portions engage the opening of the device lumen. Further retraction causes the grasper jaws to close through engagement with the device lumen inner surface. The endoscopy system can include a single-use, removable cannula having a camera module on its distal tip. A re-usable portion can include the hand piece and display screen.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: April 2, 2024
    Assignee: UroViu Corp.
    Inventors: Xiaolong Ouyang, Shih-Ping Wang
  • Semiconductor device and method for fabricating the same
    Patent number: 11950513
    Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a first metal interconnection and a second metal interconnection in the first IMD layer; forming a channel layer on the first metal interconnection and the second metal interconnection; forming a magnetic tunneling junction (MTJ) stack on the channel layer; and removing the MTJ stack to form a MTJ.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: April 2, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Wei Chen, Po-Kai Hsu, Yu-Ping Wang, Hung-Yueh Chen
  • MAGNETORESISTIVE RANDOM ACCESS MEMORY HAVING A RING OF MAGNETIC TUNNELING JUNCTION REGION SURROUNDING AN ARRAY REGION
    Publication number: 20240107895
    Abstract: A semiconductor device includes a substrate having an array region defined thereon, a ring of magnetic tunneling junction (MTJ) region surrounding the array region, a gap between the array region and the ring of MTJ region, and metal interconnect patterns overlapping part of the ring of MTJ region. Preferably, the array region includes a magnetic random access memory (MRAM) region and a logic region and the ring of MTJ region further includes a first MTJ region and a second MTJ region extending along a first direction and a third MTJ region and a fourth MTJ region extending along a second direction.
    Type: Application
    Filed: December 4, 2023
    Publication date: March 28, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Liang Chu, Jian-Cheng Chen, Yu-Ping Wang, Yu-Ruei Chen
  • Sterilization and Deodorization Waste Container Having Dual-Wave Band Ultraviolet Lamp Tube
    Publication number: 20240100209
    Abstract: A sterilization and deodorization waste container having dual-wave band ultraviolet lamp tube includes an isolation chamber provided on an inner side of a container lid and a dual-wave band ultraviolet lamp tube installed in the isolation chamber. The dual-wave band ultraviolet lamp tube is capable of simultaneously generating a direct ultraviolet light wave and an ozone ultraviolet light wave. The isolation chamber includes a reflector housing having a light transmitting window facing an inner cavity of a container body. The dual-wave band ultraviolet lamp tube is controlled by a control circuit to turn on to generate the ultraviolets into an inner cavity of the container body while the container lid is closed and to turn off to stop generating the ultraviolet while the container lid is opened.
    Type: Application
    Filed: July 30, 2021
    Publication date: March 28, 2024
    Applicants: Fujian Nashida Electronic Incorporated Company, Nine Stars Group (U.S.A.) Inc.
    Inventors: Shi Ping Wang, Jiangqun Chen, Youxi Lou, Zhou Lin
  • Circuit board with anti-corrosion properties, method for manufacturing the same, and electronic device having the same
    Patent number: 11943875
    Abstract: A circuit board with anti-corrosion properties, a method for manufacturing the circuit board, and an electronic device are provided. The circuit board includes a circuit substrate, a first protective layer, and a second protective layer. The circuit substrate includes a base layer and an outer wiring layer formed on the base layer. The circuit substrate further defines a via hole connected to the outer wiring layer. The first protective layer is formed on the outer wiring layer and an inner sidewall of the via hole, and is made of a white oil. The second protective layer is formed on the first protective layer.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: March 26, 2024
    Assignee: CHAMP TECH OPTICAL (FOSHAN) CORPORATION
    Inventors: Li-Ping Wang, Yung-Ping Lin, Yong-Kang Zhang, Qiu-Ri Zhang, You-Zhi Lu
  • Magnetoresistive random access memory and method of manufacturing the same
    Patent number: 11944016
    Abstract: A magnetoresistive random access memory, including a substrate, a conductive plug in the substrate, wherein the conductive plug has a notched portion on one side of the upper edge of the conductive plug, and a magnetic memory cell with a bottom electrode electrically connecting with the conductive plug, a magnetic tunnel junction on the bottom electrode and a top electrode on the magnetic tunnel junction, wherein the bottom surface of the magnetic memory cell and the top surface of the conductive plug completely align and overlap each other.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hung-Chan Lin, Yu-Ping Wang, Hung-Yueh Chen
  • Electronic device and method of starting the same
    Patent number: RE49940
    Abstract: A method of starting an electronic device includes: receiving a first wireless signal carrying a first identification data by a wireless receiver before the electronic device enters a normal operating state; comparing the first identification data with a valid data; obtaining an account name and a password according to the first identification data if the first identification data matches the valid data and logging in to an operating system with the account name and the password so as to allow the electronic device to enter the normal operating state; and not logging in to the operating system if the first identification data does not match the valid data.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: April 23, 2024
    Assignee: Getac Holdings Corporation
    Inventor: Chen-Ping Wang