Patents by Inventor Rahul N. Manepalli

Rahul N. Manepalli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FORMING DIE BACKSIDE COATING STRUCTURES WITH CORELESS PACKAGES
    Publication number: 20120153494
    Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include attaching a patterned die backside film (DBF) on a backside of a die, wherein the patterned DBF comprises an opening surrounding at least one through silicon via (TSV) pad disposed on the backside of the die.
    Type: Application
    Filed: December 17, 2010
    Publication date: June 21, 2012
    Inventors: Rahul N. Manepalli, Mohit Mamodia, Dingying Xu, Javier S. Gonzalez, Edward R. Prack
  • IN-SITU FOAM MATERIAL AS INTEGRATED HEAT SPREADER (IHS) SEALANT
    Publication number: 20120139093
    Abstract: An integrated heat spreader (IHS) lid over a semiconductor die connected to a substrate forms a cavity. A bead of foaming material may be placed within the IHS cavity. During an IHS cure and reflow process the foaming material will expand and fill the IHS cavity and the foam's shape conforms to the various surface features present, encapsulating a thermal interface material (TIM) material, and increasing contact area of the foam sealant.
    Type: Application
    Filed: December 1, 2010
    Publication date: June 7, 2012
    Inventors: Paul R. Start, Rahul N. Manepalli
  • FLEXIBLE UNDERFILL COMPOSITIONS FOR ENHANCED RELIABILITY
    Publication number: 20120074597
    Abstract: Underfill materials for fabricating electronic devices are described. One embodiment includes an underfill composition including an epoxy mixture, an amine hardener component, and a filler. The epoxy mixture may include a first epoxy comprising a bisphenol epoxy, a second epoxy comprising a multifunctional epoxy, and a third epoxy comprising an aliphatic epoxy, the aliphatic epoxy comprising a silicone epoxy. The first, second, and third epoxies each have a different chemical structure. Other embodiments are described and claimed.
    Type: Application
    Filed: September 24, 2010
    Publication date: March 29, 2012
    Inventors: Dingying Xu, Nisha Ananthakrishnan, Hong Dong, Rahul N. Manepalli, Nachiket Raravikar, Gregory S. Constable
  • Method of fabricating a capillary-flow underfill compositions
    Patent number: 8093105
    Abstract: An underfill composition is formulated to increase the surface tension thereof for use in capillary underfilling of an integrated circuit die that is coupled to a mounting substrate. A method includes mixing a surface tension-increasing additive with a bulk polymer and a hardener and allowing the underfill composition to flow between the integrated circuit die and the mounting substrate. An article is achieved by the method. The article can be assembled into a computing system.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: January 10, 2012
    Assignee: Intel Corporation
    Inventors: Rahul N. Manepalli, Saikumar Jayaraman
  • DIRECTING THE FLOW OF UNDERFILL MATERIALS USING MAGNETIC PARTICLES
    Publication number: 20110278719
    Abstract: Electronic devices and methods for fabricating electronic devices are described. One method includes providing a substrate and a die, and coupling the die to the substrate, wherein a gap remains between the die and the substrate. The method also includes placing an underfill material on the substrate and delivering at least part of the underfill material into the gap. The method also includes controlling the flow of the underfill material in the gap using magnetic force. Other embodiments are described and claimed.
    Type: Application
    Filed: July 18, 2011
    Publication date: November 17, 2011
    Inventors: Stephen E. LEHMAN, JR., Rahul N. MANEPALLI, Leonel R. ARANA, Wendy CHAN
  • CAPILLARY-FLOW UNDERFILL COMPOSITIONS, PACKAGES CONTAINING SAME, AND SYSTEMS CONTAINING SAME
    Publication number: 20110223722
    Abstract: An underfill composition is formulated to increase the surface tension thereof for use in capillary underfilling of an integrated circuit die that is coupled to a mounting substrate. A method includes mixing a surface tension-increasing additive with a bulk polymer and a hardener and allowing the underfill composition to flow between the integrated circuit die and the mounting substrate. An article is achieved by the method. The article can be assembled into a computing system.
    Type: Application
    Filed: May 23, 2011
    Publication date: September 15, 2011
    Inventors: Rahul N. Manepalli, Saikumar Jayaraman
  • Directing the flow of underfill materials using magnetic particles
    Patent number: 8009442
    Abstract: Electronic devices and methods for fabricating electronic devices are described. One method includes providing a substrate and a die, and coupling the die to the substrate, wherein a gap remains between the die and the substrate. The method also includes placing an underfill material on the substrate and delivering at least part of the underfill material into the gap. The method also includes controlling the flow of the underfill material in the gap using magnetic force. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: August 30, 2011
    Assignee: Intel Corporation
    Inventors: Stephen E. Lehman, Jr., Rahul N. Manepalli, Leonel R. Arana, Wendy Chan
  • Capillary-flow underfill compositions, packages containing same, and systems containing same
    Patent number: 7948090
    Abstract: An underfill composition is formulated to increase the surface tension thereof for use in capillary underfilling of an integrated circuit die that is coupled to a mounting substrate. A method includes mixing a surface tension-increasing additive with a bulk polymer and a hardener and allowing the underfill composition to flow between the integrated circuit die and the mounting substrate. An article is achieved by the method. The article can be assembled into a computing system.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: May 24, 2011
    Assignee: Intel Corporation
    Inventors: Rahul N. Manepalli, Saikumar Jayaraman
  • Die-attach films for chip-scale packaging, packages made therewith, and methods of assembling same
    Patent number: 7816487
    Abstract: A die-attach composition includes a resin such as a thermosetting resin, a hardener, and a low molecular weight oligomer diluent. A die-attach composition includes a polyimide in a major amount and a resin such as a thermosetting resin in a minor amount. The die-attach composition also includes a reactive polymer diluent. Combinations of the low molecular weight oligomer diluent and the reactive polymer diluent are included. The die-attach composition is applied to surface mount technology such as wire-bond dice. A computing system is also included that uses the die-attach composition.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: October 19, 2010
    Assignee: Intel Corporation
    Inventors: Rahul N. Manepalli, Ravindra V. Tanikella
  • Enhancing shock resistance in semiconductor packages
    Patent number: 7718904
    Abstract: A shock load applied to a solder ball may be cushioned by providing a viscoelastic material in association with the solder ball. The viscoelastic material dampens shock loads applied to the solder ball and reduces the rate of failure between the solder ball and the rest of the package.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: May 18, 2010
    Assignee: Intel Corporation
    Inventors: Rahul N. Manepalli, Sairam Agraharam
  • DIRECTING THE FLOW OF UNDERFILL MATERIALS USING MAGNETIC PARTICLES
    Publication number: 20090168390
    Abstract: Electronic devices and methods for fabricating electronic devices are described. One method includes providing a substrate and a die, and coupling the die to the substrate, wherein a gap remains between the die and the substrate. The method also includes placing an underfill material on the substrate and delivering at least part of the underfill material into the gap. The method also includes controlling the flow of the underfill material in the gap using magnetic force. Other embodiments are described and claimed.
    Type: Application
    Filed: December 28, 2007
    Publication date: July 2, 2009
    Inventors: Stephen E. LEHMAN, JR., Rahul N. MANEPALLI, Leonel R. ARANA, Wendy CHAN
  • Integrated circuit devices including compliant material under bond pads and methods of fabrication
    Patent number: 7535114
    Abstract: An integrated circuit device includes a die having an interconnect structure formed over a surface thereof. A volume of compliant material located within the interconnect structure underlies one or more bond pads disposed on an uppermost layer of the interconnect structure. The compliant material may absorb stresses exerted on the interconnect structure during assembly, testing, or subsequent operation. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: May 19, 2009
    Assignee: Intel Corporation
    Inventors: Sairam Agraharam, Rahul N. Manepalli
  • HIGH THERMAL CONDUCTIVITY MOLDING COMPOUND FOR FLIP-CHIP PACKAGES
    Publication number: 20090004317
    Abstract: A molding compound for use in an integrated circuit package comprises an epoxy and a thermally conductive filler material. The thermally conductive filler material comprises between 70% and 95% of the molding compound and has a thermal conductivity between 10 W/m-K and 3000 W/m-K.
    Type: Application
    Filed: June 30, 2007
    Publication date: January 1, 2009
    Inventors: Xuejiao Hu, Leonel R. Arana, Robert M. Nickerson, Rahul N. Manepalli, Dingying Xu
  • Thermally conductive molding compounds for heat dissipation in semiconductor packages
    Publication number: 20080237842
    Abstract: Methods and apparatus relating to thermally conductive molding compounds are described. In one embodiment, a molding compound may include thermally conductive particles to form a thermally conductive path in the molding compound (e.g., for improved heat dissipation through the molding compound). Other embodiments are also described.
    Type: Application
    Filed: March 29, 2007
    Publication date: October 2, 2008
    Inventor: Rahul N. Manepalli
  • CAPILLARY-FLOW UNDERFILL COMPOSITIONS, PACKAGES CONTAINING SAME, AND SYSTEMS CONTAINING SAME
    Publication number: 20080150170
    Abstract: An underfill composition is formulated to increase the surface tension thereof for use in capillary underfilling of an integrated circuit die that is coupled to a mounting substrate. A method includes mixing a surface tension-increasing additive with a bulk polymer and a hardener and allowing the underfill composition to flow between the integrated circuit die and the mounting substrate. An article is achieved by the method. The article can be assembled into a computing system.
    Type: Application
    Filed: December 20, 2006
    Publication date: June 26, 2008
    Inventors: Rahul N. Manepalli, Saikumar Jayaraman
  • Underfilling process in a molded matrix array package using flow front modifying solder resist
    Patent number: 7339276
    Abstract: Placing a flow modifier on a package substrate to create two flow fronts on a molded matrix array package. A flow modifier may be laid on a package substrate to a height that blocks off the bottom of other substrates (e.g., dice) coupled to the package substrate. By separating the top flow front and the bottom flow front, this process prevents the top flow front from wrapping around the sides of the substrates and trapping air below each substrate and in front of the bottom flow front.
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: March 4, 2008
    Assignee: Intel Corporation
    Inventors: Rahul N. Manepalli, Saravanan Krishnan, Choong Kooi Chee
  • Adhesive of folder package
    Patent number: 7335973
    Abstract: A package includes a flexible substrate with a first region and a second region, an encapsulated die supported by the first region, and a conformable fold adhesive introduced between the encapsulated die and the flexible substrate. The second region of the flexible substrate is folded over the surface of the encapsulated die.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: February 26, 2008
    Assignee: Intel Corporation
    Inventors: Rahul N. Manepalli, Karen Y. Paghasian, Shinobu Kourakata, Ruel D R Aranda
  • Methods and systems for attaching die in stacked-die packages
    Patent number: 7224075
    Abstract: A system and a method for producing a multiple-die device by attaching a die to a substrate using a first die-attach material having a first processing temperature and attaching a subsequent die using a second die-attach material having a second processing temperature such that the process of attaching the second die does not degrade the first die-attach material. For one embodiment, multiple dies are attached using each die-attach material. For one embodiment, the first die-attach material is a thermoplastic film and the second and subsequent die-attach materials are reformulations of the thermoplastic film.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: May 29, 2007
    Assignee: Intel Corporation
    Inventors: Rahul N. Manepalli, Shinobu Kourakata, Nina Ricci P. Buenaseda
  • Underfilling process in a molded matrix array package using flow front modifying solder resist
    Patent number: 7151014
    Abstract: Placing a flow modifier on a package substrate to create two flow fronts on a molded matrix array package. A flow modifier may be laid on a package substrate to a height that blocks off the bottom of other substrates (e.g., dice) coupled to the package substrate. By separating the top flow front and the bottom flow front, this process prevents the top flow front from wrapping around the sides of the substrates and trapping air below each substrate and in front of the bottom flow front.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: December 19, 2006
    Assignee: Intel Corporation
    Inventors: Rahul N. Manepalli, Saravanan Krishnan, Choong Kooi Chee
  • Adhesive of folded package
    Patent number: 7033911
    Abstract: A package includes a flexible substrate with a first region and a second region, an encapsulated die supported by the first region, and a conformable fold adhesive introduced between the encapsulated die and the flexible substrate. The second region of the flexible substrate is folded over the surface of the encapsulated die.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: April 25, 2006
    Assignee: Intel Corporation
    Inventors: Rahul N. Manepalli, Karen Y. Paghasian, Shinobu Kourakata, Ruel D R Aranda