Patents by Inventor Recai Sezi

Recai Sezi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7687895
    Abstract: A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also includes an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer. In the molding compound a contact via is arranged.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: March 30, 2010
    Assignee: Infineon Technologies AG
    Inventors: Markus Brunnbauer, Jens Pohl, Klaus Pressel, Thorsten Meyer, Recai Sezi, Stephan Bradl, Ralf Plieninger
  • Publication number: 20100013091
    Abstract: A semiconductor device including a chip including an integrated circuit, a conductive layer, a copolymer layer and metal elements. The conductive layer is disposed over the chip and electrically coupled to the integrated circuit. The copolymer is disposed on the conductive layer. The metal elements are electrically coupled to the conductive layer via through-connects in the copolymer layer.
    Type: Application
    Filed: July 16, 2008
    Publication date: January 21, 2010
    Applicant: Infineon Technologies AG
    Inventors: Thorsten Meyer, Recai Sezi
  • Publication number: 20090294961
    Abstract: A semiconductor device includes a semiconductor chip and a metal layer electrically coupled to the semiconductor chip. The semiconductor device includes an array of solder balls coupled to the metal layer and a front side protect material directly contacting the metal layer and laterally surrounding a portion of at least a plurality of solder balls. The front side protect material is configured to become fluid during solder reflow.
    Type: Application
    Filed: June 2, 2008
    Publication date: December 3, 2009
    Applicant: Infineon Technologies AG
    Inventors: Thorsten Meyer, Recai Sezi, Markus Brunnbauer
  • Publication number: 20090079089
    Abstract: Stacked semiconductor chips are disclosed. One embodiment provides a method including a first substrate having a first surface and an opposing second surface. The first substrate includes an array of first connection elements on the first surface of the first substrate. A second substrate has a first surface and an opposing second surface. The second substrate includes an array of second connection elements on the first surface of the second substrate. The first connection elements is attached to the second connection elements; and is thinning at least one of the first substrate and the second substrate after the attachment of the first connection elements to the second connection elements.
    Type: Application
    Filed: September 21, 2007
    Publication date: March 26, 2009
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Markus Brunnbauer, Recai Sezi, Thorsten Meyer, Gottfried Beer
  • Publication number: 20090014871
    Abstract: A semiconductor device is disclosed. One embodiment includes a semiconductor substrate and at least two insulating elements located above the semiconductor substrate or above a mold compound embedding the semiconductor substrate. The at least two insulating elements have a first face facing the semiconductor substrate or the mold compound and a second face facing away from the semiconductor substrate or the mold compound. A conductive element for each of the at least two insulating elements extends from the first face of the insulating element to the second face of the insulating element.
    Type: Application
    Filed: July 13, 2007
    Publication date: January 15, 2009
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Thorsten Meyer, Markus Brunnbauer, Recai Sezi
  • Patent number: 7476412
    Abstract: The invention relates to a process for the metallization of an insulator and/or a dielectric, wherein the insulator is firstly activated, it is subsequently coated with another insulator and the latter is patterned, then the first is seeded and lastly metallized.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: January 13, 2009
    Assignee: Infineon Technologies AG
    Inventors: Klaus Lowack, Günter Schmid, Recai Sezi
  • Publication number: 20080265383
    Abstract: A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer. In the molding compound a contact via is arranged.
    Type: Application
    Filed: November 14, 2007
    Publication date: October 30, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Markus Brunnbauer, Jens Pohl, Klaus Pressel, Thorsten Meyer, Recai Sezi, Stephan Bradl, Ralf Plieninger
  • Publication number: 20080191197
    Abstract: A memory cell reversibly switchable between different stable electrical resistance states, the memory cell having a first electrode and a second electrode and an active layer arranged between the first and the second electrode, the active layer including a compound represented by general formula , wherein R1 and R2 are independently selected from —H, —(CH2)mCH3, -phenyl, —O—(CH2)mCH3, —O-phenyl, —S(CH2)mCH3, —S-aryl, —NR3R4, —SR3 and -halogen; R1 and R2 may together form a ring; R5 and R6 are independently selected from —H, -alkyl, -aryl and -heteroaryl; m is either 0 or an integer ranging from 1 to 10; n is an integer ranging from 2 to 1000; and a compound represented by general formula wherein R7, R8, R9, R10, R11, R12, R13, and R14 are independently selected from the group consisting of —H, —(CH2)mCH3, -phenyl, —O—(CH2)mCH3, —O-phenyl, —CO(CH2)mCH3, -halogen, —CN and —NO2; R7 and R8 may together form a ring; R8 and R9 may together form a ring; R9 and R10 may together form a ring; R11 and R12 may to
    Type: Application
    Filed: July 21, 2005
    Publication date: August 14, 2008
    Applicant: QIMONDA AG
    Inventors: Andreas Walter, Recai Sezi, Reimund Engl, Anna Maltenberger, Joerg Schumann, Thomas Weitz
  • Publication number: 20080142774
    Abstract: An integrated circuit having resistive memory is disclosed. In one embodiment, the memory includes novel memory cells which have two electrodes and a layer arranged in between and including an active material which contains [1,2]dithiolo[4,3-[c]-1,2-dithiol-3,6-dithione, (2,4,7-trinitro-9-fluorenylidene)malonodinitrile and a polymer are disclosed. In one embodiment, a process for the production of the cells according to the invention is provided, as well as the novel use of a composition which can be used as active material for the memory cells.
    Type: Application
    Filed: July 20, 2005
    Publication date: June 19, 2008
    Applicant: QIMONDA AG
    Inventors: Andreas Walter, Thomas Weitz, Reimund Engl, Recai Sezi, Anna Maltenberger, Joerg Schumann
  • Publication number: 20070242496
    Abstract: A memory arrangement includes: a first line for applying a reference voltage, a second line for applying an operating voltage, and a plurality of resistive memory elements, each element includes a resistive memory cell and a MOS memory cell selection transistor. A NOR memory arrangement is configured with each memory element including the resistive memory cell and selection transistor connected in series with the transistor connected to the first line, and the memory cell connected to the second line. A NAND memory arrangement is configured with a series of resistive memory elements forming a chain with each memory element including the resistive memory cell and selection transistor connected in parallel. The chain is connected to the first line disposed on a side of the memory cells facing the selection transistors and the second line disposed on a side of the memory cells which is remote from the selection transistors.
    Type: Application
    Filed: April 19, 2007
    Publication date: October 18, 2007
    Applicant: QIMONDA AG
    Inventors: Kurt Hoffmann, Christine Dehm, Recai Sezi, Andreas Walter
  • Patent number: 7273821
    Abstract: The present invention relates to a process for producing a porous layer adhering to a substrate, which comprises the steps: a. preparation of a composition comprising an organic polymer constituent and an inorganic-organic constituent and/or an inorganic constituent, b. application of this composition to a substrate and formation of a layer on the substrate, and c. removal of the inorganic-organic constituent and/or the inorganic constituent from the layer to form a porous layer adhering to the substrate.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: September 25, 2007
    Assignee: Infineon Technologies AG
    Inventor: Recai Sezi
  • Publication number: 20070194301
    Abstract: One aspect of the invention relates to a semiconductor arrangement having at least one nonvolatile memory cell which has a first electrode comprising at least two layers; and having an organic material, the organic material forming a compound with that layer of the first electrode which is in direct contact. One aspect of the invention furthermore relates to a method for producing the nonvolatile memory cell, a semiconductor arrangement having a plurality of memory cells according to the invention, and a method for producing the same.
    Type: Application
    Filed: November 24, 2004
    Publication date: August 23, 2007
    Inventors: Recai Sezi, Andreas Walter, Reimund Engl, Anna Maltenberger, Christine Dehm, Sitaram Arkalgud, Igor Kasko, Joachim Nuetzel, Jakob Kriz, Thomas Mikolajick, Cay-Uwe Pinnow
  • Publication number: 20070164276
    Abstract: Layers are produced, where the layers include a first layer formed of a metal and a second layer formed of an organic compound, the metal and the organic compound entering into an interaction, so that the layer serves as an electroactive layer for nonvolatile memories, the metal layer being deposited onto a substrate and, if appropriate, patterned, then being coated with an organic compound and being treated with a second organic compound.
    Type: Application
    Filed: January 10, 2007
    Publication date: July 19, 2007
    Applicant: Qimonda AG
    Inventors: Reimund Engl, Jorg Schumann, Andreas Walter, Recai Sezi, Anna Maltenberger
  • Patent number: 7244803
    Abstract: A dielectric for aluminum and copper metalizations is stable at high temperatures. Surprisingly, in spite of the elimination of water during the cyclization, the polymeric dielectrics are very suitable for filling narrow trenches. The filled trenches exhibit no defects and bubbles or cracks. The polybenzoxazoles have dielectric constants of k?2.7 and are suitable as an electrical insulator. Furthermore, these materials adhere very well on all surfaces relevant for micro-electronics.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: July 17, 2007
    Assignee: Infineon Technologies AG
    Inventors: Recai Sezi, Andreas Walter, Anna Maltenberger, Klaus Lowack, Marcus Halik
  • Patent number: 7238964
    Abstract: A memory cell is provided which comprises two electrodes and a layer arranged in between and comprising an active material comprising (a) a compound selected from the group consisting of in which R1 and R4, independently of one another, may have the following meaning: —H, -alkyl, -aryl, -heteroaryl, —O-alkyl, —O-aryl, —O-heteroaryl, —SH, —S-alkyl, —S-aryl, —S-heteroaryl, —CO-alkyl, —CO-aryl, —CO-heteroaryl, —CS-alkyl, —CS-aryl, —CS-heteroaryl, -halogen, —CN and/or —NO2, in which R1 and R2, R2 and R3, R3 and R4 together may form a ring, (b) a compound of the general formula II: in which R5 to R7, independently of one another, may have the following meaning: —H, -alkyl, -aryl, -heteroaryl, —O-alkyl, —O-aryl, —O-heteroaryl, —NH2, —N(alkyl)2, —N(aryl)2, —N(heteroaryl)2, —SH, —S-alkyl, —S-aryl, —S-heteroaryl, —CO-alkyl, —CO-aryl, —CO-heteroaryl, —CS-alkyl, —CS-aryl, —CS-heteroaryl, -halogen, —CN and/or —NO2, in which R5 and R6 or R7 and R8 together may form a ring, and optionally (c) a polymer.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: July 3, 2007
    Assignee: Infineon Technologies AG
    Inventors: Andreas Walter, Recai Sezi, Reimund Engl, Anna Maltenberger, Joerg Schumann, Thomas Weitz
  • Patent number: 7211856
    Abstract: Memory cells having two electrodes and a layer arranged in between and including an active material which contains hexakisbenzylthiobenzene, dichlorodicyano-p-benzoquinone and optionally a polymer are provided. Furthermore, a process for the production of the cells according to the invention is provided, as well as the novel use of a composition which can be used as active material for the memory cells.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: May 1, 2007
    Assignee: Infineon Technologies AG
    Inventors: Recai Sezi, Andreas Walter, Reimund Engl, Anna Maltenberger, Joerg Schumann, Thomas Weitz
  • Publication number: 20060237716
    Abstract: The present invention relates to compositions for storage applications, relates to a memory cell which comprises the abovementioned composition and two electrodes and furthermore relates to a process for the production of microelectronic components and the use of the composition according to the invention in the production of these microelectronic components.
    Type: Application
    Filed: March 29, 2006
    Publication date: October 26, 2006
    Inventors: Recai Sezi, Andreas Walter, Reimund Engl, Anna Maltenberger, Joerg Schumann
  • Patent number: 7125814
    Abstract: Materials for dielectrics and/or buffer layers in microelectronics utilize polymers can be based on bis-o-nitrophenols. The bis-o-nitrophenols carry a tert-butoxycarbonyl group on at least one of the hydroxyl groups. The polybenzoxazoles prepared from these compounds have a lower dielectric constant than corresponding polymers which are prepared from bis-o-nitrophenols that do not have a tert-butoxycarbonyl group.
    Type: Grant
    Filed: September 16, 2002
    Date of Patent: October 24, 2006
    Assignee: Infineon Technologies AG
    Inventor: Recai Sezi
  • Publication number: 20060214139
    Abstract: Poly-o-hydroxyamides include binaphthyl substituents as repeating units. The poly-o-hydroxyamides can be cyclized to give the polybenzoxazole by heating. Pore formation occurs, so that a dielectric having a very low dielectric constant k of less than 2.5 is obtained.
    Type: Application
    Filed: May 23, 2006
    Publication date: September 28, 2006
    Inventors: Recai Sezi, Andreas Walter, Klaus Lowack, Anna Maltenberger, Robert Banfic
  • Patent number: 7108807
    Abstract: Poly-o-hydroxyamides include binaphthyl substituents as repeating units. The poly-o-hydroxyamides can be cyclized to give the polybenzoxazole by heating. Pore formation occurs, so that a dielectric having a very low dielectric constant k of less than 2.5 is obtained.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: September 19, 2006
    Assignee: Infineon Technologies AG
    Inventors: Recai Sezi, Andreas Walter, Klaus Lowack, Anna Maltenberger, Robert Banfic