Patents by Inventor Richard Carter

Richard Carter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100289090
    Abstract: When forming sophisticated gate electrode structures of transistor elements of different type, the threshold adjusting channel semiconductor alloy may be provided prior to forming isolation structures, thereby achieving superior uniformity of the threshold adjusting material. Consequently, threshold variability on a local and global scale of P-channel transistors may be significantly reduced.
    Type: Application
    Filed: May 10, 2010
    Publication date: November 18, 2010
    Inventors: Stephan Kronholz, Martin Trentzsch, Richard Carter
  • Publication number: 20100289089
    Abstract: Sophisticated gate electrode structures may be formed by providing a cap layer including a desired species that may diffuse into the gate dielectric material prior to performing a treatment for stabilizing the sensitive gate dielectric material. In this manner, complex high-k metal gate electrode structures may be formed on the basis of reduced temperatures and doses for a threshold adjusting species compared to conventional strategies.
    Type: Application
    Filed: May 7, 2010
    Publication date: November 18, 2010
    Inventors: Richard Carter, Martin Trentzsch, Sven Beyer, Rohit Pal
  • Patent number: 7817966
    Abstract: According to one exemplary embodiment, a switching device with phase selection terminals to select between at least two phase shifting modes to reduce intermodulation distortion in the switching device includes a first phase selection terminal to select a first phase shifting mode of the switching device by enabling a first phase shifter in a first phase shifting switching branch coupled to an input of the switching device. The switching device further includes a second phase selection terminal to select a second phase shifting mode of the switching device by enabling a second phase shifting switching branch coupled to the switching device input. The intermodulation distortion in the switching device is reduced by selecting one of the first and second phase shifting modes. The switching device may further include a number of FETs coupled in series between an output of the switching device and the first and second phase shifting switching branches.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: October 19, 2010
    Assignee: Skyworks Solutions, Inc.
    Inventors: Dima Prikhodko, Sergey Nabokin, Oleksey Klimashov, Steven C. Sprinkle, Gene A. Tkachenko, Richard A. Carter
  • Patent number: 7808342
    Abstract: According to one exemplary embodiment, a switching module includes a first harmonic phase tuning filter coupled to a first input of an RF switch. The first harmonic phase tuning filter is configured to provide an output impedance that substantially matches an input impedance of the RF switch at approximately a fundamental frequency and to provide a low impedance at approximately a harmonic frequency generated by the RF switch. The first harmonic phase tuning filter includes an LC circuit coupled between an output terminal of the first harmonic phase tuning filter and a ground and tuned to provide the low impedance at approximately the harmonic frequency generated by the RF switch. The RF switching module further includes a second harmonic phase tuning filter coupled to a second input of the RF switch. The first and second harmonic phase tuning filters can be fabricated on a single semiconductor die.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: October 5, 2010
    Assignee: Skyworks Solutions, Inc.
    Inventors: Dima Prikhodko, Gene A. Tkachenko, Richard A. Carter, Sergey Nabokin, Jason Chiesa, Steven C. Sprinkle, Yu Zhu, Beverly A. Peluso
  • Publication number: 20100244155
    Abstract: In sophisticated transistor elements including a high-k gate metal stack, the integrity of the sensitive gate materials may be ensured by a spacer element that may be concurrently used as an offset spacer for defining a lateral offset of a strain-inducing semiconductor alloy. The cap material of the sophisticated gate stack may be removed without compromising integrity of the offset spacer by providing a sacrificial spacer element. Consequently, an efficient strain-inducing mechanism may be obtained in combination with the provision of a sophisticated gate stack with the required material integrity, while reducing overall process complexity compared to conventional strategies.
    Type: Application
    Filed: March 29, 2010
    Publication date: September 30, 2010
    Inventors: Richard Carter, Sven Beyer, Martin Trentzsch
  • Publication number: 20100244141
    Abstract: During the formation of sophisticated gate electrode structures, a replacement gate approach may be applied in which plasma assisted etch processes may be avoided. To this end, one of the gate electrode structures may receive an intermediate etch stop liner, which may allow the replacement of the placeholder material and the adjustment of the work function in a later manufacturing stage. The intermediate etch stop liner may not negatively affect the gate patterning sequence.
    Type: Application
    Filed: March 29, 2010
    Publication date: September 30, 2010
    Inventors: Sven Beyer, Markus Lenski, Richard Carter, Klaus Hempel
  • Publication number: 20100193872
    Abstract: The work function of a high-k gate electrode structure may be adjusted in a late manufacturing stage on the basis of a lanthanum species in an N-channel transistor, thereby obtaining the desired high work function in combination with a typical conductive barrier material, such as titanium nitride. For this purpose, in some illustrative embodiments, the lanthanum species may be formed directly on the previously provided metal-containing electrode material, while an efficient barrier material may be provided in the P-channel transistor, thereby avoiding undue interaction of the lanthanum species in the P-channel transistor.
    Type: Application
    Filed: January 21, 2010
    Publication date: August 5, 2010
    Inventors: Richard Carter, Sven Beyer, Joachim Metzger, Robert Binder
  • Patent number: 7646260
    Abstract: According to one exemplary embodiment, a switching device with phase selection terminals to select between at least two phase shifting modes to reduce intermodulation distortion in the switching device includes a first phase selection terminal to select a first phase shifting mode of the switching device by enabling a first transmission line in a first phase shifting switching branch coupled to an input of the switching device. The switching device further includes a second phase selection terminal to select a second phase shifting mode of the switching device by enabling a second phase shifting switching branch coupled to the switching device input. The intermodulation distortion in the switching device is reduced by selecting one of the first and second phase shifting modes. The first transmission line is enabled by enabling a FET coupled in series with the first transmission line in the first phase shifting switching branch.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: January 12, 2010
    Assignee: Skyworks Solutions, Inc.
    Inventors: Dima Prikhodko, Sergey Nabokin, Oleksey Klimashov, Steven C. Sprinkle, Gene A. Tkachenko, Richard A. Carter
  • Patent number: 7560232
    Abstract: Methods for specific RNA capture, detection and quantification are presented utilizing a protein that selectively binds RNA:DNA hybrids, preferably an RNase H that is modified to reduce degradation of the nucleic acid molecules and enhance specific detection of mixed RNA:DNA nucleic acid hybrids. Labeling of the RNA and/or amplification is not required to perform these methods. Modified RNase H enzymes useful in such methods are disclosed.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: July 14, 2009
    Assignee: Promega Corporation
    Inventors: Richard Carter, Martin Rosenburg, Daniel R. Gentry, Nigel Grinter
  • Publication number: 20090015508
    Abstract: According to one exemplary embodiment, a switching device with phase selection terminals to select between at least two phase shifting modes to reduce intermodulation distortion in the switching device includes a first phase selection terminal to select a first phase shifting mode of the switching device by enabling a first phase shifter in a first phase shifting switching branch coupled to an input of the switching device. The switching device further includes a second phase selection terminal to select a second phase shifting mode of the switching device by enabling a second phase shifting switching branch coupled to the switching device input. The intermodulation distortion in the switching device is reduced by selecting one of the first and second phase shifting modes. The switching device may further include a number of FETs coupled in series between an output of the switching device and the first and second phase shifting switching branches.
    Type: Application
    Filed: July 13, 2007
    Publication date: January 15, 2009
    Inventors: Dima Prikhodko, Sergey Nabokin, Oleksey Klimashov, Steven C. Spinkle, Gene A. Tkachenko, Richard A. Carter
  • Publication number: 20090015347
    Abstract: According to one exemplary embodiment, a switching device with phase selection terminals to select between at least two phase shifting modes to reduce intermodulation distortion in the switching device includes a first phase selection terminal to select a first phase shifting mode of the switching device by enabling a first transmission line in a first phase shifting switching branch coupled to an input of the switching device. The switching device further includes a second phase selection terminal to select a second phase shifting mode of the switching device by enabling a second phase shifting switching branch coupled to the switching device input. The intermodulation distortion in the switching device is reduced by selecting one of the first and second phase shifting modes. The first transmission line is enabled by enabling a FET coupled in series with the first transmission line in the first phase shifting switching branch.
    Type: Application
    Filed: July 13, 2007
    Publication date: January 15, 2009
    Inventors: Dima Prikhodko, Sergey Nabokin, Oleksey Klimashov, Steven C. Sprinkle, Gene A. Tkachenko, Richard A. Carter
  • Patent number: 7469013
    Abstract: A wireless broadband communications system that can maintain high data rates while taking into account channel interference resulting from operating in shared frequency bands, signal fading resulting from dynamic channel degradation, and signal distortion resulting from compliance with maximum power output regulations. In one mode of operation, the system performs adaptive modulation by transmitting a first signal over a selected channel using a first modulation mode having a level of distortion associated therewith resulting from operating the system at a predetermined maximum power output level. Next, a SINAD level is measured on the first channel. The level of distortion associated with the first modulation mode is then subtracted from the measured SINAD level to obtain a first noise level.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: December 23, 2008
    Assignee: Mototola, Inc.
    Inventors: Philip A. Bolt, Timothy G. Wild, Gregor R. Dean, Paul Clark, Peter N. Strong, Richard A. Carter, Antony C. Holmes, Colin H. V. Spier, Nigel J. R. King
  • Publication number: 20080166981
    Abstract: A switch element includes a switch device having a drain, a source and a plurality of gates, and at least one additional interconnect located between the plurality of gates, the additional interconnect operative to establish a constant potential between the at least two gates.
    Type: Application
    Filed: November 6, 2007
    Publication date: July 10, 2008
    Inventors: Dima Prikhodko, Jerod F. Mason, Steven P. Matte, John Pessia, Jason Chiesa, Sergey Nabokin, Gene A. Tkachenko, Richard A. Carter, Steven C. Sprinkle, Mikhail Shirokov
  • Publication number: 20080150090
    Abstract: A method of forming a metal gate in a wafer. PolySi1-xGex and polysilicon are used to form a tapered groove. Gate oxide, PolySi1-xGex, and polysilicon is deposited on a wafer. A resist pattern is formed. A portion of the polysilicon, PolySi1-xGex, and gate oxide is removed to provide a tapered profile. The resist is removed; a dielectric liner is deposited, and then at least a portion of the dielectric liner is removed, thereby exposing the polysilicon and leaving the dielectric liner in contact with the polysilicon, PolySi1-xGex, and gate oxide. A dielectric is deposited, and a portion is removed thereby exposing the polysilicon. The polysilicon, PolySi1-xGex, and gate oxide is removed from inside the dielectric liner, thereby leaving a tapered gate groove. Metal is then deposited in the groove.
    Type: Application
    Filed: January 29, 2008
    Publication date: June 26, 2008
    Applicant: LSI LOGIC CORPORATION
    Inventors: Hong Lin, Wai Lo, Sey-Shing Sun, Richard Carter
  • Patent number: 7365015
    Abstract: A method of forming a metal gate in a wafer. PolySi1-xGex and polysilicon are used to form a tapered groove. Gate oxide, PolySi1-xGex, and polysilicon is deposited on a wafer. A resist pattern is formed. A portion of the polysilicon, PolySi1-xGex, and gate oxide is removed to provide a tapered profile. The resist is removed; a dielectric liner is deposited, and then at least a portion of the dielectric liner is removed, thereby exposing the polysilicon and leaving the dielectric liner in contact with the polysilicon, PolyS1-xGex, and gate oxide. A dielectric is deposited, and a portion is removed thereby exposing the polysilicon. The polysilicon, PolySi1-xGex, and gate oxide is removed from inside the dielectric liner, thereby leaving a tapered gate groove. Metal is then deposited in the groove.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: April 29, 2008
    Assignee: LSI Logic Corporation
    Inventors: Hong Lin, Wai Lo, Sey-Shing Sun, Richard Carter
  • Publication number: 20080079514
    Abstract: According to one exemplary embodiment, a switching module includes a first harmonic phase tuning filter coupled to a first input of an RF switch. The first harmonic phase tuning filter is configured to provide an output impedance that substantially matches an input impedance of the RF switch at approximately a fundamental frequency and to provide a low impedance at approximately a harmonic frequency generated by the RF switch. The first harmonic phase tuning filter includes an LC circuit coupled between an output terminal of the first harmonic phase tuning filter and a ground and tuned to provide the low impedance at approximately the harmonic frequency generated by the RF switch. The RF switching module further includes a second harmonic phase tuning filter coupled to a second input of the RF switch. The first and second harmonic phase tuning filters can be fabricated on a single semiconductor die.
    Type: Application
    Filed: July 12, 2007
    Publication date: April 3, 2008
    Inventors: Dima Prikhodko, Gene A. Tkachenko, Richard A. Carter, Sergey Nabokin, Jason Chiesa, Steven C. Sprinkle, Yu Zhu, Beverly A. Peluso
  • Publication number: 20080079513
    Abstract: According to one exemplary embodiment, a switching module includes a first harmonic phase tuning filter coupled to a first input of an RF switch. The first harmonic phase tuning filter is configured to provide an output impedance that substantially matches an input impedance of the RF switch at approximately a fundamental frequency and to provide a high impedance at approximately a harmonic frequency generated by the RF switch. The first harmonic phase tuning filter includes an LC circuit coupled between input and output terminals of the first harmonic phase tuning filter and tuned to provide the high impedance at approximately the harmonic frequency generated by the RF switch. The RF switching module further includes a second harmonic phase tuning filter coupled to a second input of the RF switch. The first and second harmonic phase tuning filters can be fabricated on a single semiconductor die.
    Type: Application
    Filed: July 12, 2007
    Publication date: April 3, 2008
    Inventors: Dima Prikhodko, Gene A. Tkachenko, Richard A. Carter, Sergey Nabokin, Jason Chiesa, Steven C. Sprinkle, Yu Zhu, Beverly A. Peluso
  • Patent number: 7333455
    Abstract: A wireless broadband communications system that can transmit signals over communications links with multiple modes of diversity, thereby allowing signals having very low correlation to propagate over the link along multiple orthogonal paths. The system can be implemented as a non-line-of-sight (NLOS) system or a line-of-sight (LOS) system. The NLOS system employs orthogonal frequency division modulation (OFDM) waveforms to reduce multi-path interference and frequency selective fading, adaptive modulation to assure high data rates in the presence of channel variability, and spectrum management to achieve increased data throughput and link availability. The LOS system employs space-time coding and spatial and polarization diversity to minimize ground bounce nulls. The system achieves levels of link availability, data throughput, and system performance that have heretofore been unattainable in wireless broadband communications systems.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: February 19, 2008
    Assignee: Piping Hot Networks Ltd
    Inventors: Philip A. Bolt, Timothy G. Wild, Gregor R. Dean, Paul Clark, Peter N. Strong, Richard A. Carter, Antony C. Holmes, Colin H. V. Spier, Nigel J. R. King
  • Patent number: 7330697
    Abstract: Techniques for facilitating and reducing the costs associated with the installation of a wireless broadband communications system. In one mode of operation, the system employs a first transceiver to identify n channels having the n lowest levels of noise and interference associated therewith by a spectrum management technique. Next, the first transceiver transmits a predetermined code over the n channels to a second transceiver, which attempts to identify the predetermined code within a captured transmission. In the event the code is correctly identified, the second transceiver measures a noise and/or interference level associated with the corresponding channels. The channel having the lowest measured noise and interference level is then selected for use in system installation.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: February 12, 2008
    Assignee: Piping Hot Networks Ltd.
    Inventors: Philip A. Bolt, Timothy G. Wild, Gregor R. Dean, Paul Clark, Peter N. Strong, Richard A. Carter, Antony C. Holmes, Colin H. V. Spier, Nigel J. R. King
  • Patent number: 7330698
    Abstract: A wireless broadband communications system that increases data throughput and link availability through more efficient use of the electromagnetic spectrum allocated to the system. In one mode of operation, the system periodically measures a noise or interference level associated with each one of a plurality of communications channels, and generates a histogram of the measurements associated with each channel. Next, the system determines a noise/interference level estimate for each channel as a predetermined percentile of the histogram associated with the respective channel. The system then selects a respective one of the channels having the lowest noise/interference level estimate for subsequent signal transmission.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: February 12, 2008
    Assignee: Piping Hot Networks Ltd.
    Inventors: Philip A. Bolt, Timothy G. Wild, Gregor R. Dean, Paul Clark, Peter N. Strong, Richard A. Carter, Antony C. Holmes, Colin H. V. Spier, Nigel J. R. King