Patents by Inventor Richard Hammond

Richard Hammond has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060197124
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: May 1, 2006
    Publication date: September 7, 2006
    Applicant: AmberWave Systems Corporation
    Inventors: Anthony Lochtefeld, Thomas Langdo, Richard Hammond, Matthew Currie, Glyn Braithwaite, Eugene Fitzgerald
  • Publication number: 20060197125
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: May 2, 2006
    Publication date: September 7, 2006
    Applicant: AmberWave Systems Corporation
    Inventors: Thomas Langdo, Matthew Currie, Glyn Braithwaite, Richard Hammond, Anthony Lochtefeld, Eugene Fitzgerald
  • Publication number: 20060197126
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: May 2, 2006
    Publication date: September 7, 2006
    Applicant: AmberWave Systems Corporation
    Inventors: Anthony Lochtefeld, Thomas Langdo, Richard Hammond, Matthew Currie, Glyn Braithwaite, Eugene Fitzgerald
  • Publication number: 20060197123
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: May 1, 2006
    Publication date: September 7, 2006
    Applicant: AmberWave Systems Corporation
    Inventors: Anthony Lochtefeld, Thomas Langdo, Richard Hammond, Matthew Currie, Glyn Braithwaite, Eugene Fitzgerald
  • Publication number: 20060186510
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: April 27, 2006
    Publication date: August 24, 2006
    Applicant: AmberWave Systems Corporation
    Inventors: Anthony Lochtefeld, Thomas Langdo, Richard Hammond, Matthew Currie, Glyn Braithwaite, Eugene Fitzgerald
  • Patent number: 7084431
    Abstract: A layered structure for forming electronic devices thereon is provided. The layered structure includes an over-shoot layer, Si1?yGey, within a relaxed Si1?xGex layer, wherein y=X+Z and Z is in the range from 0.01 to 0.1 and X is from 0.35 to 0.5. The over-shoot layer has a thickness that is less than its critical thickness.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: August 1, 2006
    Assignee: International Business Machines Corporation
    Inventors: Jack Oon Chu, Richard Hammond, Khalid EzzEldin Ismail, Steven John Koester, Patricia May Mooney, John A. Ott
  • Patent number: 7074623
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: July 11, 2006
    Assignee: AmberWave Systems Corporation
    Inventors: Anthony J. Lochtefeld, Thomas A. Langdo, Richard Hammond, Matthew T. Currie, Glyn Braithwaite, Eugene A. Fitzgerald
  • Patent number: 6995430
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: February 7, 2006
    Assignee: AmberWave Systems Corporation
    Inventors: Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Anthony J. Lochtefeld, Eugene A. Fitzgerald
  • Patent number: 6982474
    Abstract: A semiconductor device and a method for fabricating a semiconductor device involve a semiconductor layer that includes a first material and a second material. The first and second materials can be silicon and germanium. A contact of the device has a portion proximal to the semiconductor layer and a portion distal to the semiconductor layer. The distal portion includes the first material and the second material. A metal layer formed adjacent to the relaxed semiconductor layer and adjacent to the distal portion of the contact is simultaneously reacted with the relaxed semiconductor layer and with the distal portion of the contact to provide metallic contact material.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: January 3, 2006
    Assignee: AmberWave Systems Corporation
    Inventors: Matthew T. Currie, Richard Hammond
  • Publication number: 20050280103
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: August 25, 2005
    Publication date: December 22, 2005
    Applicant: AmberWave Systems Corporation
    Inventors: Thomas Langdo, Matthew Currie, Glyn Braithwaite, Richard Hammond, Anthony Lochtefeld, Eugene Fitzgerald
  • Publication number: 20050218453
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: May 10, 2005
    Publication date: October 6, 2005
    Applicant: AmberWave Systems Corporation
    Inventors: Thomas Langdo, Matthew Currie, Richard Hammond, Anthony Lochtefeld, Eugene Fitzgerald
  • Publication number: 20050212061
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: May 12, 2005
    Publication date: September 29, 2005
    Applicant: AmberWave Systems Corporation
    Inventors: Thomas Langdo, Matthew Currie, Richard Hammond, Anthony Lochtefeld, Eugene Fitzgerald
  • Publication number: 20050205934
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: May 11, 2005
    Publication date: September 22, 2005
    Applicant: AmberWave Systems Corporation
    Inventors: Anthony Lochtefeld, Thomas Langdo, Richard Hammond, Matthew Gurrie, Eugene Fitzgerald
  • Publication number: 20050202640
    Abstract: A method of fabricating a semiconductor device including providing a semiconductor heterostructure, the heterostructure having a relaxed Si1-xGex layer on a substrate, a strained channel layer on the relaxed Si1-xGex layer, and a Si1-yGey layer; removing the Si1-yGey layer; and providing a dielectric layer. The dielectric layer includes a gate dielectric of a MISFET. In alternative embodiments, the heterostructure includes a SiGe spacer layer and a Si layer.
    Type: Application
    Filed: December 16, 2004
    Publication date: September 15, 2005
    Applicant: AmberWave Systems Corporation
    Inventors: Eugene Fitzgerald, Richard Hammond, Matthew Currie
  • Publication number: 20050199954
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: May 13, 2005
    Publication date: September 15, 2005
    Applicant: AmberWave Systems Corporation
    Inventors: Anthony Lochtefeld, Thomas Langdo, Richard Hammond, Matthew Currie, Eugene Fitzgerald
  • Publication number: 20050189563
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: May 3, 2005
    Publication date: September 1, 2005
    Applicant: AmberWave Systems Corporation
    Inventors: Anthony Lochtefeld, Thomas Langdo, Richard Hammond, Matthew Currie, Eugene Fitzgerald
  • Patent number: 6933518
    Abstract: Circuits for processing radio frequency (“RF”) and microwave signals are fabricated using field effect transistors (“FETs”) that have one or more strained channel layers disposed on one or more planarized substrate layers. FETs having such a configuration exhibit improved values for, for example, transconductance and noise figure. RF circuits such as, for example, voltage controlled oscillators (“VCOs”), low noise amplifiers (“LNAs”), and phase locked loops (“PLLs”) built using these FETs also exhibit enhanced performance.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: August 23, 2005
    Assignee: Amberwave Systems Corporation
    Inventors: Glyn Braithwaite, Richard Hammond, Matthew Currie
  • Publication number: 20050156246
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: March 7, 2005
    Publication date: July 21, 2005
    Applicant: AmberWave Systems Corporation
    Inventors: Anthony Lochtefeld, Thomas Langdo, Richard Hammond, Matthew Currie, Eugene Fitzgerald
  • Publication number: 20050156210
    Abstract: A semiconductor device and a method for fabricating a semiconductor device involve a semiconductor layer that includes a first material and a second material. The first and second materials can be silicon and germanium. A contact of the device has a portion proximal to the semiconductor layer and a portion distal to the semiconductor layer. The distal portion includes the first material and the second material. A metal layer formed adjacent to the relaxed semiconductor layer and adjacent to the distal portion of the contact is simultaneously reacted with the relaxed semiconductor layer and with the distal portion of the contact to provide metallic contact material.
    Type: Application
    Filed: March 7, 2005
    Publication date: July 21, 2005
    Applicant: AmberWave Systems Corporation
    Inventors: Matthew Currie, Richard Hammond
  • Publication number: 20050130361
    Abstract: A MOSFET device in strained silicon-on-SiGe and a method of forming the device are described. The said device achieves reduced junction leakage due to the lower band-gap values of SiGe. The method consists of forming isolation trenches in a composite strained-Si/SiGe substrate and growing a liner oxide by wet oxidation such that oxidation is selective to SiGe only, with negligible oxidation of silicon surfaces. Selective oxidation results in oxide encroachment under strained-Si, thereby reducing the junction area after device fabrication is completed. Reduced junction area leads to reduced n+/p or p+/n junction leakage current.
    Type: Application
    Filed: January 14, 2005
    Publication date: June 16, 2005
    Inventors: Narayanan Balasubramanian, Richard Hammond