Patents by Inventor Rishabh

Rishabh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11539204
    Abstract: A power distribution system includes a first intelligent circuit breaker; a plurality of second intelligent circuit breakers, the second intelligent circuit breaker is structured to transmit the circuit breaker information to the first intelligent circuit breaker; and an energy monitoring device coupled to the first and second intelligent circuit breakers and structured to receive the circuit breaker information, the energy monitoring device including a dynamic coordination system structured to: (i) determine whether an adjustment to configuration setting of an intelligent circuit breaker is required based at least in part on the circuit breaker information, (ii) identify the intelligent circuit breaker with the configuration setting required to be adjusted based on a determination that the adjustment is required, and (iii) transmit an alert to user, indicating that the adjustment to the configuration setting of the identified intelligent circuit breaker is required and device address of the identified intell
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: December 27, 2022
    Assignee: EATON INTELLIGENT POWER LIMITED
    Inventor: Rishabh Dixit
  • Publication number: 20220406318
    Abstract: Embodiments are disclosed for bitrate distribution in immersive voice and audio services. In an embodiment, a method of encoding an IVAS bitstream comprises: receiving an input audio signal; downmixing the input audio signal into one or more downmix channels and spatial metadata; reading a set of one or more bitrates for the downmix channels and a set of quantization levels for the spatial metadata from a bitrate distribution control table; determining a combination of the one or more bitrates for the downmix channels; determining a metadata quantization level from the set of metadata quantization levels using a bitrate distribution process; quantizing and coding the spatial metadata using the metadata quantization level; generating, using the combination of one or more bitrates, a downmix bitstream for the one or more downmix channels; combining the downmix bitstream, the quantized and coded spatial metadata and the set of quantization levels into the IVAS bitstream.
    Type: Application
    Filed: October 28, 2020
    Publication date: December 22, 2022
    Applicant: Dolby Laboratories Licensing Corporation
    Inventors: Rishabh TYAGI, Juan Felix TORRES, Stefanie BROWN
  • Patent number: 11527640
    Abstract: Wrap-around contact structures for semiconductor nanowires and nanoribbons, and methods of fabricating wrap-around contact structures for semiconductor nanowires and nanoribbons, are described. In an example, an integrated circuit structure includes a semiconductor nanowire above a first portion of a semiconductor sub-fin. A gate structure surrounds a channel portion of the semiconductor nanowire. A source or drain region is at a first side of the gate structure, the source or drain region including an epitaxial structure on a second portion of the semiconductor sub-fin, the epitaxial structure having substantially vertical sidewalls in alignment with the second portion of the semiconductor sub-fin. A conductive contact structure is along sidewalls of the second portion of the semiconductor sub-fin and along the substantially vertical sidewalls of the epitaxial structure.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: December 13, 2022
    Assignee: Intel Corporation
    Inventors: Rishabh Mehandru, Tahir Ghani, Stephen Cea, Biswajeet Guha
  • Patent number: 11526855
    Abstract: A method for translating transaction messages includes receiving, by a server from an acquirer, an inbound transaction message that is associated with a transaction and pursuant to a first message format supported by the acquirer. The server translates the inbound transaction message from the first message format to a second message format supported by the server when the first and second message formats are different. The server processes the inbound transaction message having the second message format and generates an outbound transaction message having the second message format. The server translates the outbound transaction message from the second message format to a third message format supported by an issuer that corresponds to the transaction when the second and third message formats are different, and transmits the translated outbound transaction to the issuer for processing the transaction. Thus, the method allows the server to translate transaction messages between different message formats.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: December 13, 2022
    Assignee: MASTERCARD INTERNATIONAL INCORPORATED
    Inventors: Gaurav K Patni, Ketan Shrikant Joshi, Rishabh Sisodia
  • Patent number: 11527613
    Abstract: An apparatus is provided which comprises: a plurality of nanowire transistors stacked vertically, wherein each nanowire transistor of the plurality of nanowire transistors comprises a corresponding nanowire of a plurality of nanowires; and a gate stack, wherein the gate stack fully encircles at least a section of each nanowire of the plurality of nanowires.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: December 13, 2022
    Assignee: INTEL CORPORATION
    Inventors: Aaron Lilak, Patrick Keys, Sean Ma, Stephen Cea, Rishabh Mehandru
  • Patent number: 11527612
    Abstract: Gate-all-around integrated circuit structures having vertically discrete source or drain structures, and methods of fabricating gate-all-around integrated circuit structures having vertically discrete source or drain structures, are described. For example, an integrated circuit structure includes a vertical arrangement of horizontal nanowires. A gate stack is around the vertical arrangement of horizontal nanowires. A first epitaxial source or drain structure is at a first end of the vertical arrangement of horizontal nanowires, the first epitaxial source or drain structure including vertically discrete portions aligned with the vertical arrangement of horizontal nanowires. A second epitaxial source or drain structure is at a first end of the vertical arrangement of horizontal nanowires, the second epitaxial source or drain structure including vertically discrete portions aligned with the vertical arrangement of horizontal nanowires.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: December 13, 2022
    Assignee: Intel Corporation
    Inventors: Glenn Glass, Anand Murthy, Biswajeet Guha, Dax M. Crum, Sean Ma, Tahir Ghani, Susmita Ghose, Stephen Cea, Rishabh Mehandru
  • Patent number: 11523411
    Abstract: The present disclosure provides a method for radio-resource scheduling in a telecommunication network. The method comprises selecting at least one objective associated with a radio-resource scheduling from a plurality of objectives; prioritizing at least one flow from a plurality of flows for the selected at least one objective; identifying at least one state parameter from a plurality of state parameters associated with at least one of an active bearers from a plurality of active bearers; inputting at least one of the plurality of state parameters for the at least one of the active bearers to be scheduled during a current transmission time interval (TTI) to a reinforcement machine learning (ML) network, the reinforcement ML network being configured for a reward in accordance with the selected at least one objective; and receiving, from the reinforcement ML network, a radio resource allocation for each of the active bearers for the current TTI.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: December 6, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jitender Singh Shekhawat, Rishabh Agrawal, Anshuman Nigam, Konchady Gautam Shenoy, Yash Jain
  • Patent number: 11522072
    Abstract: Vertical integration schemes and circuit elements architectures for area scaling of semiconductor devices are described. In an example, an inverter structure includes a semiconductor fin separated vertically into an upper region and a lower region. A first plurality of gate structures is included for controlling the upper region of the semiconductor fin. A second plurality of gate structures is included for controlling the lower region of the semiconductor fin. The second plurality of gate structures has a conductivity type opposite the conductivity type of the first plurality of gate structures.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: December 6, 2022
    Assignee: Intel Corporation
    Inventors: Rishabh Mehandru, Patrick Morrow, Ranjith Kumar, Cory E. Weber, Seiyon Kim, Stephen M. Cea, Tahir Ghani
  • Publication number: 20220381777
    Abstract: Provided herein are structures and methods for detecting one or more analyte molecules present in a sample. In some embodiments, the one or more analyte molecules form a complex in solution with a supramolecular structure. The supramolecular structures of the complex may be detectable such that binding of the analyte molecule to a binding site of an array is detectable via one or more features of the supramolecular structure. A binding site of an array includes capture molecules to capture bound complexes to facilitate detection.
    Type: Application
    Filed: May 26, 2022
    Publication date: December 1, 2022
    Inventors: Ashwin Gopinath, Paul Rothemund, Rishabh Shetty, Shane Bowen, Rachel Galimidi, Dajun Yuan
  • Patent number: 11515420
    Abstract: An apparatus is provided which comprises: a first region over a substrate, wherein the first region comprises a first semiconductor material having a L-valley transport energy band structure, a second region in contact with the first region at a junction, wherein the second region comprises a second semiconductor material having a X-valley transport energy band structure, wherein a <111> crystal direction of one or more crystals of the first and second semiconductor materials are substantially orthogonal to the junction, and a metal adjacent to the second region, the metal conductively coupled to the first region through the junction. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: November 29, 2022
    Assignee: INTEL CORPORATION
    Inventors: Dax M. Crum, Cory E. Weber, Rishabh Mehandru, Harold Kennel, Benjamin Chu-Kung
  • Patent number: 11507394
    Abstract: Changing accelerator card images without rebooting a host system includes receiving, within an integrated circuit (IC) of an accelerator card, an address of a platform image stored in a non-volatile memory of the accelerator card. The address is received over a communication link between the host system and the accelerator card while the communication link is connected. Changing accelerator card images includes detecting, within a register of the IC, that a warm boot enable flag is set and that the communication link with the host system is disconnected. In response to detecting that the warm boot enable flag is set and that the communication link is disconnected, loading of the platform image from the address of the non-volatile memory into the integrated circuit is initiated.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: November 22, 2022
    Assignee: Xilinx, Inc.
    Inventors: Siva Santosh Kumar Pyla, Ravinder Sharma, Gokul Kavungal Nechikott, Saifuddin Kaijar, Brian S. Martin, Suraj Patel, Rishabh Gupta, Ch Vamshi Krishna, Kaustuv Manji
  • Publication number: 20220366422
    Abstract: Systems and methods for detecting digital abuse or digital fraud that involves malicious account testing includes implementing a machine learning threat model that predicts malicious account testing using misappropriate accounts, wherein a subset of a plurality of learnable variables of an algorithmic structure of the machine learning threat model includes one or more learnable variables derived based on feature data indicative of malicious account testing; wherein implementing the machine learning threat model includes: (i) identifying event data from an online event that is suspected to involve digital fraud or digital abuse, (ii) extracting adverse feature data from the event data that map to the one or more learnable variables of the subset, and (iii) providing the adverse feature data as model input to the machine learning threat model; and computing, using the machine learning threat model, a threat prediction indicating a probability that the online event involves malicious account testing.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 17, 2022
    Inventors: Wei Liu, Kevin Lee, Hui Wang, Rishabh Kothari, Helen Marushchenko
  • Publication number: 20220358159
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for a broadcast profiling system. An example apparatus includes a memory storing instructions, and a processor configured to execute the instructions stored in the memory to compare a preference included in a user profile with a portion of a content station profile to determine whether the preference included in the user profile satisfies a threshold difference from the portion of the content station profile, in response to the threshold difference being satisfied, generate a station recommendation for a user associated with the user profile, and transmit an instruction to a device associated with the user, the instruction including the station recommendation, the instruction configured to cause a radio pre-set to be adjusted.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 10, 2022
    Inventors: Markus K. Cremer, Rishabh Sharma, Michael Yeehua Chien, Suresh Jeyachandran, Paul Emmanuel Quinn
  • Patent number: 11494435
    Abstract: An embodiment may involve a server device transmitting, over a wide area network, a first playlist with a first duration to a client device. Possibly while the client device is playing out a current audio file of a first plurality of audio files in the playlist, the server device may receive an instruction from the client device and generate a second playlist. The second playlist may include references to a second plurality of audio files, where playout of the second plurality of audio files may have a duration that is less than the duration of the playout of the first plurality of audio files. The server device may transmit, over the wide area network, the second playlist to the client device. Reception of the second playlist at the client device may cause the audio player application to retrieve and play out the second plurality of audio files.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: November 8, 2022
    Assignee: Gracenote, Inc.
    Inventors: Rishabh Sharma, Markus Cremer
  • Publication number: 20220350591
    Abstract: In one embodiment, a system for managing a virtualization environment includes a set of host machines, each of which includes a hypervisor, virtual machines, and a virtual machine controller, one or more virtual disks comprising a plurality of storage devices, the one or more virtual disks being accessible by the virtual machine controllers, where the virtual machine controllers conduct I/O transactions with the virtual disks, and a deployment system configured to receive a request to deploy a virtualized file server on a plurality of host machines, where the request is associated with deployment parameters, select a deployment image for the host machines based on the deployment parameters, and provide the deployment image to each host machine via the virtual disk. The virtual machine controller located on the host machine stores at least a portion of the deployment image on a storage device associated with the host machine.
    Type: Application
    Filed: July 15, 2022
    Publication date: November 3, 2022
    Applicant: Nutanix, Inc.
    Inventors: Kalpesh Ashok Bafna, Aroosh James Sohi, Alexander Michael Bunch, Venkata Vamsi Krishna Kothuri, Rishabh Suryakant Sharma, Mausumi Ranasingh
  • Publication number: 20220350771
    Abstract: The present disclosure advantageously provides a method and system for transferring data over a chip-to-chip interconnect (CCI). At a request node of a coherent interconnect (CHI) of a first chip, receiving at least one peripheral component interface express (PCIe) transaction from a PCIe master device, the PCIe transaction including a stream identifier; selecting a CCI port of the CHI of the first chip based on the stream identifier of the PCIe transaction; and sending the PCIe transaction to the selected CCI port.
    Type: Application
    Filed: April 29, 2021
    Publication date: November 3, 2022
    Applicant: Arm Limited
    Inventors: Tushar P Ringe, Mark David Werkheiser, Jamshed Jalal, Sai Kumar Marri, Ashok Kumar Tummala, Rishabh Jain
  • Publication number: 20220352029
    Abstract: In an embodiment of the present disclosure, a device structure includes a fin structure, a gate on the fin structure, and a source and a drain on the fin structure, where the gate is between the source and the drain. The device structure further includes an insulator layer having a first insulator layer portion adjacent to a sidewall of the source, a second insulator layer portion adjacent to a sidewall of the drain, and a third insulator layer portion therebetween adjacent to a sidewall of the gate, and two or more stressor materials adjacent to the insulator layer. The stressor materials can be tensile or compressively stressed and may strain a channel under the gate.
    Type: Application
    Filed: July 12, 2022
    Publication date: November 3, 2022
    Applicant: Intel Corporation
    Inventors: Aaron D. Lilak, Christopher J. Jezewski, Willy Rachmady, Rishabh Mehandru, Gilbert Dewey, Anh Phan
  • Patent number: 11487522
    Abstract: Training and/or utilization of a neural decompiler that can be used to generate, from a lower-level compiled representation, a target source code snippet in a target programming language. In some implementations, the lower-level compiled representation is generated by compiling a base source code snippet that is in a base programming language, thereby enabling translation of the base programming language (e.g., C++) to a target programming language (e.g., Python). In some of those implementations, output(s) from the neural decompiler indicate canonical representation(s) of variables. Technique(s) can be used to match those canonical representation(s) to variable(s) of the base source code snippet. In some implementations, multiple candidate target source code snippets are generated using the neural decompiler, and a subset (e.g., one) is selected based on evaluation(s).
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: November 1, 2022
    Assignee: X DEVELOPMENT LLC
    Inventors: Rishabh Singh, Nisarg Vyas, Jayendra Parmar, Dhara Kotecha, Artem Goncharuk, David Andre
  • Publication number: 20220343913
    Abstract: Presented herein are techniques for augmenting a speech recognition engine. According to the disclosed techniques, audio data is obtained as part of an automatic speech recognition session. Speech hints are also obtained as part of the automatic speech recognition session. A dynamic language model is generated from the speech hints for use during the automatic speech recognition session. A combined language model is then generated from the dynamic language model and a static language model. Finally, the audio data is converted to text using the combined language model as part of the automatic speech recognition session.
    Type: Application
    Filed: June 29, 2021
    Publication date: October 27, 2022
    Inventors: Rishabh Gupta Yadav, Kareem Nassar, Sylvain Le Groux, Matthew James Ceravolo
  • Publication number: 20220343586
    Abstract: Distance estimation is optimized in virtual or augmented reality. A distance map of a surgical instrument to a region of interest is determined, at least at the beginning and when a position of the surgical instrument has changed. A render-image is rendered based on a medical 3D image and the position of the surgical instrument, at least at the beginning and when the position of the surgical instrument has changed. At least the region of interest and those parts of the surgical instrument positioned in the volume of the render-image are shown in the render-image. Based on the distance map, at least for a predefined area of the region of interest, visible, acoustic, and/or haptic distance-information is added.
    Type: Application
    Filed: April 20, 2022
    Publication date: October 27, 2022
    Inventors: Christoph Vetter, Kaloian Petkov, Rishabh Shah, Sandra Sudarsky