Patents by Inventor Rishabh

Rishabh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220270017
    Abstract: A retail analytics platform is provided. The retail analytics platform is adapted for use in a retail store includes a speech analysis module configured to process audio files to determine a plurality of attributes. The speech analysis module comprises a voice activity detection (VAD) module, a speaker recognition module and an insights module configured to determine a plurality of performance metrics for the retail store based on the plurality of attributes.
    Type: Application
    Filed: February 22, 2022
    Publication date: August 25, 2022
    Inventors: Biswa Gourav Singh, Pranoot Prakash Hatwar, Rishabh Ojha, Saurav Kumar Behera, Subrat Kumar Panda, Rohan Mahadar, Aneesh Reddy
  • Publication number: 20220268769
    Abstract: A quartz crystal microbalance (QCM) sensor is proposed. The QCM sensor comprises a piezoelectric substrate and at least two electrodes in contact with the substrate to induce shear deformations therein through the inverse piezoelectric effect. The substrate has a sensing surface, and, on that surface, a pattern of plasmonic nanoparticle accumulations protruding from the surface. Each accumulation of nanoparticles comprises a plurality of plasmonic nanoparticles arranged about a hump. Plasmonic hot spots are present between neighbouring accumulations of the pattern that are separated a distance that amounts to or to less than the average diameter of the accumulations of the pattern.
    Type: Application
    Filed: August 18, 2020
    Publication date: August 25, 2022
    Inventors: Sivashankar KRISHNAMOORTHY, Rishabh RASTOGI
  • Publication number: 20220268768
    Abstract: Provided herein are structures and methods for detecting one or more analyte molecules present in a sample. In some embodiments, the one or more analyte molecules are detected using one or more supramolecular structures. In some embodiments, the supramolecular structures facilitate binding of a single detector molecule. In some embodiments, the stable state supramolecular structures are configured to provide a signal for analyte molecule detection and quantification. In some embodiments, the signal correlates to a DNA signal, such that detection and quantification of an analyte molecule comprises converting the presence of the analyte molecule into a DNA signal.
    Type: Application
    Filed: February 22, 2022
    Publication date: August 25, 2022
    Inventors: Ashwin Gopinath, Paul Rothemund, Rishabh Shetty, Shane Bowen, Rachel Galimidi
  • Publication number: 20220270013
    Abstract: Disclosed is system and method for allocating vehicles to ride requests. A ride request comprising information indicative of a pickup location and a drop location of a given ride is received. Vehicle information of a plurality of currently-available vehicles, driver information of respective drivers of the plurality of currently-available vehicles and fuel-station information of the one or more of the plurality of fuel stations is accessed. A distance to empty for each of the plurality of currently-available vehicles is predicted based on the vehicle information. One or more eligible vehicles that satisfy eligibility criteria are selected from amongst the plurality of currently-available vehicles. A vehicle from amongst the one or more eligible vehicles that is nearest to the pickup location is allocated.
    Type: Application
    Filed: February 19, 2021
    Publication date: August 25, 2022
    Inventors: Rishabh Sood, Gurpreet Singh Walia, Anmol Singh Jaggi
  • Patent number: 11416136
    Abstract: The present disclosure generally relates to assigning tasks to various user inputs, and detecting and responding to user inputs. In some embodiments, the present disclosure relates to assigning tasks to various user inputs received on a back surface of a device, and detecting and responding to user inputs on the back surface of the device.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: August 16, 2022
    Assignee: Apple Inc.
    Inventors: John M. Nefulda, Keith P. Avery, Madhu Chinthakunta, Christopher B. Fleizach, Varun Maudgalya, Sommer E. Panage, Xinyi Yan, Garrett L. Weinberg, Michal K. Wegrzynski, William Caruso, Kenneth S. Friedman, Jamil Dhanani, Muhammad Amir Shafiq, Minwoo Jeong, Timothy S. Paek, Viet Huy Le, Heriberto Nieto, Brandt M. Westing, Rishabh Yadav
  • Patent number: 11416914
    Abstract: A centralized accounting system for invoice generation is described as a web-based portal accessible by parties of a supply chain finance relationship via one or more computer networks. The centralized system provides a computer-based, network accessible platform in which a customer and a vendor may negotiate and agree upon terms of a purchase order for products. The centralized system then approves the purchase order based on vendor and customer profile information, and sends a notification of the approved purchase order to a bank. The centralized system automatically generates a vendor invoice for the approved purchase order and submit the vendor invoice to the bank for payment according the terms of the supply chain finance relationship. The centralized system ensures that the vendor invoice is accurate for the approved purchase order. The centralized system may also automatically generate and submit a bank invoice to the customer for the approved purchase order.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: August 16, 2022
    Assignee: Wells Fargo Bank, N.A.
    Inventors: Kathryn Seabaugh, Rishabh Mallick, Philip Perry, Justin Sogge, Mandy Valdes, Rebecca Stoddard
  • Publication number: 20220254681
    Abstract: A transistor cell including a deep via that is at least partially lined with a dielectric material. The deep via may extend down to a substrate over which the transistor is disposed. The deep via may be directly connected to a terminal of the transistor, such as the source or drain, to interconnect the transistor with an interconnect metallization level disposed in the substrate under the transistor, or on at opposite side of the substrate as the transistor. Parasitic capacitance associated with the close proximity of the deep via metallization to one or more terminals of the transistor may be reduced by lining at least a portion of the deep via sidewall with dielectric material, partially necking the deep via metallization in a region adjacent to the transistor.
    Type: Application
    Filed: April 27, 2022
    Publication date: August 11, 2022
    Applicant: Intel Corporation
    Inventors: Patrick Morrow, Mauro J. Kobrinsky, Rishabh Mehandru
  • Publication number: 20220250562
    Abstract: A new wiring and power and communications system for an automobile that includes a plurality of devices, wherein the devices are connected to a backbone section that has an outer sheathing, a first conductor disposed within the outer sheathing, a second conductor disposed within the outer sheathing, a pair of inner sheathing members disposed within the outer sheathing and located on opposing sides of the at least one conductor, the inner sheathing members configured to electrically insulate the first conductor from the second conductor, and a shield member disposed within the outer sheathing.
    Type: Application
    Filed: February 25, 2022
    Publication date: August 11, 2022
    Inventors: Satyan Chandra, In Jae Chung, Adnan Esmail, Matthew Blum, Rishabh Bhandari
  • Publication number: 20220255967
    Abstract: Systems and methods include providing functionality for the user device while operating in background on the user device including providing secure connectivity with a cloud-based system over a network; continuously collecting packets intercepted by the enterprise application over a time interval, wherein the collected packets are collected over the time interval; and responsive to an issue with functionality of the enterprise application, transmitting the collected packets to a back end server for troubleshooting of the issue. The time interval is a set amount of time, and each collected packet is deleted at the expiration of the time interval.
    Type: Application
    Filed: April 25, 2022
    Publication date: August 11, 2022
    Inventors: Rohit Goyal, Rishabh Gupta
  • Patent number: 11409510
    Abstract: In one embodiment, a system for managing communication connections in a virtualization environment includes a plurality of host machines implementing a virtualization environment, wherein each of the host machines includes a hypervisor, at least one user virtual machine (user VM), and a distributed file server that includes file server virtual machines (FSVMs) and associated local storage devices. Each FSVM and associated local storage device are local to a corresponding one of the host machines, and the FSVMs conduct I/O transactions with their associated local storage devices based on I/O requests received from the user VMs. Each of the user VMs on each host machine sends each of its respective I/O requests to an FSVM that is selected by one or more of the FSVMs for each I/O request based on a lookup table that maps a storage item referenced by the I/O request to the selected one of the FSVMs.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: August 9, 2022
    Assignee: Nutanix, Inc.
    Inventors: Richard James Sharpe, Kalpesh Ashok Bafna, Durga Mahesh Arikatla, Shyamsunder Prayagchand Rathi, Satyajit Sanjeev Deshmukh, Vishal Sinha, Anil Kumar Gopalapura Venkatesh, Rashmi Gupta, Rishabh Sharma, Yifeng Huang
  • Patent number: 11411119
    Abstract: Double gated thin film transistors are described. In an example, an integrated circuit structure includes an insulator layer above a substrate. A first gate electrode is on the insulator layer, the first gate electrode having a non-planar feature. A first gate dielectric is on and conformal with the non-planar feature of the first gate electrode. A channel material layer is on and conformal with the first gate dielectric. A second gate dielectric is on and conformal with the channel material layer. A second gate electrode is on and conformal with the second gate dielectric. A first source or drain region is coupled to the channel material layer at a first side of the first gate dielectric. A second source or drain region is coupled to the channel material layer at a second side of the first gate dielectric.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: August 9, 2022
    Assignee: Intel Corporation
    Inventors: Aaron Lilak, Van H. Le, Abhishek A. Sharma, Tahir Ghani, Rishabh Mehandru, Gilbert Dewey, Willy Rachmady
  • Publication number: 20220246743
    Abstract: Gate-all-around integrated circuit structures having an insulator fin on an insulator substrate, and methods of fabricating gate-all-around integrated circuit structures having an insulator fin on an insulator substrate, are described. For example, an integrated circuit structure includes an insulator fin on an insulator substrate. A vertical arrangement of horizontal semiconductor nanowires is over the insulator fin. A gate stack surrounds a channel region of the vertical arrangement of horizontal semiconductor nanowires, and the gate stack is overlying the insulator fin. A pair of epitaxial source or drain structures is at first and second ends of the vertical arrangement of horizontal semiconductor nanowires and at first and second ends of the insulator fin.
    Type: Application
    Filed: April 22, 2022
    Publication date: August 4, 2022
    Inventors: Aaron D. LILAK, Rishabh MEHANDRU, Cory WEBER, Willy RACHMADY, Varun MISHRA
  • Publication number: 20220246759
    Abstract: Isolation schemes for gate-all-around (GAA) transistor devices are provided herein Integrated circuit structures including increased transistor source/drain contact area using a sacrificial source/drain layer are provided herein. In some cases, the isolation schemes include changing the semiconductor nanowires/nanoribbons in a targeted channel region between active or functional transistor devices to electrically isolate those active devices. The targeted channel region is referred to herein as a dummy channel region, as it is not used as an actual channel region for an active or functional transistor device. The semiconductor nanowires/nanoribbons in the dummy channel region can be changed by converting them to an electrical insulator and/or by adding dopant that is opposite in type relative to surrounding source/drain material (to create a p-n junction).
    Type: Application
    Filed: April 15, 2022
    Publication date: August 4, 2022
    Inventors: Rishabh MEHANDRU, Stephen M. CEA, Biswajeet GUHA, Tahir GHANI, William HSU
  • Patent number: 11404319
    Abstract: Stacked finFET structures including a fin having at least a first layer of semiconductor material stacked over or under a second layer of semiconductor material. The first and second layers may include a Group IV semiconductor material layer and a Group III-V semiconductor material layer, for example. A stacked finFET may include an N-type finFET stacked over or under a P-type finFET, the two finFETs may have channel portions within the different semiconductor material layers. Channel portions of the first and second layers of semiconductor material may be coupled to separate gate electrodes that are vertically aligned. Channel portions of the first and second layers of semiconductor material may be vertically separated by subfin portions of the first and second layers. Different layers of dielectric material adjacent to the subfin portions may improve electrical isolation between the channel portions, for example as a source of fixed charge or impurity dopants.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: August 2, 2022
    Assignee: Intel Corporation
    Inventors: Aaron Lilak, Sean Ma, Justin R. Weber, Rishabh Mehandru, Stephen M. Cea, Patrick Morrow, Patrick H. Keys
  • Patent number: 11403179
    Abstract: A distributed database maintains a table on a first plurality of partitions. A request to restore the table to a point-in-time is received. The database determines, based on log data of the partitions, a maximum version number of an operation processed by the partitions. The log data is processed to exclude, from the restoration, operations whose transactions were started after the point-in-time, by setting the version number of those operations to be greater than the maximum version number. The log data is then applied to a second plurality of partitions, where the version number of each applied operation is less than or equal to the determined maximum version number.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: August 2, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Rishabh Jain, Vaibhav Jain, Alexander Richard Keyes, Akshat Vig, Somasundaram Perianayagam, Stefano Stefani, Tony Petrossian, James Christopher Sorenson, Amit Gupta, Nathan Pellegrom Riley
  • Publication number: 20220239098
    Abstract: A method and apparatus for estimating capacity of a system including an energy generation system, an energy storage system or both. The method and apparatus initially estimate the system capacity based on a facility location and size. The initial estimate may be adjusted through adjustment of at least one parameter. An updated capacity estimate is generated and displayed.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Inventors: Ayyapu Reddy PALLAM, Sandeep CHANDRAN, Rishabh GOEL, Samuel MATTATHIL JOSEPH, Sumit SARAOGI, Ashish BANSAL, Jayant SOMANI, Badrinarayanan KOTHANDARAMAN, Ankit Prakash GUPTA, Jan Spencer ROSEN
  • Publication number: 20220236971
    Abstract: Implementations are described herein for adapting existing source code snippets to new contexts. In various implementations, a command may be detected to incorporate an existing source code snippet into destination source code. An embedding may be generated based on the existing source code snippet, e.g., by processing the existing source code snippet using an encoder. The destination source code may be processed to identify one or more decoder constraints. Subject to the one or more decoder constraints, the embedding may be processed using a decoder to generate a new version of the existing source code snippet that is adapted to the destination source code.
    Type: Application
    Filed: January 27, 2021
    Publication date: July 28, 2022
    Inventors: Qianyu Zhang, Bin Ni, Rishabh Singh, Olivia Hatalsky
  • Publication number: 20220233251
    Abstract: Systems and methods are provided for guiding movement of a tool. The system includes a tool and a manipulator. A guide handler obtains a target state for the tool and generates virtual constraints based on the target state and a current state of the tool. A constraint solver calculates a constraint force adapted to attract the tool toward the target state or repel the tool away from the target state based on the virtual constraints. A virtual simulator simulates dynamics of the tool in a virtual simulation based on the constraint force and input from one or more sensors, to output a commanded pose. The control system commands the manipulator to move the tool based on the commanded pose to thereby provide haptic feedback to the user that guides the user toward placing the tool at the target state or away from the target state.
    Type: Application
    Filed: March 23, 2022
    Publication date: July 28, 2022
    Applicant: MAKO Surgical Corp.
    Inventors: David Gene Bowling, Richard Thomas DeLuca, Michael Dale Dozeman, Patrick Roessler, Michael Ferko, Gregory Garcia, Rishabh Khurana
  • Publication number: 20220237226
    Abstract: Methods, systems and computer program products are provided personalizing recommendations of items with associated explanations. The example embodiments described herein use contextual bandits to personalize explainable recommendations (“recsplanations”) as treatments (“Bart”). Bart learns and predicts satisfaction (e.g., click-through rate, consumption probability) for any combination of item, explanation, and context and, through logging and contextual bandit retraining, can learn from its mistakes in an online setting.
    Type: Application
    Filed: March 7, 2022
    Publication date: July 28, 2022
    Applicant: Spotify AB
    Inventors: James E. McInerney, Benjamin Lacker, Samantha Hansen, Aloïs Gruson, Rishabh Mehrotra, Hugues Bouchard
  • Patent number: 11398479
    Abstract: An integrated circuit includes: a germanium-containing fin structure above a layer of insulation material; a group III-V semiconductor material containing fin structure above the layer of insulation material; a first gate structure on a portion of the germanium-containing fin structure; a second gate structure on a portion of the group III-V semiconductor material containing fin structure; a first S/D region above the layer of insulation material and laterally adjacent to the portion of the germanium-containing fin structure, the first S/D region comprising a p-type impurity and at least one of silicon or germanium; a second S/D region above the layer of insulation material and laterally adjacent to the portion of the group III-V semiconductor material containing fin structure, the second S/D region comprising an n-type impurity and a second group III-V semiconductor material; and a layer comprising germanium between the layer of insulation material and the second S/D region.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: July 26, 2022
    Assignee: Intel Corporation
    Inventors: Willy Rachmady, Abhishek A. Sharma, Ravi Pillarisetty, Patrick Morrow, Rishabh Mehandru, Aaron D. Lilak, Gilbert Dewey, Cheng-Ying Huang