Patents by Inventor Rishabh

Rishabh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11397767
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for a broadcast profiling system. An example method includes comparing a preference included in a user profile with a portion of a content station profile to determine whether the preference satisfies a threshold difference from the portion of the content station profile, the content station profile including (1) a first characteristic of first broadcast data associated with a first time context and a first count associated with first identifying information and (2) a second characteristic of second broadcast data associated with a second time context and a second count associated with second identifying information; in response to the threshold difference being satisfied, generating a station recommendation for a user associated with the user profile; and transmitting an instruction associated with the user, the instruction including the station recommendation, the instruction configured to cause a radio pre-set to be adjusted.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: July 26, 2022
    Assignee: Gracenote, Inc.
    Inventors: Markus K. Cremer, Rishabh Sharma, Michael Yeehua Chien, Suresh Jeyachandran, Paul Emmanuel Quinn
  • Publication number: 20220229811
    Abstract: The present technology can move operating system folders into a sync folder of a cross platform content management system, and redirect the operating system to look for the OS folders in the sync folder. The present technology also provides an invariant checker to make sure that another application has not moved the OS folders after they have been placed in the sync folder, and provides solutions when the OS folders are moved out of the sync folder of the content management system. Additionally, when OS folders for multiple client devices are in the sync folder on the content management system, the present technology can provide a mechanism to make the content items in an OS folder on a first client device also sync into an OS folder on second client device.
    Type: Application
    Filed: April 6, 2022
    Publication date: July 21, 2022
    Inventors: Pranav Vishnu Ramabhadran, Maxime Larabie-Belanger, Nipunn Koorapati, Adam Arbree, Rishabh Jain, Haynes George
  • Publication number: 20220230408
    Abstract: The present embodiment relates to a renderer and an interactive method for image editing of medical 3D anatomical data. The method includes receiving a dataset with volumetric image data, which have been acquired from an image acquisition modality, and providing a signed distance field data structure of the received dataset. Further, editing operations are received from a user interface for editing at least a part of the provided signed distance field data structure. A visualization of the editing operations is calculated and displayed on a display.
    Type: Application
    Filed: January 6, 2022
    Publication date: July 21, 2022
    Inventors: Rishabh Shah, Kaloian Petkov, Lev Gretskii, Daphne Yu, Klaus Engel
  • Patent number: 11393722
    Abstract: In an embodiment of the present disclosure, a device structure includes a fin structure, a gate on the fin structure, and a source and a drain on the fin structure, where the gate is between the source and the drain. The device structure further includes an insulator layer having a first insulator layer portion adjacent to a sidewall of the source, a second insulator layer portion adjacent to a sidewall of the drain, and a third insulator layer portion therebetween adjacent to a sidewall of the gate, and two or more stressor materials adjacent to the insulator layer. The stressor materials can be tensile or compressively stressed and may strain a channel under the gate.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: July 19, 2022
    Assignee: Intel Corporation
    Inventors: Aaron D. Lilak, Christopher J. Jezewski, Willy Rachmady, Rishabh Mehandru, Gilbert Dewey, Anh Phan
  • Patent number: 11393013
    Abstract: Disclosed herein are embodiments for automatic, intelligent generation of listings for a for sale object (FSO) being offered by a seller. Some embodiments operate by: receiving information relating to the FSO, including specifications for selling the FSO and an election of an automatic listing option; determining a category of the FSO; generating an optimal offer price based on at least the category; and generating multiple listings for the FSO, wherein the multiple listings have varying titles, descriptions, pictures and offer prices.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: July 19, 2022
    Assignee: MERCARI, INC.
    Inventors: Byong Mok Oh, Takuma Yamaguchi, Rishabh Kumar Shrivastava, Mikio Fritz Kuribayashi, John Alexander Lagerling, Minami Tanaka
  • Patent number: 11393818
    Abstract: An integrated circuit structure comprises a lower device layer that includes a first structure comprising a plurality of PMOS transistors. An upper device layer is formed on the lower device layer, wherein the upper device layer includes a second structure comprising a plurality of NMOS thin-film transistors (TFT).
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: July 19, 2022
    Assignee: Intel Corporation
    Inventors: Gilbert Dewey, Ravi Pillarisetty, Abhishek A. Sharma, Aaron D. Lilak, Willy Rachmady, Rishabh Mehandru, Kimin Jun, Anh Phan, Hui Jae Yoo, Patrick Morrow, Cheng-Ying Huang
  • Publication number: 20220218422
    Abstract: A surgical system comprising a tool for engaging a target site, a manipulator configured to support the tool, and a sensing system configured to detect one or more system conditions associated with one or more of the tool, the manipulator, the target site, or combinations thereof. A controller is coupled to the manipulator and to the sensing system is configured to operate the manipulator between: a first mode to maintain alignment of the tool with respect to the target site according to a first constraint criteria, and a second mode to maintain alignment of the tool with respect to the target site according to a second constraint criteria different from the first constraint criteria. The controller changes operation of the manipulator from the first mode to the second mode in response to determining that at least one of the one or more system conditions satisfies a predetermined condition.
    Type: Application
    Filed: March 29, 2022
    Publication date: July 14, 2022
    Applicant: MAKO Surgical Corp.
    Inventors: Rishabh Khurana, David Gene Bowling, Matthew Thompson
  • Publication number: 20220224347
    Abstract: Uniformly-sampled, residue-generating analog-to-digital converters (ADCs), such as uniformly-sampled continuous-time pipelined ADCs, suffer from over-ranging of the residue signal, which can lead to severe signal distortion. Conventionally, power consuming techniques and oversampling are used to address the over-ranging problem. To reduce the range of the residue signal and reduce other impairments, an event-driven sub-quantizer (sub-ADC) and a sub-digital-to-analog converter (sub-DAC) can be implemented in at least one of the stages of the residue-generating ADC, to generate a continuous-time residue signal.
    Type: Application
    Filed: January 8, 2022
    Publication date: July 14, 2022
    Applicants: Analog Devices, Inc., Massachusetts Institute of Technology
    Inventors: Gabriele MANGANARO, Rishabh MITTAL, Hae-Seung LEE
  • Patent number: 11387238
    Abstract: Multiple non-silicon semiconductor material layers may be stacked within a fin structure. The multiple non-silicon semiconductor material layers may include one or more layers that are suitable for P-type transistors. The multiple non-silicon semiconductor material layers may further include one or more one or more layers that are suited for N-type transistors. The multiple non-silicon semiconductor material layers may further include one or more intervening layers separating the N-type from the P-type layers. The intervening layers may be at least partially sacrificial, for example to allow one or more of a gate, source, or drain to wrap completely around a channel region of one or more of the N-type and P-type transistors.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Gilbert Dewey, Patrick Morrow, Ravi Pillarisetty, Rishabh Mehandru, Cheng-ying Huang, Willy Rachmady, Aaron Lilak
  • Patent number: 11388233
    Abstract: A cloud-based data protection service is disclosed. In an embodiment, the data protection service may support backup of data sets from one or more sites associated with one or more organizations. In an embodiment, deduplication of backup data across multiple sites of an organization and/or multiple sites associated with different organizations may be supported. In an embodiment, backup data may be post-processed in the cloud to insert fingerprints corresponding to data blocks that did not change since a previous backup was performed, to scan the backup for security threats such as viruses, other malware, personally identifiable information, etc. In an embodiment, restore may be supported from the cloud, where restore blocks may be larger than backup data blocks. In another embodiment, restore may be based on blocks that have changed since the most recent backup (or a user-selected backup).
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: July 12, 2022
    Assignee: Clumio, Inc.
    Inventors: Lawrence Jaemyung Chang, Woon Ho Jung, Poojan Kumar, Amber Palekar, Hung Hing Anthony Pang, Kaustubh Sambhaji Patil, Rishabh Sharma, John Stewart
  • Patent number: 11375900
    Abstract: The present invention relates to methods and devices for characterizing wounds, and in particular to the use of Raman spectroscopy to characterize the state of healing of a wound.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: July 5, 2022
    Inventors: Christopher J. Murphy, Nicholas L. Abbott, Jonathan McAnulty, Rishabh Jain
  • Publication number: 20220206785
    Abstract: Implementations are described herein for using machine learning to perform various tasks related to migrating source code based on relatively few (“few shots”) demonstrations. In various implementations, an autoregressive language model may be conditioned based on demonstration tuple(s). In some implementations, a demonstration tuple may include a pre-migration version of a first source code snippet and a post-migration version of the first source code snippet. In other implementations, demonstration tuples may include other data, such as intermediate forms (e.g., natural language descriptions or pseudocode), input-output pairs demonstrating intended behavior, etc. The autoregressive language model may be trained on corpora of source code and natural language documentation on the subject of computer programming.
    Type: Application
    Filed: December 29, 2020
    Publication date: June 30, 2022
    Inventors: Rishabh Singh, David Andre, Bin Ni, Owen Lewis
  • Patent number: 11373999
    Abstract: Described herein are apparatuses, methods, and systems associated with a deep trench via in a three-dimensional (3D) integrated circuit (IC). The 3D IC may include a logic layer having an array of logic transistors. The 3D IC may further include one or more front-side interconnects on a front side of the 3D IC and one or more back-side interconnects on a back side of the 3D IC. The deep trench may be in the logic layer to conductively couple a front-side interconnect to a back-side interconnect. The deep trench via may be formed in a diffusion region or gate region of a dummy transistor in the logic layer. Other embodiments may be described and claimed.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: June 28, 2022
    Assignee: Intel Corporation
    Inventors: Yih Wang, Rishabh Mehandru, Mauro J. Kobrinsky, Tahir Ghani, Mark Bohr, Marni Nabors
  • Patent number: 11374100
    Abstract: Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, integrated circuit structures having source or drain structures with a contact etch stop layer are described. In an example, an integrated circuit structure includes a fin including a semiconductor material, the fin having a lower fin portion and an upper fin portion. A gate stack is over the upper fin portion of the fin, the gate stack having a first side opposite a second side. A first epitaxial source or drain structure is embedded in the fin at the first side of the gate stack. A second epitaxial source or drain structure is embedded in the fin at the second side of the gate stack, the first and second epitaxial source or drain structures including a lower semiconductor layer, an intermediate semiconductor layer and an upper semiconductor layer.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: June 28, 2022
    Assignee: Intel Corporation
    Inventors: Cory Bomberger, Rishabh Mehandru, Anupama Bowonder, Biswajeet Guha, Anand Murthy, Tahir Ghani
  • Patent number: 11374024
    Abstract: Integrated circuits with stacked transistors and methods of manufacturing the same are disclosed. An example integrated circuit includes a first transistor in a first portion of the integrated circuit, and a second transistor stacked above the first transistor and in a second portion of the integrated circuit above the first portion. The integrated circuit further includes a bonding layer between the first and second vertical portions of the integrated circuit. The bonding layer includes an opening extending therethrough between the first and second vertical portions of the integrated circuit. The integrated circuit also includes a gate dielectric on an inner wall of the opening.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: June 28, 2022
    Assignee: Intel Corporation
    Inventors: Aaron D. Lilak, Rishabh Mehandru, Gilbert Dewey, Willy Rachmady, Anh Phan
  • Patent number: 11374004
    Abstract: Stacked transistor structures and methods of forming same. In an embodiment, a stacked transistor structure has a wide central pedestal region and at least one relatively narrower channel region above and/or below the wider central pedestal region. The upper and lower channel regions are configured with a non-planar architecture, and include one or more semiconductor fins, nanowires, and/or nanoribbons. The top and bottom channel regions may be configured the same or differently, with respect to shape and/or semiconductor materials. In some cases, an outermost sidewall of one or both the top and/or bottom channel region structures, is collinear with an outermost sidewall of the wider central pedestal region. In some such cases, the outermost sidewall of the top channel region structure is collinear with the outermost sidewall of the bottom channel region structure. Top and bottom transistor structures (NMOS/PMOS) may be formed using the top and bottom channel region structures.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: June 28, 2022
    Assignee: Intel Corporation
    Inventors: Aaron D. Lilak, Rishabh Mehandru, Anh Phan, Gilbert Dewey, Willy Rachmady, Stephen M. Cea, Sayed Hasan, Kerryann M. Foley, Patrick Morrow, Colin D. Landon, Ehren Mannebach
  • Patent number: 11367722
    Abstract: A nanowire transistor structure has a first device region with a first body of semiconductor material having a first cross-sectional shape. A second device region has a second body with a second cross-sectional shape different from the first cross-sectional shape. The first device section is vertically above or below the second device section with the bodies extending horizontally between a source and drain. A first gate structure is wrapped around the first body and a second gate structure is wrapped around the second body. Differences in the geometries of the nanowires can be used to optimize performance in the first device section independently of the second device section.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: June 21, 2022
    Assignee: Intel Corporation
    Inventors: Aaron Lilak, Stephen Cea, Gilbert Dewey, Willy Rachmady, Roza Kotlyar, Rishabh Mehandru, Sean Ma, Ehren Mannebach, Anh Phan, Cheng-Ying Huang
  • Patent number: 11368324
    Abstract: Techniques for improving convergence of Protocol Independent Multicast assert state information in multicast groups include forwarding, by a router, a PIM join message originating from a destination host and stores distribution tree information based on the join message. The method further includes participating, by the router, in a Protocol Independent Multicast (“PIM”) assert election among a plurality of routers and storing, by the router, PIM assert state information based on an outcome of the PIM assert election. The method further includes acquiring, by the router, routing information base (“RIB”) convergence. The method further includes triggering by the router, or causing, by the router, another router to trigger, a PIM assert among the plurality of routers. The method further includes re-converging, by the router, with PIM assert states among the plurality of routers and storing, by the router, converged PIM assert state information.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: June 21, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Ramakrishnan Chokkanathapuram Sundaram, Kesavan Thiruvenkatasamy, Rishabh Parekh, Raunak Banthia
  • Publication number: 20220191592
    Abstract: The disclosure relates to a method and system of selectively deploying an application for facilitating quality-of-experience (QoE) in terms of streaming multimedia content in a networking environment comprising a user-equipment (UE) and a networking node provided with a predictive analysis module. The method comprises: capturing parameters pertaining to UE from at least one of a version of the predictive analysis module with respect to the UE, a current processor occupancy within the UE, a power-level within the UE, network conditions pertaining to the access network etc. One or more of the captured parameters and the observed network conditions is analyzed. Based on analysis, inference is drawn for selecting between the predictive analysis model of the UE and of the networking node for thereby enabling a customized streaming of multimedia content at the UE.
    Type: Application
    Filed: February 24, 2020
    Publication date: June 16, 2022
    Inventors: Sai Krishna GAIRUBOINA, Prasenjit CHAKRABORTY, Luckraj Shrawan KUMAR, Karan RAKESH, Rishabh MITTAR, Jongkyu KIM, Rajaram Hanumantacharya NAGANUR, Rajiv CHINTALA
  • Publication number: 20220188145
    Abstract: A method for managing memory for applications in a computing system includes receiving a selection of a preferred application. During user-controlled operation over the application, the transitions of selected application between foreground and background are monitored. A retention of the application in memory is triggered upon a transition of the application to background during the user operation. Retention of the application includes compressing memory portions of the application. Accordingly, the application is retained within the memory based on said compressed memory portions. A requirement to restore the retained application is sensed based on either a user selection or an automatically generated prediction and the application is restored from the retained state back to the foreground.
    Type: Application
    Filed: February 5, 2021
    Publication date: June 16, 2022
    Inventors: Ganji Manoj KUMAR, Jaitirth Anthony JACOB, Rishabh RAJ, Vaisakh Punnekkattu Chirayil SUDHEESH BABU, Renju Chirakarotu NAIR, Hakryoul KIM, Shweta RATANPURA, Tarun GOPALAKRISHNAN, Sriram SHASHANK, Raju Suresh DIXIT, Youngjoo JUNG