Patents by Inventor Robert D. Clark

Robert D. Clark has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7790628
    Abstract: A method is provided for depositing a high dielectric constant (high-k) film for integrated circuits (ICs) by atomic layer deposition (ALD) or chemical vapor deposition (CVD). The method includes exposing a substrate to one or more metal precursors and plurality of oxidation sources to deposit a high-k film with a desired thickness and tailored properties. The plurality of oxidation sources contain a first oxidation source containing H2O, H2O2, or a combination thereof, and a second oxidation source containing oxygen radicals (O), O3, or O2, or a combination of two or more thereof. The high-k film may contain one or more metal elements selected from alkaline earth elements, rare earth elements, and Group IVB elements of the Periodic Table of the Elements.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: September 7, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Robert D Clark, Lisa F Edge
  • Patent number: 7772073
    Abstract: A method is provided for forming a semiconductor device containing a buried threshold voltage adjustment layer. The method includes providing a substrate containing an interface layer, depositing a first high-k film on the interface layer, depositing a threshold voltage adjustment layer on the first high-k film, and depositing a second high-k film on the threshold voltage adjustment layer such that the threshold voltage adjustment layer is interposed between the first and second high-k films. The semiconductor device containing a patterned gate stack is described.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: August 10, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Robert D. Clark, Gerrit J. Leusink
  • Patent number: 7767262
    Abstract: A method of forming a nitrided high-k film by disposing a substrate in a process chamber and forming the nitrided high-k film on the substrate by a) depositing a nitrogen-containing film, and b) depositing an oxygen-containing film, wherein steps a) and b) are performed in any order, any number of times, so as to oxidize at least a portion of the thickness of the nitrogen-containing film. The oxygen-containing film and the nitrogen-containing film contain the same one or more metal elements selected from alkaline earth elements, rare earth elements, and Group IVB elements of the Periodic Table, and optionally aluminum, silicon, or aluminum and silicon. According to one embodiment, the method includes forming a nitrided hafnium based high-k film. The nitrided high-k film can be formed by atomic layer deposition (ALD) or plasma-enhanced ALD (PEALD).
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: August 3, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Robert D. Clark
  • Patent number: 7759746
    Abstract: A semiconductor device, such as a transistor or capacitor, is provided. The device includes a substrate, a gate dielectric over the substrate, and a conductive gate electrode film over the gate dielectric. The gate dielectric includes a mixed rare earth aluminum oxide, nitride or oxynitride film containing aluminum and at least two different rare earth metal elements.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: July 20, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Robert D. Clark
  • Patent number: 7755128
    Abstract: A semiconductor device, such as a transistor or capacitor is provided. The device includes a substrate, a gate dielectric over the substrate, and a conductive gate dielectric film over the gate dielectric. The gate dielectric includes a doped hafnium zirconium oxide containing one or more dopant elements selected from Group II, Group XIII, silicon, and rare earth elements of the Periodic Table. According to one embodiment, the conductive gate dielectric can contain doped hafnium zirconium nitride or doped hafnium zirconium oxynitride.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: July 13, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Robert D. Clark
  • Patent number: 7741202
    Abstract: A method for controlling interface layer thickness in high dielectric constant (high-k) film structures found in semiconductor devices. According to one embodiment, the method includes providing a monocrystalline silicon substrate, growing a chemical oxide layer on the monocrystalline silicon substrate in an aqueous bath, vacuum annealing the chemical oxide layer, depositing a high-k film on the vacuum annealed chemical oxide layer, and optionally vacuum annealing the high-k film. According to another embodiment, the method includes depositing a high-k film on a chemical oxide layer, and vacuum annealing the high-k film.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: June 22, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Robert D Clark
  • Patent number: 7713868
    Abstract: A method for forming a strained metal nitride film and a semiconductor device containing the strained metal nitride film. The method includes exposing a substrate to a gas containing a metal precursor, exposing the substrate to a gas containing a nitrogen precursor activated by a plasma source at a first level of plasma power and configured to react with the metal precursor with a first reactivity characteristic, and exposing the substrate to a gas containing the nitrogen precursor activated by the plasma source at a second level of plasma power different from the first level and configured to react with the metal precursor with a second reactivity characteristic such that a property of the metal nitride film formed on the substrate changes to provide the strained metal nitride film.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: May 11, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Robert D. Clark
  • Publication number: 20100062592
    Abstract: A method for forming gate spacers for semiconductor devices includes forming a patterned gate structure on substrate, where the patterned gate structure contains an interface layer on the substrate, a high-k film on the interface layer, and a gate electrode on the high-k film. The method further includes depositing a nitride barrier layer on the patterned gate structure using processing conditions that minimize or prevent oxidation of the substrate and the gate electrode, depositing a spacer material on the nitride barrier layer, and anisotropically etching the spacer material to form a gate spacer on the patterned gate structure.
    Type: Application
    Filed: September 9, 2008
    Publication date: March 11, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Robert D. Clark
  • Publication number: 20100035423
    Abstract: A method for controlling interface layer thickness in high dielectric constant (high-k) film structures found in semiconductor devices. According to one embodiment, the method includes providing a monocrystalline silicon substrate, growing a chemical oxide layer on the monocrystalline silicon substrate in an aqueous bath, vacuum annealing the chemical oxide layer, depositing a high-k film on the vacuum annealed chemical oxide layer, and optionally vacuum annealing the high-k film. According to another embodiment, the method includes depositing a high-k film on a chemical oxide layer, and vacuum annealing the high-k film.
    Type: Application
    Filed: August 7, 2008
    Publication date: February 11, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Robert D. Clark
  • Patent number: 7651961
    Abstract: A method for forming a strained SiN film and a semiconductor device containing the strained SiN film. The method includes exposing the substrate to a gas including a silicon precursor, exposing the substrate to a gas containing a nitrogen precursor activated by a plasma source at a first level of plasma power and configured to react with the silicon precursor with a first reactivity characteristic, and exposing the substrate to a gas containing the nitrogen precursor activated by the plasma source at a second level of plasma power different from the first level and configured to react with the silicon precursor with a second reactivity characteristic such that a property of the silicon nitride film formed on the substrate changes to provide the strained silicon nitride film.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 26, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Robert D. Clark
  • Publication number: 20090246973
    Abstract: A method for forming a stressed passivation film. In one embodiment, the method includes depositing a silicon nitride film over an integrated circuit structure on a substrate and embedding oxygen into a surface of the silicon nitride film by exposing the silicon nitride film to a process gas containing oxygen radicals formed by non-ionizing electromagnetic radiation induced dissociation of an oxygen-containing gas or an oxygen- and nitrogen-containing gas. The method further includes heat-treating the oxygen-embedded silicon nitride film to form a stressed silicon oxynitride film.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 1, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Robert D. Clark
  • Publication number: 20090246974
    Abstract: A method for forming a stressed passivation film. In one embodiment, the method includes depositing a silicon nitride film over an integrated circuit structure on a substrate and embedding oxygen into a surface of the silicon nitride film by exposing the silicon nitride film to a process gas containing an oxygen-containing or an oxygen- and nitrogen-containing gas excited by plasma induced dissociation based on microwave irradiation via a plane antenna member having a plurality of slots, wherein the plane antenna member faces the substrate surface containing the silicon nitride film. The method further includes heat-treating the oxygen-embedded silicon nitride film to form a stressed silicon oxynitride film.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 1, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Robert D. Clark
  • Patent number: 7580799
    Abstract: Steric features inherent in the three dimensional disposition of atoms in molecules can be represented as multiplets using a defined set of steric descriptors. The resulting multiplets can be encoded in a compressed form of bitstring known as a bitmap. Such bitmaps can be generated in compressed form and used to compare individual conformers or ensembles of conformers of molecules to each other without decompression. Such comparisons are useful in molecular similarity analysis, in molecular diversity analysis, in database searching, and in conformational analysis.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: August 25, 2009
    Inventors: Edmond Abrahamian, Robert D. Clark, Peter Fox, Essam Metwally
  • Publication number: 20090163012
    Abstract: A method is provided for forming high dielectric constant (high-k) films for semiconductor devices. According to one embodiment, a metal-carbon-oxygen high-k film is deposited by alternately and sequentially exposing a substrate to a metal-carbon precursor and near saturation exposure level of an oxidation source containing ozone. The method is capable of forming a metal-carbon-oxygen high-k film with good thickness uniformity while impeding growth of an interface layer between the metal-carbon-oxygen high-k film and the substrate. According to one embodiment, the metal-carbon-oxygen high-k film may be treated with an oxidation process to remove carbon from the film.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 25, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Robert D. CLARK, Cory WAJDA
  • Patent number: 7531452
    Abstract: A method for forming a strained metal nitride film and a semiconductor device containing the strained metal nitride film. The method includes exposing a substrate to a gas containing a metal precursor, exposing the substrate to a gas containing a silicon precursor, exposing the substrate to a gas containing a nitrogen precursor activated by a plasma source at a first level of plasma power and configured to react with the metal precursor or the silicon precursor with a first reactivity characteristic, and exposing the substrate to a gas containing the nitrogen precursor activated by the plasma source at a second level of plasma power different from the first level and configured to react with the metal precursor or the silicon precursor with a second reactivity characteristic such that a property of the metal silicon nitride film formed on the substrate changes to provide the strained metal silicon nitride film.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: May 12, 2009
    Assignee: Tokyo Electron Limited
    Inventor: Robert D. Clark
  • Publication number: 20090085175
    Abstract: A method is provided for forming a semiconductor device containing a buried threshold voltage adjustment layer. The method includes providing a substrate containing an interface layer, depositing a first high-k film on the interface layer, depositing a threshold voltage adjustment layer on the first high-k film, and depositing a second high-k film on the threshold voltage adjustment layer such that the threshold voltage adjustment layer is interposed between the first and second high-k films. The semiconductor device containing a patterned gate stack is described.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Robert D. Clark, Gerrit J. Leusink
  • Patent number: 7494937
    Abstract: A method for forming a strained metal silicon nitride film and a semiconductor device containing the strained metal silicon nitride film. The method includes exposing a substrate to a gas containing a metal precursor, exposing a substrate to a gas containing a silicon precursor, exposing the substrate to a gas containing a first nitrogen precursor configured to react with the metal precursor or the silicon precursor with a first reactivity characteristic, and exposing the substrate to a gas pulse containing a second nitrogen precursor configured to react with the metal precursor or the silicon precursor with a second reactivity characteristic different than the first reactivity characteristic such that a property of the metal silicon nitride film formed on the substrate changes to provide a strained metal silicon nitride film.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: February 24, 2009
    Assignee: Tokyo Electron Limited
    Inventor: Robert D. Clark
  • Publication number: 20090047798
    Abstract: A method is provided for depositing a high dielectric constant (high-k) film for integrated circuits (ICs) by atomic layer deposition (ALD) or chemical vapor deposition (CVD). The method includes exposing a substrate to one or more metal precursors and plurality of oxidation sources to deposit a high-k film with a desired thickness and tailored properties. The plurality of oxidation sources contain a first oxidation source containing H2O, H2O2, or a combination thereof, and a second oxidation source containing oxygen radicals (O), O3, or O2, or a combination of two or more thereof. The high-k film may contain one or more metal elements selected from alkaline earth elements, rare earth elements, and Group IVB elements of the Periodic Table of the Elements.
    Type: Application
    Filed: August 16, 2007
    Publication date: February 19, 2009
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert D. Clark, Lisa F. Edge
  • Publication number: 20080242077
    Abstract: A method for forming a strained metal nitride film and a semiconductor device containing the strained metal nitride film. The method includes exposing a substrate to a gas containing a metal precursor, exposing the substrate to a gas containing a silicon precursor, exposing the substrate to a gas containing a nitrogen precursor activated by a plasma source at a first level of plasma power and configured to react with the metal precursor or the silicon precursor with a first reactivity characteristic, and exposing the substrate to a gas containing the nitrogen precursor activated by the plasma source at a second level of plasma power different from the first level and configured to react with the metal precursor or the silicon precursor with a second reactivity characteristic such that a property of the metal silicon nitride film formed on the substrate changes to provide the strained metal silicon nitride film.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Robert D. Clark
  • Publication number: 20080241382
    Abstract: A method for forming a strained metal nitride film and a semiconductor device containing the strained metal nitride film. The method includes exposing a substrate to a gas containing a metal precursor, exposing the substrate to a gas containing a nitrogen precursor activated by a plasma source at a first level of plasma power and configured to react with the metal precursor with a first reactivity characteristic, and exposing the substrate to a gas containing the nitrogen precursor activated by the plasma source at a second level of plasma power different from the first level and configured to react with the metal precursor with a second reactivity characteristic such that a property of the metal nitride film formed on the substrate changes to provide the strained metal nitride film.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: TKYO ELECTRON LIMITED
    Inventor: Robert D. Clark