Abstract: A semiconductor device and method of forming. The semiconductor device contains microelectronic components embedded in a single crystalline dielectric material. The method of forming a semiconductor device includes providing a single crystalline substrate, epitaxially depositing a single crystalline dielectric material on the single crystalline substrate, and forming microelectronic components in the single crystalline dielectric material. The single crystalline dielectric material can contain carbon with a diamond structure or hexagonal boron nitride (h-BN) with a graphene structure.

Abstract: A semiconductor device is provided. The semiconductor device can have a substrate including dielectric material. A plurality of narrow interconnect openings can be formed within said dielectric material. In addition, a plurality of wide interconnect openings can be formed within said dielectric material. The semiconductor device can include a first metal filling the narrow interconnect openings to form an interconnect structure and conformally covering a surface of the wide interconnect openings formed in the dielectric material, and a second metal formed over the first metal and encapsulated by the first metal to form another interconnect structure within the wide interconnect openings.

Abstract: Embodiments of the invention provide a method for atomic layer etching (ALE) of a substrate. According to one embodiment, the method includes providing a substrate, and exposing the substrate to hydrogen fluoride (HF) gas and a boron-containing gas to etch the substrate. According to another embodiment, the method includes providing a substrate containing a metal oxide film, exposing the substrate to HF gas to form a fluorinated surface layer on the metal oxide film, and exposing the substrate to a boron-containing gas to remove the fluorinated surface layer from the metal oxide film. The exposures may be repeated at least once to further etch the metal oxide film.

Abstract: A method of forming crystallographically stabilized ferroelectric hafnium zirconium based films for semiconductor devices is described. The hafnium zirconium based films can be either doped or undoped. The method includes depositing a hafnium zirconium based film with a thickness greater than 5 nanometers on a substrate, depositing a cap layer on the hafnium zirconium based film, heat-treating the substrate to crystallize the hafnium zirconium based film in a non-centrosymmetric orthorhombic phase, a tetragonal phase, or a mixture thereof. The method further includes removing the cap layer from the substrate, thinning the heat-treated hafnium zirconium based film to a thickness of less than 5 nanometers, where the thinned heat-treated hafnium zirconium based film maintains the crystallized non-centrosymmetric orthorhombic phase, the tetragonal phase, or the mixture thereof.

Abstract: A method of forming crystallographically stabilized ferroelectric hafnium zirconium based films for semiconductor devices is described. The hafnium zirconium based films can be either doped or undoped. The method includes depositing a hafnium zirconium based film with a thickness greater than 5 nanometers on a substrate, depositing a cap layer on the hafnium zirconium based film, heat-treating the substrate to crystallize the hafnium zirconium based film in a non-centrosymmetric orthorhombic phase, a tetragonal phase, or a mixture thereof. The method further includes removing the cap layer from the substrate, thinning the heat-treated hafnium zirconium based film to a thickness of less than 5 nanometers, where the thinned heat-treated hafnium zirconium based film maintains the crystallized non-centrosymmetric orthorhombic phase, the tetragonal phase, or the mixture thereof.

Abstract: A semiconductor device is provided. The semiconductor device can have a substrate including dielectric material. A plurality of narrow interconnect openings can be formed within said dielectric material. In addition, a plurality of wide interconnect openings can be formed within said dielectric material. The semiconductor device can include a first metal filling the narrow interconnect openings to form an interconnect structure and conformally covering a surface of the wide interconnect openings formed in the dielectric material, and a second metal formed over the first metal and encapsulated by the first metal to form another interconnect structure within the wide interconnect openings.

Abstract: A semiconductor device is provided. The semiconductor device can have a substrate including dielectric material. A plurality of narrow interconnect openings can be formed within said dielectric material. In addition, a plurality of wide interconnect openings can be formed within said dielectric material. The semiconductor device can include a first metal filling the narrow interconnect openings to form an interconnect structure and conformally covering a surface of the wide interconnect openings formed in the dielectric material, and a second metal formed over the first metal and encapsulated by the first metal to form another interconnect structure within the wide interconnect openings.

Abstract: A method for forming a semiconductor device is provided in several embodiments. According to one embodiment, the method includes providing a substrate in a process chamber, flowing a process gas consisting of hydrogen (H2) and optionally a noble gas into the process chamber, forming plasma excited species from the process gas by a microwave plasma source. The method further includes exposing an interface layer on the substrate to the plasma excited species to form a modified interface layer, and depositing a high dielectric constant (high-k) film by atomic layer deposition (ALD) on the modified interface layer. In some embodiments, the modified interface layer has higher electrical mobility than the interface layer, and the high-k film nucleates at a higher rate on the modified interface layer rate than on the interface layer.

Abstract: A method of self-aligned spacer formation is described. According to one embodiment of the invention, a substrate processing method is provided, where the method includes forming a sacrificial film over a substrate, creating a pattern in the sacrificial film, conformally depositing a first spacer layer over the patterned sacrificial film, removing horizontal portions of the first spacer layer while substantially leaving vertical portions of the first spacer layer, and selectively depositing a second spacer layer on the first spacer layer.

Abstract: A processing system is disclosed, having a process chamber that houses a substrate for exposure of a surface of the substrate to a travelling electromagnetic (EM) wave. The processing system also includes an EM wave transmission antenna configured to launch the travelling EM wave into the process chamber for the travelling EM wave to propagate in a direction substantially parallel to the surface of the substrate. The processing system also includes a power coupling system configured to supply EM energy into the EM wave transmission antenna to generate the travelling EM wave at a prescribed output power and in a prescribed EM wave mode during treatment of the substrate. The processing system also includes an EM wave receiving antenna configured to absorb the travelling EM wave after propagation through the process chamber.

Abstract: Embodiments of the invention provide a method for atomic layer etching (ALE) of a substrate. According to one embodiment, the method includes providing a substrate, and exposing the substrate to hydrogen fluoride (HF) gas and a boron-containing gas to etch the substrate. According to another embodiment, the method includes providing a substrate containing a metal oxide film, exposing the substrate to HF gas to form a fluorinated surface layer on the metal oxide film, and exposing the substrate to a boron-containing gas to remove the fluorinated surface layer from the metal oxide film. The exposures may be repeated at least once to further etch the metal oxide film.

Abstract: A wrap-around contact integration scheme is described that includes sidewall protection during contact formation. A substrate processing method includes providing a substrate containing a raised contact in a first dielectric film, and a second dielectric film on the first dielectric film, where the second dielectric film has a recessed feature with a sidewall and a bottom portion above the raised contact. The method further includes depositing a conformal film on the sidewall and on the bottom portion of the recessed feature, removing the conformal film from the bottom portion in a first anisotropic etching process, where the remaining conformal film forms a protection film on the sidewall and defines a width of the recessed feature, and forming a cavity containing the raised contact in an isotropic etching process, where a width of the cavity is greater than the width of the recessed feature.

Abstract: Embodiments of the invention provide a method for atomic layer etching (ALE) of a substrate. According to one embodiment, the method includes providing a substrate, and exposing the substrate to hydrogen fluoride (HF) gas and a boron-containing gas to etch the substrate. According to another embodiment, the method includes providing a substrate containing a metal oxide film, exposing the substrate to HF gas to form a fluorinated surface layer on the metal oxide film, and exposing the substrate to a boron-containing gas to remove the fluorinated surface layer from the metal oxide film. The exposures may be repeated at least once to further etch the metal oxide film.

Abstract: A processing system and method for depositing a film on a substrate by liquid phase ALD is disclosed in various embodiments. The method includes providing the substrate in a process chamber, spinning on the substrate a first reactant in a first liquid to form a self-limiting layer of the first reactant on the substrate, spinning on the substrate a second reactant in a second liquid, where the second reactant reacts with the self-limiting layer of the first reactant on the substrate to form a film on the substrate, and repeating the spinning steps at least once until the film has a desired thickness. Other embodiments of the invention further include rinsing the substrate to remove excess first and second reactants from the substrate, and heat-treating the substrate during and/or following the film deposition.

Abstract: A semiconductor device containing a metal-insulator-semiconductor (MIS) contact and method of forming are described. The method includes providing a semiconductor substrate containing a contact region, depositing an insulator film on the contact region, the insulator film including a mixed oxide material containing TiO2 and at least one additional metal oxide. The method further includes depositing a metal-containing electrode layer abutting the insulator film to form a MIS structure, and heat-treating the MIS structure to scavenge oxygen from the TiO2 to the metal-containing electrode layer to form a MIS contact with oxygen vacancies in the TiO2. According to one embodiment the at least one additional metal oxide is selected from HfO2, ZrO2, Al2O3, and combinations thereof, and the metal-containing electrode layer is selected from the group consisting of Ti metal, Al metal, Hf metal, Zr metal, Ta metal, Nb metal, and a combination thereof.

Abstract: A semiconductor device is provided. The semiconductor device can have a substrate including dielectric material. A plurality of narrow interconnect openings can be formed within said dielectric material. In addition, a plurality of wide interconnect openings can be formed within said dielectric material. The semiconductor device can include a first metal filling the narrow interconnect openings to form an interconnect structure and conformally covering a surface of the wide interconnect openings formed in the dielectric material, and a second metal formed over the first metal and encapsulated by the first metal to form another interconnect structure within the wide interconnect openings.

Abstract: A method for selective bottom-up filling of recessed features with a low resistivity metal for semiconductor devices is described in several embodiments. The method includes providing a substrate containing a patterned dielectric layer having a recessed feature with dielectric layer surfaces and a metal-containing surface on a bottom of the recessed feature, reacting the dielectric layer surfaces with a reactant gas containing a hydrophobic functional group to form hydrophobic dielectric layer surfaces, and at least substantially filling the recessed feature with a metal in a bottom-up gas phase deposition process that hinders deposition of the metal on the hydrophobic dielectric layer surfaces. According to one embodiment, the metal is selected from the group consisting of ruthenium (Ru), cobalt (Co), aluminum (Al), iridium (Ir), iridium (Ir), rhodium (Rh), osmium (Os), palladium (Pd), platinum (Pt), nickel (Ni), and a combination thereof.

Abstract: A method is provided for solid source doping for source and drain extensions. According to one embodiment, the method includes providing a substrate containing fins of first and second film stacks, sacrificial gates across and on the fins of the first and second film stacks, where the first and second film stacks include alternating first and second films, and where the first films extend through sidewall spacers on the sacrificial gates, selectively forming a first mask layer on the sidewall spacers and on the first films of the first film stack, depositing a first dopant layer on the substrate, heat-treating the substrate to diffuse dopants from the first dopant layer into the first films of the second film stack to form doped first films in the second film stack, and removing the first mask layer from the substrate. The processing steps may be repeated for the second film stack.

Abstract: A method is provided for forming an ultra-shallow boron doping region in a semiconductor device. The method includes depositing a diffusion filter layer on a substrate, the diffusion filter containing a boron nitride layer, a boron oxynitride layer, a silicon nitride layer, or a silicon oxynitride layer, and depositing a boron dopant layer on the diffusion filter layer, the boron dopant layer containing boron oxide, boron oxynitride, or a combination thereof, with the proviso that the diffusion filter layer and the boron dopant layer do not contain the same material. The method further includes heat-treating the substrate to form the ultra-shallow boron dopant region in the substrate by controlled diffusion of boron from the boron dopant layer through the diffusion filter layer and into the substrate.

Abstract: Embodiments of the invention provide a method for atomic layer etching (ALE) of a substrate. According to one embodiment, the method includes providing a substrate, and exposing the substrate to hydrogen fluoride (HF) gas and a boron-containing gas to etch the substrate. According to another embodiment, the method includes providing a substrate containing a metal oxide film, exposing the substrate to HF gas to form a fluorinated surface layer on the metal oxide film, and exposing the substrate to a boron-containing gas to remove the fluorinated surface layer from the metal oxide film. The exposures may be repeated at least once to further etch the metal oxide film.