Patents by Inventor Rong Yu

Rong Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230021424
    Abstract: Aspects of the present disclosure relate to data cache management. In embodiments, a logical block address (LBA) bucket is established with at least one logical LBA group. Additionally, at least one LBA group is associated with two or more distinctly sized cache slots based on an input/output (IO) workload received by the storage array. Further, the association includes binding the two or more distinctly sized cache slots with at least one LBA group and mapping the bound distinctly sized cache slots in a searchable data structure. Furthermore, the searchable data structure identifies relationships between slot pointers and key metadata.
    Type: Application
    Filed: January 28, 2022
    Publication date: January 26, 2023
    Applicant: Dell Products L.P.
    Inventors: Michael Scharland, Mark Halstead, Rong Yu, Peng Wu, Benjamin Yoder
  • Publication number: 20230023314
    Abstract: Aspects of the present disclosure relate to data cache management. In embodiments, a storage array's memory is provisioned with cache memory, wherein the cache memory includes one or more sets of distinctly sized cache slots. Additionally, a logical storage volume (LSV) is established with at least one logical block address (LBA) group. Further, at least one of the LSV's LBA groups is associated with two or more distinctly sized cache slots based on an input/output (IO) workload received by the storage array.
    Type: Application
    Filed: July 26, 2021
    Publication date: January 26, 2023
    Applicant: EMC IP Holding Company LLC
    Inventors: Michael Scharland, Mark Halstead, Rong Yu, Peng Wu, Benjamin Yoder, Kaustubh Sahasrabudhe
  • Publication number: 20230018849
    Abstract: A method for configuring a peripheral bus of an information handling system performs, as part of a boot sequence, an initial configuration of a chipset setting pertaining to the bus based on a descriptor stored in a nonvolatile storage resource. After an operating system is loaded, a controller detects a peripheral device connecting to the bus and responds by performing a runtime configuration of the chipset setting based on capability information obtained from the peripheral device. The peripheral bus may comprise a USB pipe and a USB-C type connector, wherein the peripheral device is detected by a USB power delivery (PD) controller based on configuration channel (CC) pins of the USB-C connector. The PD controller may signal the chipset and send the device's capability information to the chipset. The PD controller may assert a PMCALERT# signal of the chipset's and send the capability information via a system management link (SMLink1) .
    Type: Application
    Filed: July 14, 2021
    Publication date: January 19, 2023
    Applicant: Dell Products L.P.
    Inventors: William D. LEARA, Chien-Yi JUAN, Rong-Yu WANG, Jui-Hsing CHIU
  • Publication number: 20220416062
    Abstract: A heterojunction bipolar transistor includes: a substrate; a base mesa disposed on the substrate, wherein the base mesa includes a collector layer and a base layer disposed on the collector layer, and wherein in a top view, the base layer includes a first edge and a second edge opposite to the first edge; an emitter layer disposed on the base layer; a base electrode disposed on the substrate and connected to the base layer; a dielectric layer disposed on the base electrode, wherein a first via hole is formed in the dielectric layer at the first edge of the base layer, and a second via hole is formed in the dielectric layer at the second edge of the base layer; and a conductive feature disposed on the dielectric layer, wherein the conductive feature is connected to the base electrode through the first via hole and the second via hole.
    Type: Application
    Filed: June 23, 2022
    Publication date: December 29, 2022
    Inventors: Chih-Yang KAO, Chien-Rong YU
  • Patent number: 11526447
    Abstract: A data service layer running on a storage director node generates a request to destage host data from a plurality of cache slots in a single back-end track. The destage request includes pointers to addresses of the cache slots and indicates an order in which the host application data in the cache slots is to be included in the back-end track. A back-end redundant array of independent drives (RAID) subsystem running on a drive adapter is responsive to the request to calculate parity information using the host application data in the cache slots. The back-end RAID subsystem assembles the single back-end track comprising the host application data from the plurality of cache slots of the request, and destages the single back-end track to a non-volatile drive in a single back-end input-output (IO) operation.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: December 13, 2022
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Peng Wu, Rong Yu, Jiahui Wang, Lixin Pang
  • Patent number: 11501576
    Abstract: A virtual content providing device includes: a communication circuit capable of communicating with a wearable device worn by a user; and a processor functionally connected to the communication circuit. The processor is configured to: display virtual training content on the wearable device through the communication circuit; generate training situation information and user condition information associated with the virtual training content through the wearable device; determine a intervention time point for the virtual training content based on the training situation information and the user condition information; generate virtual intervention content associated with the intervention time point; and display the virtual intervention content in synchronization with the virtual training content through the wearable device.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: November 15, 2022
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hee Sook Shin, Sung Jin Hong, Youn Hee Gil, Hee Kwon Kim, Seong Min Baek, Cho Rong Yu
  • Publication number: 20220358103
    Abstract: Data deduplication techniques may use a fingerprint hash table and a backend location hash table in connection with performing operations including fingerprint insertion, fingerprint deletion and fingerprint lookup. Processing I/O operations may include: receiving a write operation that writes data to a target logical address; determining a fingerprint for the data; querying the fingerprint hash table using the fingerprint to determine a matching entry of the fingerprint hash table for the fingerprint; and responsive to determining that the fingerprint hash table does not have the matching entry that matches the fingerprint, performing processing including: inserting a first entry in the fingerprint hash table, wherein the first entry includes the fingerprint for the data and identifies a storage location at which the data is stored; and inserting a second entry in a backend location hash table, wherein the second entry references the first entry.
    Type: Application
    Filed: July 14, 2022
    Publication date: November 10, 2022
    Applicant: EMC IP Holding Company LLC
    Inventors: Peng Wu, Bin Dai, Rong Yu
  • Patent number: 11450033
    Abstract: Provided are an apparatus and method for experiencing an augmented reality (AR)-based screen sports match which enable even a child, an elderly person, and a person with a disability to easily and safely experience a ball sports match, such as tennis, badminton, or squash, as a screen sports match without using a wearable marker or sensor, a wearable display, an actual ball, and an actual tool.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: September 20, 2022
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong Sung Kim, Youn Hee Gil, Seong Min Baek, Hee Sook Shin, Seong Il Yang, Cho Rong Yu, Sung Jin Hong
  • Patent number: 11416462
    Abstract: Data deduplication techniques may use a fingerprint hash table and a backend location hash table in connection with performing operations including fingerprint insertion, fingerprint deletion and fingerprint lookup. Processing I/O operations may include: receiving a write operation that writes data to a target logical address; determining a fingerprint for the data; querying the fingerprint hash table using the fingerprint to determine a matching entry of the fingerprint hash table for the fingerprint; and responsive to determining that the fingerprint hash table does not have the matching entry that matches the fingerprint, performing processing including: inserting a first entry in the fingerprint hash table, wherein the first entry includes the fingerprint for the data and identifies a storage location at which the data is stored; and inserting a second entry in a backend location hash table, wherein the second entry references the first entry.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: August 16, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Peng Wu, Bin Dai, Rong Yu
  • Patent number: 11411080
    Abstract: A heterojunction bipolar transistor includes a bottom sub-collector layer formed over a substrate. The heterojunction bipolar transistor also includes an upper sub-collector layer formed over the bottom sub-collector layer. The heterojunction bipolar transistor also includes a collector layer formed over the upper sub-collector layer. The heterojunction bipolar transistor also includes a base layer formed over the collector layer. The heterojunction bipolar transistor also includes an emitter layer formed over the base layer. The heterojunction bipolar transistor also includes a passivation layer covering the bottom sub-collector layer, the upper sub-collector layer, the collector layer, the base layer, and the emitter layer. The heterojunction bipolar transistor also includes a collector electrode that covers the portion of the passivation layer that is over the sidewall of the upper sub-collector layer.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: August 9, 2022
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Chien-Rong Yu, Shu-Hsiao Tsai, Jui-Pin Chiu, She-Hsin Hsiao
  • Publication number: 20220229589
    Abstract: A synchronous destage process is used to move data from shared global memory to back-end storage resources. The synchronous destage process is implemented using a client-server model between a data service layer (client) and back-end disk array of a storage system (server). The data service layer initiates a synchronous destage operation by requesting that the back-end disk array move data from one or more slots of global memory to back-end storage resources. The back-end disk array services the request and notifies the data service layer of the status of the destage operation, e.g. a destage success or destage failure. If the destage operation is a success, the data service layer updates metadata to identify the location of the data on back-end storage resources. If the destage operation is not successful, the data service layer re-initiates the destage process by issuing a subsequent destage request to the back-end disk array.
    Type: Application
    Filed: January 19, 2021
    Publication date: July 21, 2022
    Inventors: Lixin Pang, Rong Yu, Peng Wu, Shao Hu, Mohammed Asher VT
  • Patent number: 11392442
    Abstract: An aspect of the present disclosure relates to one or more techniques to identify and resolve storage array errors. In embodiments, an error notification related to a computing device can be received. One or more threads related to the error notification can further be identified. Additionally, an error resolution technique can be performed based on each identified thread.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: July 19, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Malak Alshawabkeh, Sunil Gumaste, Abhilash Sanap, Ravish Sachdeva, Pankaj Soni, Rong Yu
  • Publication number: 20220216303
    Abstract: A heterojunction bipolar transistor includes a bottom sub-collector layer formed over a substrate. The heterojunction bipolar transistor also includes an upper sub-collector layer formed over the bottom sub-collector layer. The heterojunction bipolar transistor also includes a collector layer formed over the upper sub-collector layer. The heterojunction bipolar transistor also includes a base layer formed over the collector layer. The heterojunction bipolar transistor also includes an emitter layer formed over the base layer. The heterojunction bipolar transistor also includes a passivation layer covering the bottom sub-collector layer, the upper sub-collector layer, the collector layer, the base layer, and the emitter layer. The heterojunction bipolar transistor also includes a collector electrode that covers the portion of the passivation layer that is over the sidewall of the upper sub-collector layer.
    Type: Application
    Filed: January 5, 2021
    Publication date: July 7, 2022
    Inventors: Chien-Rong YU, Shu-Hsiao TSAI, Jui-Pin CHIU, She-Hsin HSIAO
  • Patent number: 11372562
    Abstract: A storage system that supports multiple RAID levels presents storage objects with front-end tracks corresponding to back-end tracks on non-volatile drives and accesses the drives using a single type of back-end allocation unit that is larger than a back-end track. When the number of members of a protection group of a RAID level does not align with the back-end allocation unit, multiple back-end tracks are grouped and accessed using a single IO. The number of back-end tracks in a group is selected to align with the back-end allocation unit size. If the front-end tracks are variable size, then front-end tracks may be destaged into a smaller number of grouped back-end tracks in a single IO.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: June 28, 2022
    Assignee: Dell Products L.P.
    Inventors: Peng Wu, Rong Yu, Jiahui Wang, Lixin Pang
  • Patent number: 11347409
    Abstract: A primary storage system appends a red-hot data indicator to each track of data transmitted on a remote data facility during an initial synchronization state. The red-hot data indicator indicates, on a track-by-track basis, whether the data associated with that track should be stored as compressed or uncompressed data by the backup storage system. The red-hot data indicator may be obtained from the primary storage system's extent-based red-hot data map. If the red-hot data indicator indicates that the track should remain uncompressed, or if the track is locally identified as red-hot data, the backup storage system stores the track as uncompressed data. If the red-hot data indicator indicates that the track should be compressed, the backup storage system compresses the track and stores the track as compressed data. After the initial synchronization process has completed, red-hot data indicators are no longer appended to tracks by the primary storage system.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: May 31, 2022
    Assignee: Dell Products, L.P.
    Inventors: Benjamin Randolph, Rong Yu, Malak Alshawabkeh, Ian Adams
  • Patent number: 11340805
    Abstract: A storage array packs multiple non-full-size front-end tracks into slices that contain multiple back-end tracks. A greedy first fit packing algorithm is used to find packing solutions that are cached and ranked. The cached, ranked packing solutions are used by attempting to find matches with bucketed front-end tracks to be relocated. New packing solutions are generated and cached when matches cannot be found. Packing solutions may be shared outside the domain in which they are discovered.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: May 24, 2022
    Assignee: Dell Products L.P.
    Inventors: Peng Wu, Rong Yu, Jingtong Liu
  • Publication number: 20220157022
    Abstract: A method and an apparatus for virtual training based on tangible interaction are provided. The apparatus acquires data for virtual training, and acquires a three-dimensional position of a real object based on a depth image and color image of the real object and infrared (IR) data included in the obtained data. Then, virtualization of an overall appearance of a user is performed by extracting a depth from depth information on a user image included in the obtained data and matching the extracted depth with the color information, and depth data and color data for the user obtained according to virtualization of the user is visualized in virtual training content. In addition, the apparatus performs correction on joint information using the joint information and the depth information included in the obtained data, estimates a posture of the user using the corrected joint information, and estimates a posture of a training tool using the depth information and IR data included in the obtained data.
    Type: Application
    Filed: November 17, 2021
    Publication date: May 19, 2022
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seong Min BAEK, Youn-Hee GIL, Cho-Rong YU, Hee Sook SHIN, Sungjin HONG
  • Publication number: 20220138997
    Abstract: Provided are an apparatus and method for experiencing an augmented reality (AR)-based screen sports match which enable even a child, an elderly person, and a person with a disability to easily and safely experience a ball sports match, such as tennis, badminton, or squash, as a screen sports match without using a wearable marker or sensor, a wearable display, an actual ball, and an actual tool.
    Type: Application
    Filed: June 29, 2021
    Publication date: May 5, 2022
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jong Sung KIM, Youn Hee GIL, Seong Min BAEK, Hee Sook SHIN, SEONG IL YANG, Cho Rong YU, Sung Jin HONG
  • Patent number: 11321178
    Abstract: Occurrence of a RAID double failure in a slice of a RAID protection group (failed slice) renders data stored in the back-end tracks of the failed slice vulnerable to loss. When a RAID double failure is detected, a new slice is added to the RAID protection group. Front-end tracks that map to the good back-end tracks of the failed slice are moved from the back-end tracks of the failed slice to the back-end tracks of the newly added slice. Any front-end tracks that mapped to the bad back-end tracks of the failed slice are made to be write pending and written to corresponding back-end tracks of the newly added slice. Front-end tracks that map to the bad back-end tracks may be made to be write-pending in connection with a host write operation, by reading the front-end tracks from a local backup, or from a remote backup location.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: May 3, 2022
    Assignee: Dell Products, L. P.
    Inventors: Rong Yu, Peng Wu, Shao Hu, Lixin Pang
  • Patent number: 11315028
    Abstract: A method of increasing the accuracy of predicting future IO operations on a storage system includes creating a snapshot of a production volume, linking the snapshot to a thin device, mounting the thin device in a cloud tethering subsystem, and tagging the thin device to identify the thin device as being used by the cloud tethering subsystem. When data read operations are issued by the cloud tethering subsystem on the tagged thin device, the data read operations are executed by a front-end adapter of the storage system to forward data associated with the data read operations to a cloud repository. The cache manager, however, does not use information about data read operations on tagged thin devices in connection with predicting future IO operations on the cache, so that movement of snapshots to the cloud repository do not skew the algorithms being used by the cache manager to perform cache management.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: April 26, 2022
    Assignee: Dell Products, L.P.
    Inventors: Deepak Vokaliga, Rong Yu