Patents by Inventor Rong Yu

Rong Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220067549
    Abstract: A method of increasing the accuracy of predicting future IO operations on a storage system includes creating a snapshot of a production volume, linking the snapshot to a thin device, mounting the thin device in a cloud tethering subsystem, and tagging the thin device to identify the thin device as being used by the cloud tethering subsystem. When data read operations are issued by the cloud tethering subsystem on the tagged thin device, the data read operations are executed by a front-end adapter of the storage system to forward data associated with the data read operations to a cloud repository. The cache manager, however, does not use information about data read operations on tagged thin devices in connection with predicting future IO operations on the cache, so that movement of snapshots to the cloud repository do not skew the algorithms being used by the cache manager to perform cache management.
    Type: Application
    Filed: September 3, 2020
    Publication date: March 3, 2022
    Inventors: Deepak Vokaliga, Rong Yu
  • Patent number: 11256447
    Abstract: A storage array that presents a logical storage device to hosts that is accessed using front-end tracks and access tangible managed drive using back-end tracks locates multiple front-end tracks in individual back-end tracks. Error-correcting codes are used to identify different front-end tracks in a back-end track when the back-end track is copied from the managed drives into storage array memory. CKD front-end tracks can be split into multiple partial CKD front-end tracks that are located at contiguous address space in different back-end tracks. The front-end tracks that are located in a particular back-end track may be selected to reduce or minimize unused space. The front-end tracks in a back-end track may be logically stored on different production volumes.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: February 22, 2022
    Assignee: Dell Products L.P.
    Inventors: Lixin Pang, Jiahui Wang, Peng Wu, Rong Yu
  • Patent number: 11243890
    Abstract: Embodiments of the present disclosure relate to verifying compressed data. Compressed data files can be read from a global cache for a storage device into a local buffer. A data verification level of a plurality of data verification levels can be selected to perform on the compressed data files. An amount of data blocks of each data file can be decompressed based on the determined data verification level. An integrity of the compressed data files verified using the decompressed data blocks.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: February 8, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Peng Wu, Rong Yu, Tao Gong
  • Patent number: 11236951
    Abstract: A heat exchanger includes a conduit configured to flow a refrigerant therethrough and a fin coupled to the conduit. The fin has a slot formed therethrough, in which the slot has a first portion and a second portion continuous with the first portion and disposed at an angle relative to the first portion.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: February 1, 2022
    Assignee: Johnson Controls Technology Company
    Inventor: Rong Yu
  • Publication number: 20220020868
    Abstract: A bipolar transistor includes a substrate, a sub-collector layer, a collector layer, a base layer, an emitter layer, a passivation layer, and a collector electrode. The sub-collector layer is formed over the substrate. The collector layer is formed over the sub-collector layer. The base layer is formed over the collector layer. The emitter layer is formed over the base layer. The passivation layer is formed over the substrate and covering a sidewall of the collector layer. The collector electrode is connected to the sub-collector layer through an opening in the passivation layer. The opening exposes at least a portion of the sub-collector layer.
    Type: Application
    Filed: September 29, 2021
    Publication date: January 20, 2022
    Inventors: Chien-Rong YU, Shu-Hsiao TSAI, Jui-Pin CHIU
  • Publication number: 20220012218
    Abstract: Data deduplication techniques may use a fingerprint hash table and a backend location hash table in connection with performing operations including fingerprint insertion, fingerprint deletion and fingerprint lookup. Processing I/O operations may include: receiving a write operation that writes data to a target logical address; determining a fingerprint for the data; querying the fingerprint hash table using the fingerprint to determine a matching entry of the fingerprint hash table for the fingerprint; and responsive to determining that the fingerprint hash table does not have the matching entry that matches the fingerprint, performing processing including: inserting a first entry in the fingerprint hash table, wherein the first entry includes the fingerprint for the data and identifies a storage location at which the data is stored; and inserting a second entry in a backend location hash table, wherein the second entry references the first entry.
    Type: Application
    Filed: July 13, 2020
    Publication date: January 13, 2022
    Applicant: EMC IP Holding Company LLC
    Inventors: Peng Wu, Bin Dai, Rong Yu
  • Publication number: 20210374392
    Abstract: A virtual content providing device includes: a communication circuit capable of communicating with a wearable device worn by a user; and a processor functionally connected to the communication circuit. The processor is configured to: display virtual training content on the wearable device through the communication circuit; generate training situation information and user condition information associated with the virtual training content through the wearable device; determine a intervention time point for the virtual training content based on the training situation information and the user condition information; generate virtual intervention content associated with the intervention time point; and display the virtual intervention content in synchronization with the virtual training content through the wearable device.
    Type: Application
    Filed: November 19, 2020
    Publication date: December 2, 2021
    Inventors: Hee Sook SHIN, Sung Jin HONG, Youn Hee GIL, Hee Kwon KIM, Seong Min BAEK, Cho Rong YU
  • Patent number: 11164962
    Abstract: A bipolar transistor includes an upper sub-collector layer, a collector layer, a base layer, an emitter layer, and a collector electrode. The collector layer is disposed on the upper sub-collector layer. The base layer is disposed on the collector layer. An emitter layer is disposed on the base layer. The collector electrode is disposed directly on a sidewall of the upper sub-collector layer.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: November 2, 2021
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Chien-Rong Yu, Shu-Hsiao Tsai, Jui-Pin Chiu
  • Publication number: 20210334026
    Abstract: Embodiments of the present disclosure relate to managing communications between slices on a storage device engine. Shared slice memory of a storage device engine is provisioned for use by each slice of the storage device engine. The shared slice memory is a portion of total storage device engine memory. Each slice's access to the shared memory portion is controlled.
    Type: Application
    Filed: April 27, 2020
    Publication date: October 28, 2021
    Applicant: EMC IP Holding Company LLC
    Inventors: Rong Yu, Jingtong Liu, Peng Wu
  • Patent number: 11144445
    Abstract: Within a storage array, allocation of physical storage capacity within a storage array may be managed in standard size allocation units of uncompressed data, e.g. 128kb tracks, while smaller sub-allocation unit compression domains, e.g. 32kb quarter tracks, are used for compressed data. The data within a sub-allocation unit may be compressed to a size that is less than the capacity of the sub-allocation unit. Data associated with sub-allocation units that are not required to service a read or write may not need to be compressed or decompressed in order to service the read or write. Consequently, resource usage may be more efficient.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: October 12, 2021
    Assignee: Dell Products L.P.
    Inventors: Rong Yu, Michael Scharland, Jeremy O'Hare
  • Publication number: 20210311852
    Abstract: Embodiments of the present disclosure relate to throttling processing threads of a storage device. One or more input/output (I/O) workloads of a storage device can be monitored. One or more resources consumed by each thread of each storage device component to process each operation included in a workload can be analyzed. Based on the analysis, consumption of each resource consumed by each thread can be controlled.
    Type: Application
    Filed: April 2, 2020
    Publication date: October 7, 2021
    Applicant: EMC IP Holding Company LLC
    Inventors: Ramesh Doddaiah, Malak Alshawabkeh, Mohammed Asher, Rong Yu
  • Publication number: 20210216468
    Abstract: Embodiments of the present disclosure relate to verifying compressed data. Compressed data files can be read from a global cache for a storage device into a local buffer. A data verification level of a plurality of data verification levels can be selected to perform on the compressed data files. An amount of data blocks of each data file can be decompressed based on the determined data verification level. An integrity of the compressed data files verified using the decompressed data blocks.
    Type: Application
    Filed: January 14, 2020
    Publication date: July 15, 2021
    Applicant: EMC IP Holding Company LLC
    Inventors: Peng Wu, Rong Yu, Tao Gong
  • Publication number: 20210210626
    Abstract: A bipolar transistor includes an upper sub-collector layer, a collector layer, a base layer, an emitter layer, and a collector electrode. The collector layer is disposed on the upper sub-collector layer. The base layer is disposed on the collector layer. An emitter layer is disposed on the base layer. The collector electrode is disposed directly on a sidewall of the upper sub-collector layer.
    Type: Application
    Filed: January 6, 2020
    Publication date: July 8, 2021
    Inventors: Chien-Rong YU, Shu-Hsiao TSAI, Jui-Pin CHIU
  • Publication number: 20210158032
    Abstract: A method of recognizing motions of a plurality of users through a motion recognition apparatus includes acquiring a plurality of depth images from a plurality of depth sensors disposed at different positions, extracting user depth data corresponding to a user area from each of the plurality of depth images, allocating a label ID of each user to the extracted user depth data; matching the label ID for each frame of the depth images, and tracking a joint position for the user depth data on the basis of a result of the matching.
    Type: Application
    Filed: November 12, 2020
    Publication date: May 27, 2021
    Inventors: Seong Min BAEK, Youn Hee GIL, Hee Kwon KIM, Hee Sook SHIN, Cho Rong YU, Sung Jin HONG
  • Patent number: 11016896
    Abstract: Maintaining multiple cache areas in a storage device having multiple processors includes loading data from a specific portion of non-volatile storage into a local cache slot in response to a specific processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the local cache slot is accessible to the first subset of the processors and is inaccessible to a second subset of the processors that is different than the first subset of the processors and includes converting the local cache slot into a global cache slot in response to one of the processors performing a write operation to the specific portion of non-volatile storage, wherein the global cache area is accessible to the first subset of the processors and to the second subset of the processors. Different ones of the processors may be placed on different directors.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: May 25, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Venkata Khambam, Jeffrey R. Nelson, Brian Asselin, Rong Yu
  • Patent number: 11007630
    Abstract: A stapler includes a main body, a magazine, a striker, and a driving portion. The main body encloses a receiving space and has an opening at the bottom of the front end thereof. The opening communicates with the receiving space. The magazine is arranged in the main body for receiving staples. The striker is arranged at the front end of the main body and is linearly slidable above the opening vertically. The driving portion is disposed on the main body and is connected to the striker to drive it to move downward to strike the staple out. The striker has a bottom face oriented frontward and downward so that an angle ranged from 3-15 degrees is defined between the bottom face and the horizontal plane.
    Type: Grant
    Filed: January 2, 2019
    Date of Patent: May 18, 2021
    Assignee: Apex Mfg. Co., Ltd.
    Inventor: Rong-Yu Wang
  • Patent number: 10877936
    Abstract: The system, devices, and methods disclosed herein relate to data ratio reduction technology adapted to reduce storage costs by weeding out duplicative data write operations. The techniques and systems disclosed achieve deduplication benefits by reducing the size of hash values stored hash tables used to compare unwritten data blocks to data that has already been written and stored somewhere in physical storage. The data deduplication systems, methods, and products facilitate deduplication at the block level as well as for misaligned data chunks within data blocks, that is an unwritten data block that has been stored sequentially in two different physical locations. The deduplication teachings herein are amenable to varying data block sizes as well as data chunk sizes within blocks. Our embodiments enhance computer performance by substantially reducing computational speeds and storage requirements attendant to deduplication systems using larger hash table data sizes.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: December 29, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Jeremy J. O'Hare, Rong Yu, Peng Wu, Michael J. Scharland
  • Patent number: 10853257
    Abstract: Allocation of physical storage capacity within a storage array may be managed in standard size allocation units, e.g. 128 kb tracks, and smaller sub-allocation units, e.g. 32 kb quarter tracks. Data associated with sub-allocation units that match a known pattern may be represented by a hint rather than data in storage. The hint may be used to mitigate overhead associated with accessing backend storage. The hint may also mitigate the need for performing compression/decompression of the corresponding sub-allocation unit if the data is compressed. In response to a read or write request associated with an allocation unit organized into sub-allocation units, only those sub-allocation units that are required to service the read or write request and fail to match a pattern are accessed, decompressed or compressed.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: December 1, 2020
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Rong Yu, Jeremy J. O'Hare, Anoop Raghunathan, Ning Wu
  • Publication number: 20200320002
    Abstract: Architectures and techniques are described that can address challenges associated with efficiently managing a cache of a data facility. In that regard, for each block (or other file system structure) of a storage array spanning multiple storage device, relationships can be established between other blocks of the array. The blocks can then be represented as multidimensional vectors, and an aggregation of the vectors can be represented as a weight matrix having values that reflect the corresponding relationships between any two given blocks. In response to any given IO transaction, a corresponding vector can be selected that is representative of a block referenced by the IO transaction and one or more target blocks having a high relationship value to the block can be identified and used in connection with a cache update procedure.
    Type: Application
    Filed: April 4, 2019
    Publication date: October 8, 2020
    Inventors: Ramesh Doddaiah, Rong Yu
  • Patent number: 10795814
    Abstract: Maintaining multiple cache areas in a storage device having multiple processors includes loading data into a first local cache in response to a first processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the first local cache is accessible to the first subset of the processors and is inaccessible to other processors, loading data into a second local cache in response to a second processor of the second subset of the processors performing a read operation to the specific portion of non-volatile storage, where the second local cache is accessible to the second subset of the processors and is inaccessible to other processors, and loading data into a global cache in response to one of the processors performing a write operation to the specific portion of non-volatile storage, where the global cache is accessible to all the processors.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: October 6, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Jeffrey R. Nelson, Michael J. Scharland, Rong Yu