Abstract: Maintaining multiple cache areas in a storage device having multiple processors includes loading data from a specific portion of non-volatile storage into a local cache area in response to a specific processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the local cache area is accessible to the first subset of the processors and is inaccessible to a second subset of the processors that is different than the first subset of the processors and includes loading data from the specific portion of non-volatile storage into a global cache area in response to one of the processors performing a write operation to the specific portion of non-volatile storage, where the global cache area is accessible to the first subset of the processors and to the second subset of the processors. Different processors may be placed on different directors.

Abstract: Fingerprints of data portions are distributed in a balanced manner across active controllers of a data storage system, and may be done so in such a manner that, when a new active controller is added to the system, fingerprint ownership and movement between pre-existing active controllers, and active controllers overall, is minimized When a new active controller is added to the system and fingerprints are redistributed, no fingerprint ownership may be re-assigned between pre-existing active controllers and no fingerprints may be moved between pre-existing active controllers, for example, between local memories of the active controller.

Abstract: Techniques for processing I/O operations includes: determining whether a current amount of unused physical storage is greater than a threshold; and responsive to determining the current amount of unused physical storage is greater than the threshold, performing normal write processing, and otherwise performing alternative write processing. The alternative write processing includes: initializing a counter; determining whether a physical storage allocation is needed or potentially needed for a write I/O operation; responsive to determining that no physical storage allocation is needed for the write I/O operation, performing the normal write processing. Responsive to determining that a physical storage allocation is needed or potentially needed for the write I/O operation, determining a first amount of one or more credits needed to service the write I/O operation; and responsive to determining the counter does not include at least the first amount of one or more credits, failing the write I/O operation.

Abstract: A heat exchanger includes a conduit configured to flow a refrigerant therethrough and a fin coupled to the conduit. The fin has a slot formed therethrough, in which the slot has a first portion and a second portion continuous with the first portion and disposed at an angle relative to the first portion.

Abstract: Maintaining multiple cache areas in a storage device having multiple processors includes loading data from a specific portion of non-volatile storage into a local cache slot in response to a specific processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the local cache slot is accessible to the first subset of the processors and is inaccessible to a second subset of the processors that is different than the first subset of the processors and includes converting the local cache slot into a global cache slot in response to one of the processors performing a write operation to the specific portion of non-volatile storage, wherein the global cache area is accessible to the first subset of the processors and to the second subset of the processors. Different ones of the processors may be placed on different directors.

Abstract: The present invention discloses a W-containing R—Fe—B—Cu serial sintered magnet and quenching alloy. The sintered magnet contains an R2Fe14B-type main phase, the R being at least one rare earth element comprising Nd or Pr; the crystal grain boundary of the rare earth magnet contains a W-rich area above 0.004 at % and below 0.26 at %, and the W-rich area accounts for 2.0 vol %˜11.0 vol % of the sintered magnet. The sintered magnet uses a minor amount of W pinning crystal to segregate the migration of the pinned grain boundary in the crystal grain boundary to effectively prevent abnormal grain growth and obtain significant improvement. The crystal grain boundary of the quenching alloy contains a W-rich area above 0.004 at % and below 0.26 at %, and the W-rich area accounts for at least 50 vol % of the crystal grain boundary.

Abstract: Maintaining multiple cache areas in a storage device having multiple processors includes loading data from a specific portion of non-volatile storage into a local cache slot in response to a specific processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the local cache slot is accessible to the first subset of the processors and is inaccessible to a second subset of the processors that is different than the first subset of the processors and includes converting the local cache slot into a global cache slot in response to one of the processors performing a write operation to the specific portion of non-volatile storage, wherein the global cache area is accessible to the first subset of the processors and to the second subset of the processors. Different ones of the processors may be placed on different directors.

Abstract: A storage array presents a logical production volume that is backed by tangible data storage devices. The production volume is organized into fixed size front end allocation units. The tangible data storage devices are organized into discrete size back end allocation units of a plurality of different sizes. Data associated with each one of the front end allocation units is stored on only one of the back end allocation units. For example, compressed data may be stored on a back end allocation unit that is smaller than a front end allocation unit while maintaining a 1-to-1 relationship between the front end allocation unit and the back end allocation unit.

Abstract: The system, devices, and methods disclosed herein relate to data ratio reduction technology adapted to reduce storage costs by weeding out duplicative data write operations. The techniques and systems disclosed achieve deduplication benefits by reducing the size of hash values stored hash tables used to compare unwritten data blocks to data that has already been written and stored somewhere in physical storage. The data deduplication systems, methods, and products facilitate deduplication at the block level as well as for misaligned data chunks within data blocks, that is an unwritten data block that has been stored sequentially in two different physical locations. The deduplication teachings herein are amenable to varying data block sizes as well as data chunk sizes within blocks. Our embodiments enhance computer performance by substantially reducing computational speeds and storage requirements attendant to deduplication systems using larger hash table data sizes.

Abstract: Maintaining multiple cache areas in a storage device having multiple processors includes loading data from a specific portion of non-volatile storage into a local cache area in response to a specific processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the local cache area is accessible to the first subset of the processors and is inaccessible to a second subset of the processors that is different than the first subset of the processors and includes loading data from the specific portion of non-volatile storage into a global cache area in response to one of the processors performing a write operation to the specific portion of non-volatile storage, where the global cache area is accessible to the first subset of the processors and to the second subset of the processors. Different processors may be placed on different directors.

Abstract: Maintaining multiple cache areas in a storage device having multiple processors includes loading data into a first local cache in response to a first processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the first local cache is accessible to the first subset of the processors and is inaccessible to other processors, loading data into a second local cache in response to a second processor of the second subset of the processors performing a read operation to the specific portion of non-volatile storage, where the second local cache is accessible to the second subset of the processors and is inaccessible to other processors, and loading data into a global cache in response to one of the processors performing a write operation to the specific portion of non-volatile storage, where the global cache is accessible to all the processors.

Abstract: Maintaining multiple cache areas in a storage device having multiple processors includes loading data from a specific portion of non-volatile storage into a local cache slot in response to a specific processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the local cache slot is accessible to the first subset of the processors and is inaccessible to a second subset of the processors that is different than the first subset of the processors and includes converting the local cache slot into a global cache slot in response to one of the processors performing a write operation to the specific portion of non-volatile storage, wherein the global cache area is accessible to the first subset of the processors and to the second subset of the processors. Different ones of the processors may be placed on different directors.

Abstract: An embedded touch panel (100) having a high resistance film (70) comprises a sequentially stacked first substrate (10), thin-film transistor substrate (20), liquid crystal layer (30), color filter (40), touch sensing layer (50), second substrate (60), and the high resistance film (70). A plurality of mutually insulated sensing wires are disposed on a surface of the thin-film transistor substrate (20) facing toward the liquid crystal layer (30). The thin-film transistor substrate (20) and the touch sensing layer (50) work together to embed a functionality of a touch panel into liquid crystal pixels, reducing a thickness of the touch panel (100). The high resistance film (70) is disposed on a surface of the second substrate (60) facing away from the touch sensing layer (50), and is electrically connected to the thin-film transistor substrate (20).

Abstract: The present invention discloses a W-containing R—Fe—B—Cu serial sintered magnet and quenching alloy. The sintered magnet contains an R2Fe14B-type main phase, the R being at least one rare earth element comprising Nd or Pr; the crystal grain boundary of the rare earth magnet contains a W-rich area above 0.004 at % and below 0.26 at %, and the W-rich area accounts for 2.0 vol %-11.0 vol % of the sintered magnet. The sintered magnet uses a minor amount of W pinning crystal to segregate the migration of the pinned grain boundary in the crystal grain boundary to effectively prevent abnormal grain growth and obtain significant improvement. The crystal grain boundary of the quenching alloy contains a W-rich area above 0.004 at % and below 0.26 at %, and the W-rich area accounts for at least 50 vol % of the crystal grain boundary.

Abstract: The present invention discloses a W-containing R—Fe—B—Cu serial sintered magnet and quenching alloy. The sintered magnet contains an R2Fe14B-type main phase, the R being at least one rare earth element comprising Nd or Pr; the crystal grain boundary of the rare earth magnet contains a W-rich area above 0.004 at % and below 0.26 at %, and the W-rich area accounts for 5.0 vol %˜11.0 vol % of the sintered magnet. The sintered magnet uses a minor amount of W pinning crystal to segregate the migration of the pinned grain boundary in the crystal grain boundary to effectively prevent abnormal grain growth and obtain significant improvement. The crystal grain boundary of the quenching alloy contains a W-rich area above 0.004 at % and below 0.26 at %, and the W-rich area accounts for at least 50 vol % of the crystal grain boundary.

Abstract: Fingerprints of data portions are distributed in a balanced manner across active controllers of a data storage system, and may be done so in such a manner that, when a new active controller is added to the system, fingerprint ownership and movement between pre-existing active controllers, and active controllers overall, is minimized When a new active controller is added to the system and fingerprints are redistributed, no fingerprint ownership may be re-assigned between pre-existing active controllers and no fingerprints may be moved between pre-existing active controllers, for example, between local memories of the active controller.

Abstract: A stapler includes a main body, a magazine, a striker, and a driving portion. The main body encloses a receiving space and has an opening at the bottom of the front end thereof. The opening communicates with the receiving space. The magazine is arranged in the main body for receiving staples. The striker is arranged at the front end of the main body and is linearly slidable above the opening vertically. The driving portion is disposed on the main body and is connected to the striker to drive it to move downward to strike the staple out. The striker has a bottom face oriented frontward and downward so that an angle ranged from 3-15 degrees is defined between the bottom face and the horizontal plane.

Abstract: Provided is an alternative text generating method. The alternative text generating method includes recognizing input visual content, generating input information corresponding to a recognition result of the recognition of the visual content, generating an editing window including an input item to which the input information is automatically input, automatically generating an alternative text, based on an alternative text generation rule and the input information, and displaying the generated alternative text on a text box of the editing window.

Abstract: An embedded touch panel (100) having a high resistance film (70) comprises a sequentially stacked first substrate (10), thin-film transistor substrate (20), liquid crystal layer (30), color filter (40), touch sensing layer (50), second substrate (60), and the high resistance film (70). A plurality of mutually insulated sensing wires are disposed on a surface of the thin-film transistor substrate (20) facing toward the liquid crystal layer (30). The thin-film transistor substrate (20) and the touch sensing layer (50) work together to embed a functionality of a touch panel into liquid crystal pixels, reducing a thickness of the touch panel (100). The high resistance film (70) is disposed on a surface of the second substrate (60) facing away from the touch sensing layer (50), and is electrically connected to the thin-film transistor substrate (20).