Patents by Inventor Rongjun Wang

Rongjun Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105444
    Abstract: Methods for reducing contact resistance include performing a selective titanium silicide (TiSi) deposition process on a middle of the line (MOL) contact structure that includes a cavity in a substrate of dielectric material. The contact structure also includes a silicon-based connection portion at a bottom of the cavity. The selective TiSi deposition process is selective to silicon-based material over dielectric material. The methods also include performing a selective deposition process of a metal material on the MOL contact structure. The selective deposition process is selective to TiSi material over dielectric material and forms a silicide capping layer on the silicon-based connection portion. The methods further include performing a seed layer deposition process of the metal material on the contact structure.
    Type: Application
    Filed: April 26, 2023
    Publication date: March 28, 2024
    Inventors: Jiang LU, Liqi WU, Wei DOU, Weifeng YE, Shih Chung CHEN, Rongjun WANG, Xianmin TANG, Yiyang WAN, Shumao ZHANG, Jianqiu GUO
  • Publication number: 20240087955
    Abstract: A method and apparatus for forming tungsten features in semiconductor devices is provided. The method includes exposing a top opening of a feature formed in a substrate to a physical vapor deposition (PVD) process to deposit a tungsten liner layer within the feature. The PVD process is performed in a first processing region of a first processing chamber and the tungsten liner layer forms an overhang portion, which partially obstructs the top opening of the feature. The substrate is transferred from the first processing region of the first processing chamber to a second processing region of a second processing chamber without breaking vacuum. The overhang portion is exposed to nitrogen-containing radicals in the second processing region to inhibit subsequent growth of tungsten along the overhang portion. The feature is exposed to a tungsten-containing precursor gas to form a tungsten fill layer over the tungsten liner layer within the feature.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 14, 2024
    Inventors: Yi XU, Xianyuan ZHAO, Zhimin QI, Aixi ZHANG, Geraldine VASQUEZ, Dien-Yeh WU, Wei LEI, Xingyao GAO, Shirish PETHE, Wenting HOU, Chao DU, Tsung-Han YANG, Kyoung-Ho BU, Chen-Han LIN, Jallepally RAVI, Yu LEI, Rongjun WANG, Xianmin TANG
  • Publication number: 20240088071
    Abstract: Methods for reducing resistivity of metal gapfill include depositing a conformal layer in an opening of a feature and on a field of a substrate with a first thickness of the conformal layer of approximately 10 microns or less, depositing a non-conformal metal layer directly on the conformal layer at a bottom of the opening and directly on the field using an anisotropic deposition process. A second thickness of the non-conformal metal layer on the field and on the bottom of the feature is approximately 30 microns or greater. And depositing a metal gapfill material in the opening of the feature and on the field where the metal gapfill material completely fills the opening without any voids.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: Yi XU, Yu LEI, Zhimin QI, Aixi ZHANG, Xianyuan ZHAO, Wei LEI, Xingyao GAO, Shirish A. PETHE, Tao HUANG, Xiang CHANG, Patrick Po-Chun LI, Geraldine VASQUEZ, Dien-yeh WU, Rongjun WANG
  • Patent number: 11898236
    Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a processing chamber for processing a substrate comprises a sputtering target, a chamber wall at least partially defining an inner volume within the processing chamber and connected to ground, a power source comprising an RF power source, a process kit surrounding the sputtering target and a substrate support, an auto capacitor tuner (ACT) connected to ground and the sputtering target, and a controller configured to energize the cleaning gas disposed in the inner volume of the processing chamber to create the plasma and tune the sputtering target using the ACT to maintain a predetermined potential difference between the plasma in the inner volume and the process kit during the etch process to remove sputtering material from the process kit, wherein the predetermined potential difference is based on a resonant point of the ACT.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: February 13, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Zhiyong Wang, Halbert Chong, John C. Forster, Irena H. Wysok, Tiefeng Shi, Gang Fu, Renu Whig, Keith A Miller, Sundarapandian Ramalinga Vijayalakshmi Reddy, Jianxin Lei, Rongjun Wang, Tza-Jing Gung, Kirankumar Neelasandra Savandaiah, Avinash Nayak, Lei Zhou
  • Publication number: 20240047267
    Abstract: Embodiments of methods and associated apparatus for filling features in a silicon-containing dielectric layer of a substrate are provided herein. In some embodiments, a method of filling features in a silicon-containing dielectric layer of a substrate includes: depositing a discontinuous liner layer in the feature via a physical vapor deposition (PVD) process in a first process chamber; performing a hydrogen plasma process in a second process chamber to form silicon-hydrogen bonds on surfaces of the feature not covered by the discontinuous liner layer; and depositing a bulk tungsten layer on the discontinuous liner layer and over the silicon-hydrogen bonds to fill the feature with tungsten in a third process chamber.
    Type: Application
    Filed: July 31, 2023
    Publication date: February 8, 2024
    Inventors: Tsung-Han YANG, Shiyu YUE, Rongjun WANG
  • Patent number: 11891261
    Abstract: A device for detecting the flatness of a sheet material includes a conveyor, a gantry, a beam, an industrial camera unit, a speed measurement unit, a vibration measurement unit, a multi-line laser, a cable carrier, an industrial controller, and a control cabinet. The conveyor is disposed beneath the gantry and includes a plurality of pinch roll assemblies for feeding a sheet material. The beam is disposed on the gantry and includes a first side and a second side. The industrial camera unit is disposed on the first side of the beam and includes at least two industrial cameras. The speed measurement unit is disposed between the at least two industrial cameras. The vibration measurement unit is disposed on the second side of the beam and includes at least two distance measurement devices. The multi-line laser is disposed between the at least two distance measurement devices.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: February 6, 2024
    Assignee: TAIYUAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Lifeng Ma, Ziliang Li, Qingxue Huang, Tao Wang, Dahai Jing, Rongjun Wang, Lianyun Jiang
  • Publication number: 20240014072
    Abstract: A method of forming a semiconductor device structure includes forming a nucleation layer within at least one feature. The method includes exposing the nucleation layer to a nitrogen plasma treatment. The nitrogen plasma treatment preferentially treats the top field and sidewalls while leaving the bottom surface substantially untreated to encourage bottom up metal growth.
    Type: Application
    Filed: June 21, 2023
    Publication date: January 11, 2024
    Inventors: Tsung-Han YANG, Zhimin QI, Yongqian GAO, Rongjun WANG, Yi XU, Yu LEI, Xingyao GAO, Chih-Hsun HSU, Xi CEN, Wei LEI, Shiyu YUE, Aixi ZHANG, Kai WU, Xianmin TANG
  • Publication number: 20240006236
    Abstract: A method of forming a structure on a substrate includes forming a tungsten nucleation layer within at least one feature. The method includes forming the nucleation layer via a cyclic vapor deposition process. The cyclic vapor deposition process includes forming a portion of the nucleation layer and then exposing the exposing the nucleation layer a chemical vapor transport (CVT) process to remove impurities from the portion of the nucleation layer. The CVT process may be performed at a temperature of 400 degrees Celsius or less and comprises forming a plasma from a processing gas comprising greater than or equal to 90% of hydrogen gas of a total flow of hydrogen gas and oxygen.
    Type: Application
    Filed: April 11, 2023
    Publication date: January 4, 2024
    Inventors: Tsung-Han YANG, Junyeong YUN, Rongjun WANG, Yi XU, Yu LEI, Wenting HOU, Xianmin TANG
  • Publication number: 20230420295
    Abstract: A method and apparatus for tungsten gap-fill in semiconductor devices are provided. The method includes performing a gradient oxidation process to oxidize exposed portions of a liner layer, wherein the gradient oxidation process preferentially oxidizes an overhang portion of the liner layer, which obstructs or blocks top openings of one or more features formed within a field region of a substrate. The method further includes performing an etchback process to remove or reduce the oxidized overhang portion of the liner layer, exposing the liner layer to a chemical vapor transport (CVT) process to remove metal oxide remaining from the gradient oxidation process and the etchback process, and performing a tungsten gap-fill process to fill or partially fill the one or more features.
    Type: Application
    Filed: April 11, 2023
    Publication date: December 28, 2023
    Inventors: Tsung-Han YANG, Xingyao GAO, Shiyu YUE, Chih-Hsun HSU, Shirish PETHE, Rongjun WANG, Yi XU, Wei LEI, Yu LEI, Aixi ZHANG, Xianyuan ZHAO, Zhimin QI, Jiang LU, Xianmin TANG
  • Patent number: 11855661
    Abstract: A multiplier is configured to implement multiplication of a first value of M bits and a second value of N bits, and includes P groups of encoders and W layers of inversion compressors. Each group include N encoders and are configured to encode a part of bits in the second value, and a group selection signal and a symbol control input signal corresponding to the each group. The group selection signal and the symbol control input signal are generated based on a part of bits in the first value, and the P groups of encoders perform encoding to obtain P partial products. The W layers of inversion compressors are configured to compress the P partial products.
    Type: Grant
    Filed: May 21, 2022
    Date of Patent: December 26, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Tuanbao Fan, Yuexing Jiang, Xiaoshan Shi, Rongjun Wang
  • Publication number: 20230402271
    Abstract: Methods and apparatus for processing substrates are disclosed. In some embodiments, a process chamber for processing a substrate includes: a body having an interior volume and a target to be sputtered, the interior volume including a central portion and a peripheral portion; a substrate support disposed in the interior volume opposite the target and having a support surface configured to support the substrate; a collimator disposed in the interior volume between the target and the substrate support; a first magnet disposed about the body proximate the collimator; a second magnet disposed about the body above the support surface and entirely below the collimator and spaced vertically below the first magnet; and a third magnet disposed about the body and spaced vertically between the first magnet and the second magnet. The first, second, and third magnets are configured to generate respective magnetic fields to redistribute ions over the substrate.
    Type: Application
    Filed: August 25, 2023
    Publication date: December 14, 2023
    Inventors: Xiaodong WANG, Joung Joo LEE, Fuhong ZHANG, Martin Lee RIKER, Keith A. MILLER, William FRUCHTERMAN, Rongjun WANG, Adolph Miller ALLEN, Shouyin ZHANG, Xianmin TANG
  • Publication number: 20230386833
    Abstract: Embodiments of the disclosure relate to methods for selectively removing metal material from the top surface and sidewalls of a feature. The metal material which is covered by a flowable polymer material remains unaffected. In some embodiments, the metal material is formed by physical vapor deposition resulting in a relatively thin sidewall thickness. Any metal material remaining on the sidewall after removal of the metal material from the top surface may be etched by an additional etch process. The resulting metal layer at the bottom of the feature facilitates selective metal gapfill of the feature.
    Type: Application
    Filed: May 25, 2022
    Publication date: November 30, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Liqi Wu, Feng Q. Liu, Bhaskar Jyoti Bhuyan, James Hugh Connolly, Zhimin Qi, Jie Zhang, Wei Dou, Aixi Zhang, Mark Saly, Jiang Lu, Rongjun Wang, David Thompson, Xianmin Tang
  • Publication number: 20230377892
    Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method for processing a substrate comprises forming a plasma reaction between titanium tetrachloride (TlCl4), hydrogen (H2), and argon (Ar) in a region between a lid heater and a showerhead of a process chamber or the showerhead and a substrate while providing RF power at a pulse frequency of about 5 kHz to about 100 kHz and at a duty cycle of about 10% to about 20% and flowing reaction products into the process chamber to selectively form a titanium material layer upon a silicon surface of the substrate.
    Type: Application
    Filed: May 19, 2022
    Publication date: November 23, 2023
    Inventors: Yiyang WAN, Weifeng YE, Shumao ZHANG, Gary HOW, Jiang LU, Lei ZHOU, Dien-yeh WU, Douglas LONG, Avgerinos V. GELATOS, Ying-Bing JIANG, Rongjun WANG, Xianmin TANG, Halbert CHONG
  • Patent number: 11810770
    Abstract: Methods and apparatus for processing substrates are disclosed. In some embodiments, a process chamber for processing a substrate includes: a body having an interior volume and a target to be sputtered, the interior volume including a central portion and a peripheral portion; a substrate support disposed in the interior volume opposite the target and having a support surface configured to support the substrate; a collimator disposed in the interior volume between the target and the substrate support; a first magnet disposed about the body proximate the collimator; a second magnet disposed about the body above the support surface and entirely below the collimator and spaced vertically below the first magnet; and a third magnet disposed about the body and spaced vertically between the first magnet and the second magnet. The first, second, and third magnets are configured to generate respective magnetic fields to redistribute ions over the substrate.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: November 7, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Xiaodong Wang, Joung Joo Lee, Fuhong Zhang, Martin Lee Riker, Keith A. Miller, William Fruchterman, Rongjun Wang, Adolph Miller Allen, Shouyin Zhang, Xianmin Tang
  • Publication number: 20230343643
    Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.
    Type: Application
    Filed: July 19, 2022
    Publication date: October 26, 2023
    Inventors: Chih-Hsun HSU, Shiyu YUE, Wei LEI, Yi XU, Jiang LU, Yu LEI, Ziye XIONG, Tsung-Han YANG, Zhimin QI, Aixi ZHANG, Jie ZHANG, Liqi WU, Rongjun WANG, Shihchung CHEN, Meng-Shan WU, Chun-Chieh WANG, Annamalai LAKSHMANAN, Yixiong YANG, Xianmin TANG
  • Publication number: 20230343644
    Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed in a first process chamber to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process is performed in the first process chamber removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.
    Type: Application
    Filed: November 28, 2022
    Publication date: October 26, 2023
    Inventors: Chih-Hsun HSU, Shiyu YUE, Jiang LU, Rongjun WANG, Xianmin TANG, Zhenjiang CUI, Chi Hong CHING, Meng-Shan WU, Chun-chieh WANG, Wei LEI, Yu LEI
  • Patent number: 11780624
    Abstract: A device for binding rod bundles includes a tilting apparatus, a wire stripper, a binding apparatus, and a collection apparatus. The tilting apparatus includes a tilting platform, a hydraulic cylinder, and an articulated base. The wire stripper includes a main body, a first sliding mechanism, a second sliding mechanism, a first slide block, and a second slide block. The binding apparatus includes an electric clamp, a clamping frame, a sliding rail, a rail base, and a drive motor. The collection apparatus is hinged to the tilting apparatus; the wire stripper is disposed below the tilting apparatus; the tilting platform includes a hinge hole for receiving one end of the clamping frame. The collection apparatus includes a shaft hole for receiving one end of the tilting platform. The hydraulic cylinder is hinged to the articulated base and the other end of the tilting platform is hinged to the hydraulic cylinder.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: October 10, 2023
    Assignees: TAIYUAN UNIVERSITY OF SCIENCE AND TECHNOLOGY, HIGH-END EQUIPMENT AND RAIL TRANSIT TECHNOLOGY R & D CENTER OF HARAN TAIYUAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Lifeng Ma, Jingfeng Zou, Rongjun Wang, Ziyong Ma
  • Publication number: 20230257868
    Abstract: Embodiments described herein relate to a method of fabricating a perovskite film device. The method includes heating and degassing a substrate within a processing system; depositing a first perovskite film layer over a surface of the substrate using multi-cathode sputtering deposition within a processing chamber; depositing a second perovskite film layer over the first perovskite film layer using multi-cathode sputtering deposition within a processing chamber; and annealing the substrate with the first perovskite film layer and second perovskite film layer disposed thereon. The first perovskite film layer includes a first perovskite material. The second perovskite film layer includes a second perovskite material.
    Type: Application
    Filed: February 14, 2023
    Publication date: August 17, 2023
    Inventors: Zihao YANG, Mingwei ZHU, Bharatwaj RAMAKRISHNAN, Rongjun WANG, Robert Jan VISSER, Patibandla NAG
  • Publication number: 20230187204
    Abstract: Provided are methods for pre-cleaning a substrate. A substrate having tungsten oxide (WOx) thereon is soaked in tungsten fluoride (WF6), which reduces the tungsten oxide (WOx) to tungsten (W). Subsequently, the substrate is treated with hydrogen, e.g., plasma treatment or thermal treatment, to reduce the amount of fluorine present so that fluorine does not invade the underlying insulating layer.
    Type: Application
    Filed: June 20, 2022
    Publication date: June 15, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Xiaodong Wang, Kevin Kashefi, Rongjun Wang, Shi You, Keith T. Wong, Yuchen Liu, Ya-Hsi Hwang, Jean Lu
  • Patent number: 11637107
    Abstract: Bit line stacks and methods of forming bit line stacks are described herein. A bit line stack comprises: a polysilicon layer; an adhesion layer on the polysilicon layer; a barrier metal layer on the adhesion layer; an interface layer on the barrier metal layer; a resistance reducing layer on the interface layer; and a conductive layer on the resistance reducing layer. A bit line stack having the resistance reducing layer has a resistance at least 5% lower than a comparable bit line stack without the resistance reducing layer. The resistance reducing layer may include silicon oxide or silicon nitride. The resistance reducing layer may be formed using one or more of a physical vapor deposition (PVD), a radio frequency-PVD, a pulsed-PVD, chemical vapor deposition (CVD), atomic layer deposition (ALD) or sputtering process.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: April 25, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Tom Ho Wing Yu, Nobuyuki Sasaki, Jianxin Lei, Wenting Hou, Rongjun Wang, Tza-Jing Gung