Abstract: Methods for reducing resistivity of metal gapfill include depositing a conformal layer in an opening of a feature and on a field of a substrate with a first thickness of the conformal layer of approximately 10 microns or less, depositing a non-conformal metal layer directly on the conformal layer at a bottom of the opening and directly on the field using an anisotropic deposition process. A second thickness of the non-conformal metal layer on the field and on the bottom of the feature is approximately 30 microns or greater. And depositing a metal gapfill material in the opening of the feature and on the field where the metal gapfill material completely fills the opening without any voids.

Abstract: Embodiments of the disclosure relate to methods for selectively removing metal material from the top surface and sidewalls of a feature. The metal material which is covered by a flowable polymer material remains unaffected. In some embodiments, the metal material is formed by physical vapor deposition resulting in a relatively thin sidewall thickness. Any metal material remaining on the sidewall after removal of the metal material from the top surface may be etched by an additional etch process. The resulting metal layer at the bottom of the feature facilitates selective metal gapfill of the feature.

Abstract: A method of selective metal removal via gradient oxidation for a gap-fill includes performing process cycles, each process cycle including placing a wafer having a semiconductor structure thereon into a first processing station, the semiconductor structure including a dielectric layer patterned with a feature formed therein and a seed layer formed on sidewalls and a bottom surface of the feature and a top surface of the dielectric layer, performing a reduction process on the wafer in the first processing station, performing a gradient oxidation process on the wafer in the second processing station, performing a gradient etch process on the wafer in the third processing station, and performing the gradient etch process on the wafer in the fourth processing station, wherein the first, second, third, and fourth processing stations are located in an interior volume of a processing chamber.

Abstract: Embodiments of the disclosure relate to methods of selectively depositing a metallic material after forming a flowable polymer film to protect a substrate surface within a feature. A first metal liner is deposited by physical vapor deposition (PVD). The flowable polymer film is formed on the first metal liner on the bottom. A portion of the first metal liner is selectively removed from the top surface and the at least one sidewall. The flowable polymer film is removed. In some embodiments, the cycle of depositing a metal liner, forming a flowable polymer film, removing a portion of the metal liner, and removing the flowable polymer film is repeated at least once. A metal layer is deposited on the plurality of metal liners (e.g., first metal liner and the second metal liner) and the metal layer is free of seams or voids.

Abstract: A method of pre-cleaning in a semiconductor structure includes performing a plasma pre-treatment process to remove impurities from a surface of a semiconductor structure comprising a metal layer and a dielectric layer, performing a selective etch process to remove molybdenum oxide from a surface of the metal layer, the selective etch process comprising soaking the semiconductor structure in a precursor including molybdenum chloride (MoCl5, MoCl6) at a temperature of between 250° C. and 350° C., and performing a post-treatment process to remove chlorine residues and by-products of the selective etch process on the surface of the semiconductor structure.

Abstract: A method of metal gapfill including depositing a metal layer on a dielectric layer present on a field and/or in an opening of a feature via plasma enhanced atomic layer deposition utilizing a metal halide precursor and a plasma comprising hydrogen and a noble gas; and depositing a metal gapfill material on the field and in the opening directly over the metal layer, wherein the metal gapfill material completely fills the opening.

Abstract: Embodiments of the disclosure include an apparatus and method of forming a semiconductor structure that includes metal contacts with a low resistance. In some embodiments, the semiconductor device generally includes an interconnect. The interconnect generally includes a dielectric layer with a tungsten (W) plug formed therein, a feature formed in the dielectric layer and over the W plug, a liner layer formed on an exposed surface of the W plug and on sidewalls of the feature, an interruption layer formed on the liner layer, and a conductive material substantially filling the feature. The liner layer includes molybdenum (Mo) or W, and the interruption layer includes Mo.

Abstract: A method of filling a feature in a semiconductor structure with metal includes depositing a metal cap layer on a bottom surface of a feature formed within a dielectric layer and top surfaces of the dielectric layer, partially filling the feature from the bottom surface with a flowable polymer layer, performing a metal pullback process to remove the metal cap layer on the top surfaces of the dielectric layer selectively to the dielectric layer, wherein the metal pullback process includes a first etch process including a chemical etch process using molybdenum hexafluoride (MoF6) to remove the metal cap layer selectively to the dielectric layer, and a second etch process to remove residues on etched surfaces of the dielectric layer, removing the flowable polymer layer, pre-cleaning a surface of the metal cap layer, and filling the feature from the surface of the metal cap layer with metal fill material.

Abstract: Embodiments of the present disclosure generally relate to a method for forming an electrically conductive feature on a substrate. In one embodiment, the method includes forming a first conductive layer via physical vapor deposition (PVD) in an opening of a substrate. The first conductive layer has a thickness of less than 20 angstroms. The method further includes forming a second conductive layer via PVD on the first conductive layer. The first conductive layer and the second conductive layer are formed at a temperature of less than 50° C. The method further includes annealing at least a portion of the first conductive layer and the second conductive layer.

Abstract: Semiconductor devices and methods for molybdenum fill in semiconductor devices are provided. In one aspect, a method for processing a semiconductor device substrate is provided. The method includes exposing at least one feature formed in a dielectric layer to a grain modification layer deposition process to deposit a grain modification layer over at least a portion of the at least one feature. The at least one feature is defined by sidewall surfaces formed in the dielectric layer and a bottom surface extending between the sidewall surfaces. The method further includes exposing the at least one feature to a molybdenum deposition process to form a molybdenum-fill layer on the grain modification layer, wherein the grain modification layer comprises a metal different from molybdenum.

Abstract: Magnet assemblies comprising a housing with a top plate each comprising aligned openings are described. The housing has a bottom ring and an annular wall with a plurality of openings formed in the bottom ring. The top plate is on the housing and has a plurality of openings aligned with the plurality of openings in the bottom ring of the housing. The magnet assembly may also include a non-conducting base plate and/or a conductive cover plate. Methods for using the magnet assembly and magnetic field tuning are also described.

Abstract: Methods and apparatus for processing substrates are disclosed. In some embodiments, a process chamber for processing a substrate includes: a body having an interior volume and a target to be sputtered, the interior volume including a central portion and a peripheral portion; a substrate support disposed in the interior volume opposite the target and having a support surface configured to support the substrate; a collimator disposed in the interior volume between the target and the substrate support; a first magnet disposed about the body proximate the collimator; a second magnet disposed about the body above the support surface and entirely below the collimator and spaced vertically below the first magnet; and a third magnet disposed about the body and spaced vertically between the first magnet and the second magnet. The first, second, and third magnets are configured to generate respective magnetic fields to redistribute ions over the substrate.

Abstract: A method of forming a semiconductor device structure by utilizing a hydrogen plasma treatment to promote selective deposition is disclosed. In some embodiments, the method includes forming a metal layer within at least one feature on the semiconductor device structure. The method includes exposing the metal layer to a hydrogen plasma treatment. The hydrogen plasma treatment preferentially treats the top field and sidewalls while leaving the bottom surface substantially untreated to encourage bottom up metal film growth. In some embodiments, the hydrogen plasma treatment comprises substantially only hydrogen ions.

Abstract: A method of filling a via having a necking point includes performing a pre-clean process to remove residues from an exposed surface of a metal layer at a bottom of a via and recover inner surfaces of the via, wherein the via is formed within a dielectric layer and has a necking point protruding within the via, performing a selective deposition process to partially fill the via with metal fill material from the exposed surface of the metal layer below the necking point, performing a liner deposition process to form a liner layer on exposed inner surfaces of the via, and performing a metal fill process to fill the via with the metal fill material.

Abstract: Embodiments of the disclosure relate to methods for metal gapfill of a logic device with lower resistivity. Specific embodiments provide integrated separate tungsten PVD processes with plasma-etch to solve the overhang issue caused by tungsten PVD and the high resistivity caused by nucleation.

Abstract: Provided in one or more embodiments of the present description are a content sharing method and apparatus. The method may comprise: a server receiving a content sharing request initiated by a sharing party user, wherein the content sharing request is used for sharing content to be shared, submitted by the sharing party user, in an organization where the sharing party user is located; and the server releasing the content to be shared to the organization, so that the content to be shared is presented on a content sharing interface related to the organization.

Abstract: Embodiments of the disclosure relate to methods for metal gapfill with lower resistivity. Specific embodiments provide methods of forming a tungsten gapfill without a high resistance nucleation layer. Some embodiments of the disclosure utilize a nucleation underlayer to promote growth of the metal gapfill.

Abstract: A method of gap fill may include depositing a sacrificial Si layer in an opening of a feature and on a field of a substrate. In addition, the method may include depositing a metal layer in the opening and on the field, where at least a portion of the sacrificial Si layer is replaced with the metal layer. The method may also include depositing a metal gapfill material in the opening and on the field directly over the metal layer, where the metal gapfill material completely fills the opening.

Abstract: Embodiments of the disclosure are directed to methods of removing metal oxide from a substrate surface by exposing the substrate surface to an un-biased cleaning plasma comprising a mixture of hydrogen (H2) and oxygen (O2). In some embodiments, the substrate surface has at least one feature thereon, the at least one feature defining a trench having a top surface, a bottom surface, and two opposed sidewalls. The un-biased cleaning plasma comprises in a range of from 1% to 20% oxygen (O2) on a molecular basis and greater than or equal to 80% hydrogen (H2). The un-biased cleaning plasma removes substantially all of the metal oxide—such as molybdenum oxide (MoOx), ruthenium oxide (RuOx), or tungsten oxide (WOx)—from the substrate surface, and the top surface, the bottom surface, and the two opposed sidewalls of the trench without damaging the dielectric and/or critical dimension (CD)/profile of the structure.

Abstract: Methods for reducing contact resistance include performing a selective titanium silicide (TiSi) deposition process on a middle of the line (MOL) contact structure that includes a cavity in a substrate of dielectric material. The contact structure also includes a silicon-based connection portion at a bottom of the cavity. The selective TiSi deposition process is selective to silicon-based material over dielectric material. The methods also include performing a selective deposition process of a metal material on the MOL contact structure. The selective deposition process is selective to TiSi material over dielectric material and forms a silicide capping layer on the silicon-based connection portion. The methods further include performing a seed layer deposition process of the metal material on the contact structure.