Abstract: A method of filling a feature in a semiconductor structure with metal includes depositing a metal cap layer on a bottom surface of a feature formed within a dielectric layer and top surfaces of the dielectric layer, partially filling the feature from the bottom surface with a flowable polymer layer, performing a metal pullback process to remove the metal cap layer on the top surfaces of the dielectric layer selectively to the dielectric layer, wherein the metal pullback process includes a first etch process including a chemical etch process using molybdenum hexafluoride (MoF6) to remove the metal cap layer selectively to the dielectric layer, and a second etch process to remove residues on etched surfaces of the dielectric layer, removing the flowable polymer layer, pre-cleaning a surface of the metal cap layer, and filling the feature from the surface of the metal cap layer with metal fill material.

Abstract: The present disclosure provides metal gap fill deposition methods on a semiconductor substrate. The methods include forming a liner layer on a surface of a feature by providing a first dosage and a second dosage of a first metal-containing precursor to a processing chamber. The feature includes a feature formed in a surface of the semiconductor substrate. The feature includes an opening that is defined by a capping layer and side walls. The side walls include a dielectric material. The liner layer is formed over the side walls and the capping layer. A metal gap fill material is deposited over the liner layer to fill the feature formed in the surface of the semiconductor substrate by providing a second metal-containing precursor and a hydrogen-containing precursor to the processing chamber.

Abstract: Methods for reducing contact resistance include performing a selective titanium silicide (TiSi) deposition process on a middle of the line (MOL) contact structure that includes a cavity in a substrate of dielectric material. The contact structure also includes a silicon-based connection portion at a bottom of the cavity. The selective TiSi deposition process is selective to silicon-based material over dielectric material. The methods also include performing a selective deposition process of a metal material on the MOL contact structure. The selective deposition process is selective to TiSi material over dielectric material and forms a silicide capping layer on the silicon-based connection portion. The methods further include performing a seed layer deposition process of the metal material on the contact structure.

Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed in a first process chamber to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process is performed in the first process chamber removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.

Abstract: A method includes forming a metal fill material on at least one electrical connection formed in a feature formed within a dielectric layer of a semiconductor device structure. The metal fill material partially fills the feature, the partially filled feature comprises the metal fill material and an exposed first portion of a sidewall of the feature that comprises the material of the dielectric layer, and a gap region formed between a second portion of the sidewall and a sidewall of the metal fill material, and performing a soaking process on the semiconductor device structure to form a passivation layer over a surface of the metal fill material and including a portion of the metal fill material disposed within the gap.

Abstract: Methods used in electronic device manufacturing and, more particularly, to methods used for forming metal containing interconnect features in a semiconductor device. In one aspect, a method of forming a boron nitride layer on a metal surface is provided. The method includes exposing a surface of a metal layer to a nitrogen-containing plasma to form a metal nitride layer on the surface. The method further includes performing a chemical vapor deposition (CVD) soak process in which the metal nitride layer is exposed to a boron (B)-containing precursor gas, form a boron nitride monolayer.

Abstract: Embodiments of the disclosure relate to methods for metal gapfill of a logic device with lower resistivity. Specific embodiments provide integrated separate tungsten PVD processes with plasma-etch to solve the overhang issue caused by tungsten PVD and the high resistivity caused by nucleation.

Abstract: Molybdenum deposition methods including depositing molybdenum on one or more wafers in a dry cleaned and conditioned processing chamber to a predetermined total deposition thickness, an amount of particle adders on the one or more wafers increasing with deposition thickness from a first amount to a second amount; and exposing the processing chamber to a plasma treatment to reduce an amount of particle adders formed on subsequent wafers to a third amount below the second amount, the plasma treatment extending a time period between a dry cleaning and re-conditioning of the processing chamber.

Abstract: A metal deposition method including exposing a substrate surface having at least one feature thereon to one or more deposition cycle, each deposition cycle including a metal precursor exposure portion and a reducing agent exposure portion, the metal precursor exposure portion including a flow of a metal precursor and a pulsed low-power RF plasma having a pulsed RF power of 100 W or less, the reducing agent exposure portion including a flow of a reducing agent and a high-power plasma having an RF power of 300 W or higher.

Abstract: A method of filling a via having a necking point includes executing one or more cycles, each cycle including performing a pre-clean process to remove metal oxides from an exposed surface of a metal layer at a bottom of the via and recover inner surfaces of the via, wherein the via is formed within a dielectric layer and has the necking point protruding within the via, performing a selective deposition process to selectively deposit metal fill material on the exposed surface of the metal layer below the necking point, and performing a selectivity recovery process to oxidize by-products from the selective deposition process, and performing a full bottom fill process to fill a remainder of the via with the metal fill material.

Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for spin-transfer-torque magnetoresistive random access memory (STT-MRAM) applications. In one example, a film stack utilized to form a magnetic tunnel junction structure on a substrate includes a pinned layer disposed on a substrate, wherein the pinned layer comprises multiple layers including at least one or more of a Co containing layer, Pt containing layer, Ta containing layer, an Ru containing layer, an optional structure decoupling layer disposed on the pinned magnetic layer, a magnetic reference layer disposed on the optional structure decoupling layer, a tunneling barrier layer disposed on the magnetic reference layer, a magnetic storage layer disposed on the tunneling barrier layer, and a capping layer disposed on the magnetic storage layer.

Abstract: Embodiments of the disclosure provide methods for forming MTJ structures from a film stack disposed on a substrate for MRAM applications and associated MTJ devices. The methods described herein include forming the film properties of material layers from the film stack to create a film stack with a sufficiently high perpendicular magnetic anisotropy (PMA). An iron containing oxide capping layer is utilized to generate the desirable PMA. By utilizing an iron containing oxide capping layer, thickness of the capping layer can be more finely controlled and reliance on boron at the interface of the magnetic storage layer and the capping layer is reduced.

Abstract: A method of pre-cleaning in a semiconductor structure includes performing a plasma pre-treatment process to remove impurities from a surface of a semiconductor structure comprising a metal layer and a dielectric layer, performing a selective etch process to remove molybdenum oxide from a surface of the metal layer, the selective etch process comprising soaking the semiconductor structure in a precursor including molybdenum chloride (MoCl5, MoCl6) at a temperature of between 250° C. and 350° C., and performing a post-treatment process to remove chlorine residues and by-products of the selective etch process on the surface of the semiconductor structure.

Abstract: A method of selective metal removal via gradient oxidation for a gap-fill includes performing process cycles, each process cycle including placing a wafer having a semiconductor structure thereon into a first processing station, the semiconductor structure including a dielectric layer patterned with a feature formed therein and a seed layer formed on sidewalls and a bottom surface of the feature and a top surface of the dielectric layer, performing a reduction process on the wafer in the first processing station, performing a gradient oxidation process on the wafer in the second processing station, performing a gradient etch process on the wafer in the third processing station, and performing the gradient etch process on the wafer in the fourth processing station, wherein the first, second, third, and fourth processing stations are located in an interior volume of a processing chamber.

Abstract: Methods and apparatus reduce defects in substrates processed in a physical vapor (PVD) chamber. In some embodiments, a method for cleaning a process kit disposed in an inner volume of a process chamber includes positioning a non-sputtering shutter disk on a substrate support of the PVD chamber; energizing an oxygen-containing cleaning gas disposed in the inner volume of the PVD chamber to create a plasma reactive with carbon-based materials; and heating the process kit having a carbon-based material adhered thereto while exposed to the plasma to remove at least a portion of the carbon-based material adhered to the process kit.

Abstract: Embodiments of the present disclosure generally relate to methods and processes for selectively depositing a metal fill layer into a feature on the surface of a semiconductor structure. In some embodiments, a method of forming a contact structure includes performing a preclean operation on a contact structure to form a precleaned contact structure. The contact structure includes a silicon-based portion exposed in a cavity of a substrate. The method further includes depositing a metal layer over the precleaned contact structure to form a deposited contact structure. The method further includes introducing a metal halide precursor to the deposited contact structure to at least partially remove the second layer from the deposited contact structure to form an etched contact structure. The method further includes depositing a metal fill layer onto the first layer to form a filled contact structure. The deposited metal fill layer comprises a super conformal profile.

Abstract: Methods for reducing resistivity of metal gapfill include depositing a conformal layer in an opening of a feature and on a field of a substrate with a first thickness of the conformal layer of approximately 10 microns or less, depositing a non-conformal metal layer directly on the conformal layer at a bottom of the opening and directly on the field using an anisotropic deposition process. A second thickness of the non-conformal metal layer on the field and on the bottom of the feature is approximately 30 microns or greater. And depositing a metal gapfill material in the opening of the feature and on the field where the metal gapfill material completely fills the opening without any voids.

Abstract: Embodiments of the disclosure relate to methods for selectively removing metal material from the top surface and sidewalls of a feature. The metal material which is covered by a flowable polymer material remains unaffected. In some embodiments, the metal material is formed by physical vapor deposition resulting in a relatively thin sidewall thickness. Any metal material remaining on the sidewall after removal of the metal material from the top surface may be etched by an additional etch process. The resulting metal layer at the bottom of the feature facilitates selective metal gapfill of the feature.

Abstract: A method of selective metal removal via gradient oxidation for a gap-fill includes performing process cycles, each process cycle including placing a wafer having a semiconductor structure thereon into a first processing station, the semiconductor structure including a dielectric layer patterned with a feature formed therein and a seed layer formed on sidewalls and a bottom surface of the feature and a top surface of the dielectric layer, performing a reduction process on the wafer in the first processing station, performing a gradient oxidation process on the wafer in the second processing station, performing a gradient etch process on the wafer in the third processing station, and performing the gradient etch process on the wafer in the fourth processing station, wherein the first, second, third, and fourth processing stations are located in an interior volume of a processing chamber.

Abstract: Embodiments of the disclosure relate to methods of selectively depositing a metallic material after forming a flowable polymer film to protect a substrate surface within a feature. A first metal liner is deposited by physical vapor deposition (PVD). The flowable polymer film is formed on the first metal liner on the bottom. A portion of the first metal liner is selectively removed from the top surface and the at least one sidewall. The flowable polymer film is removed. In some embodiments, the cycle of depositing a metal liner, forming a flowable polymer film, removing a portion of the metal liner, and removing the flowable polymer film is repeated at least once. A metal layer is deposited on the plurality of metal liners (e.g., first metal liner and the second metal liner) and the metal layer is free of seams or voids.