Patents by Inventor Ryoichi Kato
Ryoichi Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11935813Abstract: A semiconductor device includes a semiconductor module having a wiring board, semiconductor assemblies that include a multilayer substrate on which semiconductor elements are mounted, and a sealing part; a cooler; and a heat conduction sheet which is placed between the semiconductor module and the mounting surface of the cooler and which is in contact with the bottom surfaces of the multilayer substrates. The heat conduction sheet has recesses corresponding to at least parts of the outer edges of second electrically conductive plates provided on the bottoms of the multilayer substrates.Type: GrantFiled: July 1, 2021Date of Patent: March 19, 2024Assignee: FUJI ELECTRIC CO., LTD.Inventors: Ryoichi Kato, Tatsuhiko Asai, Kento Shirata
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Patent number: 11887925Abstract: A capacitor includes a case including a capacitor element, a first connection terminal, a second connection terminal, and a second insulating sheet formed between the first connection terminal and the second connection terminal, and the first connection terminal, the second insulating sheet, and the second connection terminal extend to the outside from the case. A semiconductor module includes a multi-layer terminal portion in which a first power terminal, a first insulating sheet, and a second power terminal are sequentially stacked. The first power terminal includes a first bonding area electrically connected to the first connection terminal, and the second power terminal includes a second bonding area electrically connected to the second connection terminal. The first insulating sheet includes a terrace portion that extends in a direction from the second bonding area towards the first bonding area in a planar view.Type: GrantFiled: August 8, 2022Date of Patent: January 30, 2024Assignee: FUJI ELECTRIC CO., LTD.Inventors: Ryoichi Kato, Yoshinari Ikeda, Yuma Murata
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Publication number: 20240006303Abstract: A capacitor includes a case including a capacitor element, a first connection terminal, a second connection terminal, and a second insulating sheet formed between the first connection terminal and the second connection terminal, and the first connection terminal, the second insulating sheet, and the second connection terminal extend to the outside from the case. A semiconductor module includes a multi-layer terminal portion in which a first power terminal, a first insulating sheet, and a second power terminal are sequentially stacked. The first power terminal includes a first bonding area electrically connected to the first connection terminal, and the second power terminal includes a second bonding area electrically connected to the second connection terminal. The first insulating sheet includes a terrace portion that extends in a direction from the second bonding area towards the first bonding area in a planar view.Type: ApplicationFiled: September 19, 2023Publication date: January 4, 2024Applicant: FUJI ELECTRIC CO., LTD.Inventors: Ryoichi KATO, Yoshinari IKEDA, Yuma MURATA
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Publication number: 20230378435Abstract: A lithium secondary battery comprising: a positive electrode and a negative electrode which each has a specific composition and specific properties; and a nonaqueous electrolyte which contains a cyclic siloxane compound represented by general formula (1), fluorosilane compound represented by general formula (2), compound represented by general formula (3), compound having an S—F bond in the molecule, nitric acid salt, nitrous acid salt, monofluorophosphoric acid salt, difluorophosphoric acid salt, acetic acid salt, or propionic acid salt in an amount of 10 ppm or more of the whole nonaqueous electrolyte. This lithium secondary battery has a high capacity, long life, and high output. [In general formula (1), R1 and R2 are an organic group having 1-12 carbon atoms and n is an integer of 3-10. In general formula (2), R3 to R5 are an organic group having 1-12 carbon atoms; x is an integer of 1-3; and p, q, and r each are an integer of 0-3, provided that 1?p+q+r?3.Type: ApplicationFiled: August 1, 2023Publication date: November 23, 2023Applicants: MITSUBISHI CHEMICAL CORPORATION, MU IONIC SOLUTIONS CORPORATIONInventors: Hidekazu Miyagi, Ryoichi Kato
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Publication number: 20230307400Abstract: A semiconductor module includes a laminated substrate having an insulating plate, a circuit pattern arranged on an upper surface of the insulating plate and a heat dissipating plate arranged on a lower surface of the insulating plate. The semiconductor module also includes a semiconductor device having a collector electrode arranged on its upper surface, having an emitter electrode and a gate electrode arranged on its lower surface, and bumps respectively bonding the emitter electrode and the gate electrode to an upper surface of the circuit pattern. Each of the bumps is made of a sintered metal such that the bump is formed to be constricted in its middle portion in a thickness direction orthogonal to a surface of the insulating plate.Type: ApplicationFiled: May 18, 2023Publication date: September 28, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventors: Ryoichi KATO, Yoshinari IKEDA, Tatsuo NISHIZAWA, Eiji MOCHIZUKI
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Patent number: 11769871Abstract: A lithium secondary battery comprising: a positive electrode and a negative electrode which each has a specific composition and specific properties; and a nonaqueous electrolyte which contains a cyclic siloxane compound represented by general formula (1), fluorosilane compound represented by general formula (2), compound represented by general formula (3), compound having an S—F bond in the molecule, nitric acid salt, nitrous acid salt, monofluorophosphoric acid salt, difluorophosphoric acid salt, acetic acid salt, or propionic acid salt in an amount of 10 ppm or more of the whole nonaqueous electrolyte. This lithium secondary battery has a high capacity, long life, and high output. [In general formula (1), R1 and R2 are an organic group having 1-12 carbon atoms and n is an integer of 3-10. In general formula (2), R3 to R5 are an organic group having 1-12 carbon atoms; x is an integer of 1-3; and p, q, and r each are an integer of 0-3, provided that 1?p+q+r?3.Type: GrantFiled: September 11, 2020Date of Patent: September 26, 2023Assignees: Mitsubishi Chemical Corporation, MU IONIC SOLUTIONS CORPORATIONInventors: Ryoichi Kato, Minoru Kotato
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Patent number: 11705419Abstract: A semiconductor module includes a laminated substrate having an insulating plate, a circuit pattern arranged on an upper surface of the insulating plate and a heat dissipating plate arranged on a lower surface of the insulating plate. The semiconductor module also includes a semiconductor device having a collector electrode arranged on its upper surface, having an emitter electrode and a gate electrode arranged on its lower surface, and bumps respectively bonding the emitter electrode and the gate electrode to an upper surface of the circuit pattern. Each of the bumps is made of a metal sintered material such that the bump is formed to be constricted in its middle portion in a thickness direction orthogonal to a surface of the insulating plate.Type: GrantFiled: December 31, 2020Date of Patent: July 18, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Ryoichi Kato, Yoshinari Ikeda, Tatsuo Nishizawa, Eiji Mochizuki
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Publication number: 20230187334Abstract: A semiconductor device includes: an insulating sheet including a first main surface and a second main surface; a first terminal in a shape of a plate provided to face the first main surface of the insulating sheet and including a first protruding portion protruding outward from the first main surface of the insulating sheet; and a second terminal in a shape of a plate provided to face the second main surface of the insulating sheet and including a second protruding portion protruding outward from the second main surface of the insulating sheet side by side with the first protruding portion, wherein a first recessed portion is provided at a position of the first protruding portion intersecting an end portion of the insulating sheet by concaving a side surface of the first protruding portion facing the second protruding portion in a direction away from the second protruding portion.Type: ApplicationFiled: October 27, 2022Publication date: June 15, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventors: Yuma MURATA, Katsumi TANIGUCHI, Ryoichi KATO
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Patent number: 11664342Abstract: A semiconductor device, including a capacitor, a semiconductor module having a first power terminal formed on a front surface of a first insulating member, and a connecting member electrically connecting and mechanically coupling the semiconductor module and the capacitor to each other, the connecting member having a front surface and a rear surface opposite to each other, the rear surface being on a front surface of the first power terminal. The connecting member is bonded to the semiconductor module via a first welded portion, which penetrates the front and rear surfaces of the connecting member, and penetrates the front surface of the first power terminal, in a thickness direction of the semiconductor device, a distance in the thickness direction between a bottommost portion of first welded portion and the front surface of the first insulating member being 0.3 mm or more.Type: GrantFiled: June 11, 2021Date of Patent: May 30, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Shinji Tada, Ryoichi Kato, Yoshinari Ikeda, Yuma Murata
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Publication number: 20230142607Abstract: A semiconductor module includes an insulating sheet which has a first surface and extends in a first direction and a first terminal. The first terminal has a first region disposed on the first surface of the insulating sheet and having a first width in a second direction perpendicular to the first direction, a second region extending from the first region and having a second width in the second direction narrower than the first width, and a third region located away from the first surface and being electrically connected to both the first region and the second region.Type: ApplicationFiled: September 29, 2022Publication date: May 11, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventors: Tadahiko SATO, Ryoichi KATO, Yuma MURATA
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Publication number: 20230124778Abstract: A semiconductor module (semiconductor device) includes a case that has a side wall to form a frame, the side wall having a concave portion, a multi-layer structure in which a first terminal, an insulating sheet, and a second terminal are stacked in that order and which is disposed on the concave portion, and a beam member that is attached to the concave portion of the case to fix the multi-layer structure disposed on the concave portion.Type: ApplicationFiled: September 27, 2022Publication date: April 20, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventors: Akito NAKAGOME, Katsumi TANIGUCHI, Ryoichi KATO, Yuma MURATA
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Publication number: 20230119240Abstract: A semiconductor device includes: an insulated circuit substrate; a power semiconductor element mounted on the insulated circuit substrate; a first terminal having a plate-like shape having a first main surface and electrically connected to the power semiconductor element; a second terminal having a second main surface opposed to the first main surface of the first terminal and electrically connected to the power semiconductor element; an insulating sheet interposed between the first main surface and the second main surface; and a conductive film provided on at least one of the first main surface side and the second main surface side of the insulating sheet.Type: ApplicationFiled: August 24, 2022Publication date: April 20, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventors: Katsumi TANIGUCHI, Yoshinari IKEDA, Ryoichi KATO, Yuma MURATA, Akito NAKAGOME
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Publication number: 20230120152Abstract: A semiconductor module includes a first case having a first side face, a first insulating paper disposed on the first case and having a first width in a first direction and having a notch with a second width smaller than the first width, a first terminal between the first case and the first insulating paper, having an exposed portion exposed from the first insulating paper at an area where the notch is formed, and a second terminal on the first insulating paper at a side opposite to a side where the first terminal is disposed. The first terminal and the first insulating paper have extended portions extending to an outside of the first case from the first side face so that a portion of the first insulating paper where the notch is formed and the exposed portion of the first terminal are located at the outside of the first case.Type: ApplicationFiled: August 26, 2022Publication date: April 20, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventors: Yuma MURATA, Ryoichi KATO, Shinji TADA
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Patent number: 11624562Abstract: A heat sink includes a base plate; a cover overlapping the base plate; fins, each having a plate-like shape projecting from the base plate in a direction perpendicular to the base plate, located between the base plate and the cover; one or a plurality of first fin groups composed of a plurality of the fins arranged with a gap therebetween in a first direction; and one or a plurality of second fin groups composed of a plurality of the fins arranged with a gap therebetween in the first direction, and adjacent to the first fin group with a gap therebetween in a second direction. Positions in the first direction of the fins belonging to the second fin group are displaced with respect to positions in the first direction of the fins belonging to the first fin group. Each of the fines has an S-shape.Type: GrantFiled: August 29, 2022Date of Patent: April 11, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Takumi Nakamura, Eiji Anzai, Tomoyuki Hirayama, Yutaka Hirano, Ryoichi Kato, Hiromichi Gohara, Kohei Yamauchi
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Publication number: 20230106063Abstract: A solid-state battery in which a decrease in the capacity retention rate is suppressed, and a method for producing the solid-state battery are provided. A solid-state battery comprising an anode layer, a cathode layer and a solid electrolyte layer, wherein the anode layer contains an interface forming agent, and the interface forming agent contains at least one kind of elements selected from metal elements and semi-metal elements, which can become cations which conduct the solid electrolyte contained in the solid electrolyte layer, which are not involved in an electrode reaction, which have lower ionic conductivity than ions involved in the electrode reaction, and which have ionic radii of 1.34 Å or less, and wherein the solid electrolyte layer has dendritic structure in at least one of an interface with the cathode layer and an interface with the anode layer.Type: ApplicationFiled: September 20, 2022Publication date: April 6, 2023Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventor: Ryoichi KATO
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Publication number: 20230087470Abstract: According to one embodiment, a memory system includes a non-volatile memory having a plurality of blocks and a controller to execute a garbage collection process of moving valid data from first blocks in the plurality of blocks to second blocks in the plurality of blocks. After the garbage collection process, one or more free blocks are generated since the number of second blocks is fewer than the number of the first blocks. The controller selects the first blocks for the garbage collection process based on a reduction frequency of valid data in the blocks in the plurality of blocks.Type: ApplicationFiled: February 24, 2022Publication date: March 23, 2023Inventor: Ryoichi KATO
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Patent number: 11593007Abstract: A memory controller specifies, from a nonvolatile memory, a final page candidate, which is a candidate to be the physical page to which data is last written in a logical block. The memory controller executes an upward check process to determine whether the number of programmed physical pages is among a first range number of physical pages in a reverse order from the final page candidate is equal to or greater than a first reference value. The memory controller executes a downward check process determining whether the number of programmed physical pages is among a second range number of physical pages existing in the downward order from the final page candidate is equal to or less than a second reference value, and specifies the physical page to which data is last written in the logical block from results of the upward check process and the downward check process.Type: GrantFiled: April 2, 2019Date of Patent: February 28, 2023Assignee: KIOXIA CORPORATIONInventors: Ryoichi Kato, Hiroyuki Yamaguchi
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Publication number: 20230005801Abstract: There are provided a semiconductor module capable of preventing the peeling of a sealing resin on the side where a connection section used for the connection to a semiconductor element is arranged and a manufacturing method for a semiconductor module. A semiconductor module includes: an outer frame; sealing resins; gate signal output terminals, and partition sections laid across the outer flame to partition a space into a plurality of housing sections, in the partition sections which the gate signal output terminals with connection sections exposed are arranged. The partition sections have through holes where sealing resins are formed, the sealing resins connecting adjacent housing sections and the sealing resin formed in the through hole being continuous with the sealing resins formed in the housing sections.Type: ApplicationFiled: May 25, 2022Publication date: January 5, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventor: Ryoichi KATO
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Patent number: 11545409Abstract: A semiconductor module includes a laminated substrate having an insulating plate, a circuit pattern on an upper surface of the insulating plate and a heat dissipating plate on a lower surface of the insulating plate. The module further includes a semiconductor device having upper and lower surfaces, and including a collector electrode on the device upper surface, an emitter electrode and a gate electrode on the device lower surface, and the emitter electrode and the gate electrode each being bonded to an upper surface of the circuit pattern via a bump, and a block electrode bonded to the collector electrode. The block electrode includes a flat plate portion covering over the semiconductor device, and a pair of projecting portions projecting toward the circuit pattern from both ends of the flat plate portion in a thickness direction orthogonal to a surface of the insulating plate, and being bonded to the circuit pattern.Type: GrantFiled: January 5, 2021Date of Patent: January 3, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Ryoichi Kato, Yoshinari Ikeda, Tatsuo Nishizawa, Motohito Hori, Eiji Mochizuki
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Publication number: 20220415749Abstract: A semiconductor device includes a baseplate and a case which includes an external wall surrounding an internal space and a dividing wall extending in a first direction and separating the space into compartments. The dividing wall has a lower end fixed to the principal surface and includes, on a sidewall, a terrace positioned further away from the principal surface than the lower end and hanging out toward the space compared to the lower end in a second direction parallel to the principal surface and perpendicular to the first direction. A terminal's bonding part, to which a wire is bonded, is disposed on the terrace. A ratio of the wire's diameter to the bonding part's width in the first direction is set to ?0.15, which prevents a situation where bonding power is not sufficiently applied to the bonding part during ultrasonic bonding of the wire, thus increasing the bonding strength.Type: ApplicationFiled: May 26, 2022Publication date: December 29, 2022Applicant: FUJI ELECTRIC CO., LTD.Inventors: Naoyuki KANAI, Shun OKADA, Ryoichi KATO