Abstract: Provided is a cooler having high cooling efficiency and low pressure loss of fluid. A cooler includes: a flow-channel part at least including a plate-like fin (top plate) and a plate-like fin (bottom plate); and a continuous groove-like flow channel defined between the top plate and the bottom plate to flow fluid, the cooler being configured to cool semiconductor elements. When the flow-channel part is viewed from the direction parallel to the top plate and intersecting the flow channel, the flow channel has a corrugated shape so that a face of the flow channel closer to the top plate and a face of the flow channel closer to the bottom plate bend in a synchronized manner toward the top plate and the bottom plate.

Abstract: A cooler of the present invention is provided with a case having a top plate, a bottom plate, and a side plate, cooling fins disposed inside the case, and a flow path for cooling fluid that comes into contact with the cooling fins and that flows through the interior of the case, the cooler cooling an object to be cooled in contact with the top plate or the bottom plate. The cooling fins have a shaft part and vane parts that protrude outward from the shaft part and extend spirally in the axial direction; the overall cooling fin configuration constituting a quadrangular column shape. The cooling fins are disposed in contact with at least the top plate and the bottom plate, and the flow path has a spiral-formed configuration formed by the vane parts, the top plate, and the bottom plate.

Abstract: According to one embodiment, a memory system includes a volatile memory, a nonvolatile memory and a controller circuit. The controller circuit configured to control the volatile memory and the nonvolatile memory and to perform a write process and a non-volatilization process. The controller circuit is further configured to, during the write process, store write data in the volatile memory, and during the non-volatilization process, upon determining that data size stored in the write buffer being less than unit of writing of the nonvolatile memory, suspend completion of the non-volatilization process and not return a notification of completion of the non-volatilization process.

Abstract: Semiconductor equipment includes semiconductor modules sealed with a resin, each having first and second connection terminals exposed from the resin, a capacitor including third and fourth connection terminals, a cooler directly contacting the semiconductor modules and the capacitor, a busbar including a first busbar connecting the first connection terminal to the third connection terminal, a second busbar connecting the second connection terminal to the fourth connection terminal, and a first insulating layer sandwiched by the first and second busbars, main surfaces of the first and second busbars being parallel to each other, a control circuit board configured to control the semiconductor modules, and a heat transfer component including a main body connected to the cooler, and a second insulating layer arranged on the main body, the main body being in contact with the busbar and the control circuit via the second insulating layer.

Abstract: A memory controller specifies, from a nonvolatile memory, a final page candidate, which is a candidate to be the physical page to which data is last written in a logical block. The memory controller executes an upward check process to determine whether the number of programmed physical pages is among a first range number of physical pages in a reverse order from the final page candidate is equal to or greater than a first reference value. The memory controller executes a downward check process determining whether the number of programmed physical pages is among a second range number of physical pages existing in the downward order from the final page candidate is equal to or less than a second reference value, and specifies the physical page to which data is last written in the logical block from results of the upward check process and the downward check process.

Abstract: Provided is a lithium secondary battery having a nonaqueous electrolyte which contains at least one compound selected from the group consisting of monofluorophosphoric acid salts, and difluorophosphoric acid salts, in an amount of 10 ppm or more of the whole nonaqueous electrolyte, and a negative electrode selected from [1], [2], [3] and [6]: [1]: a negative electrode containing two or more carbonaceous substances differing in crystallinity; [2]: a negative electrode containing an amorphous carbonaceous substance which, when examined by wide-angle X-ray diffractometry, has an interplanar spacing (d002) for the (002) planes of 0.337 nm or larger and a crystallite size (Lc) of 80 nm or smaller and which, in an examination by argon ion laser Raman spectroscopy, has a Raman. R value of 0.

Abstract: A semiconductor device includes: an upper-surface electrode on an upper surface of a semiconductor element; a plated layer on an upper surface of the upper-surface electrode; gate runners penetrating the plated layer and formed to extend above the upper surface of the semiconductor element; and a metal connecting plate arranged above the plated layer and electrically connected to the upper-surface electrode, wherein the metal connecting plate has a joint portion parallel to the upper surface of the semiconductor element and has a rising portion at an end of the joint portion, the rising portion extending in a direction away from the semiconductor element, and in a plane parallel to the upper surface of the semiconductor element, a first distance, which is a shortest distance between the rising portion and the gate runner not intersecting the rising portion, is equal to or longer than 1 mm.

Abstract: A semiconductor device includes a plurality of semiconductor elements; insulating circuit boards each including an insulating substrate, a circuit portion on a front surface of the insulating substrate connected to one semiconductor element, and a metal portion on a rear surface of the insulating substrate; a metal plate joined to the metal portions of the plurality of insulating circuit boards; and a joint member joining the plurality of insulating circuit boards to the metal plate. The metal plate has a front surface in which the insulating circuit boards are arranged apart from each other, and a rear surface including first regions corresponding to positions of the metal portions and second regions other than the first regions. At least a part of a surface of each of the first regions has a surface work-hardened layer, and the second regions have a hardness different from that of the surface work-hardened layer.

Abstract: A semiconductor module includes a semiconductor element having one and the other surface, a lead terminal connected electrically and thermally to the semiconductor element, a first solder which bonds the lead terminal and the one surface of the semiconductor element together, a circuit layer over which the semiconductor element is disposed and a second solder which bonds the other surface of the semiconductor element and the circuit layer together. The inequality (A/B)<1 holds, where A and B are the tensile strength of the first and second solder, respectively. As a result, even if the lead terminal which thermally expands because of heat generated by the semiconductor element expands or contracts toward the semiconductor element, a stress applied by the lead terminal is absorbed and relaxed by the first solder. This prevents damage to the surface electrode of the semiconductor element by suppressing the occurrence of cracks.

Abstract: A semiconductor device including a semiconductor element, an upper-surface electrode provided on an upper surface of the semiconductor element, a plated layer provided on an upper surface of the upper-surface electrode, one or more gate runners penetrating the plated layer and provided to extend in a predetermined direction on the upper surface of the semiconductor element, and a metal connecting plate that is arranged above the plated layer and is electrically connected to the upper-surface electrode, wherein the metal connecting plate has a joint portion parallel to the upper surface of the semiconductor element and has a rising portion that is connected to a first end of the joint portion and extends in a direction away from the upper surface of the semiconductor element, and in a plane parallel to the upper surface of the semiconductor element, the rising portion and the gate runner do not overlap with each other.

Abstract: A semiconductor device encompasses a cooler made of ceramics, having a first main face and a second main face, being parallel and opposite to the first main face, defined by two opposite side faces perpendicular to the first and second main faces, a plurality of conductive-pattern layers delineated on the first main face, a semiconductor chip mounted on the first main face via one of the plurality of conductive-pattern layers, and a seal member configured to seal the semiconductor chip.

Abstract: According to one embodiment, the memory system includes a nonvolatile memory including a plurality of blocks, and a controller circuit that controls execution of a data writing process and a garbage collection process. Each of the blocks is an unit of erasure. The data writing process includes a process of writing user data into the nonvolatile memory in accordance with a request from an external member. The garbage collection process includes a process of moving valid data in at least a first block into a second block among the blocks and invalidating the valid data in the first block to be erasable. Upon receiving a data write request from the external member, the controller circuit controls a length of a waiting time to be provided before or after the data writing process within a period from receiving the write request to returning a response to the external member.

Abstract: A semiconductor device including a semiconductor element, an upper-surface electrode provided on an upper surface of the semiconductor element, a plated layer provided on an upper surface of the upper-surface electrode, one or more gate runners penetrating the plated layer and provided to extend in a predetermined direction on the upper surface of the semiconductor element, and a metal connecting plate that is arranged above the plated layer and is electrically connected to the upper-surface electrode, wherein the metal connecting plate has a joint portion parallel to the upper surface of the semiconductor element and has a rising portion that is connected to a first end of the joint portion and extends in a direction away from the upper surface of the semiconductor element, and in a plane parallel to the upper surface of the semiconductor element, the rising portion and the gate runner do not overlap with each other.

Abstract: A semiconductor device includes: an upper-surface electrode on an upper surface of a semiconductor element; a plated layer on an upper surface of the upper-surface electrode; gate runners penetrating the plated layer and formed to extend above the upper surface of the semiconductor element; and a metal connecting plate arranged above the plated layer and electrically connected to the upper-surface electrode, wherein the metal connecting plate has a joint portion parallel to the upper surface of the semiconductor element and has a rising portion at an end of the joint portion, the rising portion extending in a direction away from the semiconductor element, and in a plane parallel to the upper surface of the semiconductor element, a first distance, which is a shortest distance between the rising portion and the gate runner not intersecting the rising portion, is equal to or longer than 1 mm.

Abstract: A semiconductor module including an insulated circuit substrate having a substrate, a circuit layer on a front surface of the substrate, and a metal layer on a back surface of the substrate; a semiconductor element electrically connected to the circuit layer; a cooling unit having a ceiling board bonded to the metal layer, a bottom board opposite the ceiling board, a side wall connecting a periphery of the ceiling board and a periphery of the bottom board, and a fin connecting the ceiling board and bottom board, where thickness of the ceiling board is at least 0.5 mm and at most 2.0 mm and total thickness of the ceiling board and bottom board is at least 3 mm and at most 6 mm; and a solder layer that bonds together the metal layer and the ceiling board by melting at a temperature of at least 200° C. and at most 350° C.

Abstract: A nonaqueous electrolyte containing a monofluorophosphate and/or a difluorophosphate and a compound having a specific chemical structure or specific properties. The nonaqueous electrolyte can contain at least one of a saturated chain hydrocarbon, a saturated cyclic hydrocarbon, an aromatic compound having a halogen atom and an ether having a fluorine atom.

Abstract: A nonaqueous electrolyte containing a monofluorophosphate and/or a difluorophosphate and a compound having a specific chemical structure or specific properties. The nonaqueous electrolyte can contain at least one of a saturated chain hydrocarbon, a saturated cyclic hydrocarbon, an aromatic compound having a halogen atom and an ether having a fluorine atom.

Abstract: A difluorophosphate effective as an additive for a nonaqueous electrolyte for secondary battery is produced by a simple method from inexpensive common materials. The difluorophosphate is produced by reacting lithium hexafluorophosphate with a carbonate in a nonaqueous solvent. The liquid reaction mixture resulting from this reaction is supplied for providing the difluorophosphate in a nonaqueous electrolyte comprising a nonaqueous solvent which contains at least a hexafluorophosphate as an electrolyte lithium salt and further contains a difluorophosphate. Also provided is a nonaqueous-electrolyte secondary battery employing this nonaqueous electrolyte.

Abstract: Provided is a lithium secondary battery having a nonaqueous electrolyte which contains at least one compound selected from the group consisting of monofluorophosphoric acid salts; and difluorophosphoric acid salts, in an amount of 10 ppm or more of the whole nonaqueous electrolyte, and a negative electrode selected from [1], [2], [3] and [6]: [1]: a negative electrode containing two or more carbonaceous substances differing in crystallinity; [2]: a negative electrode containing an amorphous carbonaceous substance which, when examined by wide-angle X-ray diffractometry, has an interplanar spacing (d002) for the (002) planes of 0.337 nm or larger and a crystallite size (Lc) of 80 nm or smaller and which, in an examination by argon ion laser Raman spectroscopy, has a Raman. R value of 0.

Abstract: A semiconductor module including an insulated circuit substrate having a substrate, a circuit layer on a front surface of the substrate, and a metal layer on a back surface of the substrate; a semiconductor element electrically connected to the circuit layer; a cooling unit having a ceiling board bonded to the metal layer, a bottom board opposite the ceiling board, a side wall connecting a periphery of the ceiling board and a periphery of the bottom board, and a fin connecting the ceiling board and bottom board, where thickness of the ceiling board is at least 0.5 mm and at most 2.0 mm and total thickness of the ceiling board and bottom board is at least 3 mm and at most 6 mm; and a solder layer that bonds together the metal layer and the ceiling board by melting at a temperature of at least 200° C. and at most 350° C.