Patents by Inventor Ryoichi Kato

Ryoichi Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220022340
    Abstract: A semiconductor module has a heat conduction section provided between a multilayer substrate, on which semiconductor chips are mounted, and a cooler. The heat conduction section includes a frame and an opening, and the opening has a grease portion which is provided partly in the opening and is in contact with the multilayer substrate and the cooler, and a space portion which is provided between the grease portion and the frame in a partial and band-shaped manner.
    Type: Application
    Filed: July 1, 2021
    Publication date: January 20, 2022
    Inventor: Ryoichi KATO
  • Publication number: 20220005745
    Abstract: A semiconductor device includes a semiconductor module having a wiring board, semiconductor assemblies that include a multilayer substrate on which semiconductor elements are mounted, and a sealing part; a cooler; and a heat conduction sheet which is placed between the semiconductor module and the mounting surface of the cooler and which is in contact with the bottom surfaces of the multilayer substrates. The heat conduction sheet has recesses corresponding to at least parts of the outer edges of second electrically conductive plates provided on the bottoms of the multilayer substrates.
    Type: Application
    Filed: July 1, 2021
    Publication date: January 6, 2022
    Inventors: Ryoichi KATO, Tatsuhiko ASAI, Kento SHIRATA
  • Publication number: 20210407955
    Abstract: A semiconductor device, including a capacitor, a semiconductor module having a first power terminal formed on a front surface of a first insulating member, and a connecting member electrically connecting and mechanically coupling the semiconductor module and the capacitor to each other, the connecting member having a front surface and a rear surface opposite to each other, the rear surface being on a front surface of the first power terminal. The connecting member is bonded to the semiconductor module via a first welded portion, which penetrates the front and rear surfaces of the connecting member, and penetrates the front surface of the first power terminal, in a thickness direction of the semiconductor device, a distance in the thickness direction between a bottommost portion of first welded portion and the front surface of the first insulating member being 0.3 mm or more.
    Type: Application
    Filed: June 11, 2021
    Publication date: December 30, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Shinji TADA, Ryoichi KATO, Yoshinari IKEDA, Yuma MURATA
  • Patent number: 11201121
    Abstract: A semiconductor device encompasses a cooler made of ceramics, having a first main face and a second main face, being parallel and opposite to the first main face, defined by two opposite side faces perpendicular to the first and second main faces, a plurality of conductive-pattern layers delineated on the first main face, a semiconductor chip mounted on the first main face via one of the plurality of conductive-pattern layers, and a seal member configured to seal the semiconductor chip.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: December 14, 2021
    Assignee: FUJI ELECTRIC CO., LTD
    Inventors: Kohei Yamauchi, Hiromichi Gohara, Ryoichi Kato, Yoshinari Ikeda, Katsumi Taniguchi
  • Publication number: 20210284094
    Abstract: An attachment structure, for a side airbag device including an airbag that is to be deployed and inflated on a side of an occupant seated on a seat in a vehicle interior under pressure of a gas supplied from an inflator, includes an attachment member via which the airbag is attached inside the seat. The attachment member includes a support portion that supports the airbag before the airbag is deployed and inflated, an attachment portion that is attached inside the seat, and a guide portion that guides the airbag to a seat outer side at a time when the airbag is deployed and inflated. The guide portion is provided so as to correspond to a part of the airbag supported by the support portion.
    Type: Application
    Filed: February 23, 2021
    Publication date: September 16, 2021
    Inventors: Nobuya NAKANO, Ryoichi KATO, Koji SHIBAYAMA, Shinji YAMADA, Tomohisa HOUDATSU
  • Publication number: 20210280550
    Abstract: A semiconductor module includes first to fourth semiconductor elements, each having an upper-surface electrode and a lower-surface electrode, first to fourth conductive layers, each extending in a first direction and being independently disposed side by side in a second direction orthogonal to the first direction, and an output terminal connected to the second and third conductive layers. The lower-surface electrodes of each of the first to fourth semiconductor elements are respectively conductively connected to the first to fourth conductive layers. The third conductive layer and the fourth conductive layer are disposed between the first conductive layer and the second conductive layer and are connected to the output terminal to have an equal potential.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 9, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Ryoichi KATO, Yuma MURATA, Naoyuki KANAI, Akito NAKAGOME, Yoshinari IKEDA
  • Publication number: 20210280549
    Abstract: A semiconductor module includes a first semiconductor element and a second semiconductor element each having an upper-surface electrode and a lower-surface electrode, and being connected in parallel to configure an upper arm, a first conductive layer having a U-shape in planar view, having two end portions, and having an upper surface on which the first semiconductor element and the second semiconductor element are disposed in a mirror image arrangement, a positive electrode terminal having a body part and at least two positive electrode ends branched from the body part, and a negative electrode terminal having a negative electrode end disposed between the positive electrode ends. The positive electrode ends are respectively connected to one of the two end portions of the first conductive layer.
    Type: Application
    Filed: February 25, 2021
    Publication date: September 9, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Ryoichi KATO, Yuma MURATA, Naoyuki KANAI, Akito NAKAGOME, Yoshinari IKEDA
  • Publication number: 20210280534
    Abstract: A semiconductor device includes: a first semiconductor chip having a metal layer on a top surface; a first wiring member arranged to face the metal layer; a sintered-metal layer arranged between the metal layer and the first wiring member, having a first region and a plurality of second regions provided inside the first region, the second regions having lower tensile strength than the first region; and a metallic member arranged inside the sintered-metal layer, wherein the second regions of the sintered-metal layer have lower tensile strength than the metal layer of the first semiconductor chip.
    Type: Application
    Filed: May 26, 2021
    Publication date: September 9, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Hiroaki HOKAZONO, Ryoichi KATO
  • Publication number: 20210280555
    Abstract: A semiconductor module includes a case with a side wall in a first direction in which gate and source terminals are embodied and exposed therefrom, first and second semiconductor elements each having gate and source electrodes, gate and source relay layers positioned at a center between the first and second semiconductor elements in the first direction at a side of the semiconductor elements farther from the side wall, first gate and source wires respectively connecting the gate and source terminals to the gate and source relay layers, second gate and source wires, and third gate and source wires, respectively connecting the gate and source electrodes of the first semiconductor element, and the gate and source electrode of the second semiconductor element, to the gate and source relay layers. The first to third source wires are respectively located closer to the first to third gate wires than any other gate wires.
    Type: Application
    Filed: February 25, 2021
    Publication date: September 9, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Yuma MURATA, Ryoichi KATO, Naoyuki KANAI, Akito NAKAGOME, Yoshinari IKEDA
  • Publication number: 20210280556
    Abstract: A semiconductor module includes an insulating substrate having a main wiring layer, positive and negative electrode terminals adjacently arranged in a first direction, a plurality of semiconductor elements forming a first column and another plurality of semiconductor elements forming a second column, each semiconductor element having gate and source electrode on an upper surface thereof, and being disposed on the main wiring layer such that corresponding ones of the gate electrodes in the first and second columns face each other in a second direction orthogonal to the first direction, a control wiring substrate between the first and second columns and having gate and source wiring layers, a gate wiring member connecting ones of the gate electrodes in the first and second columns through the gate wiring layer, and a source wiring member connecting ones of the source electrodes in the first and second columns through the source wiring layer.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 9, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Ryoichi KATO, Yuma MURATA, Naoyuki KANAI, Akito NAKAGOME, Yoshinari IKEDA
  • Patent number: 11086568
    Abstract: According to one embodiment, a memory system includes a volatile memory, a nonvolatile memory and a controller circuit. The controller circuit configured to control the volatile memory and the nonvolatile memory and to perform a write process and a non-volatilization process. The controller circuit is further configured to, during the write process, store write data in the volatile memory, and during the non-volatilization process, upon determining that data size stored in the write buffer being less than unit of writing of the nonvolatile memory, suspend completion of the non-volatilization process and not return a notification of completion of the non-volatilization process.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: August 10, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Nan Jin, Ryoichi Kato
  • Publication number: 20210242103
    Abstract: A semiconductor module includes a laminated substrate having an insulating plate, a circuit pattern on an upper surface of the insulating plate and a heat dissipating plate on a lower surface of the insulating plate. The module further includes a semiconductor device having upper and lower surfaces, and including a collector electrode on the device upper surface, an emitter electrode and a gate electrode on the device lower surface, and the emitter electrode and the gate electrode each being bonded to an upper surface of the circuit pattern via a bump, and a block electrode bonded to the collector electrode. The block electrode includes a flat plate portion covering over the semiconductor device, and a pair of projecting portions projecting toward the circuit pattern from both ends of the flat plate portion in a thickness direction orthogonal to a surface of the insulating plate, and being bonded to the circuit pattern.
    Type: Application
    Filed: January 5, 2021
    Publication date: August 5, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Ryoichi KATO, Yoshinari IKEDA, Tatsuo NISHIZAWA, Motohito HORI, Eiji MOCHIZUKI
  • Publication number: 20210242156
    Abstract: A semiconductor module includes a laminated substrate having an insulating plate, a circuit pattern arranged on an upper surface of the insulating plate and a heat dissipating plate arranged on a lower surface of the insulating plate. The semiconductor module also includes a semiconductor device having a collector electrode arranged on its upper surface, having an emitter electrode and a gate electrode arranged on its lower surface, and bumps respectively bonding the emitter electrode and the gate electrode to an upper surface of the circuit pattern. Each of the bumps is made of a metal sintered material such that the bump is formed to be constricted in its middle portion in a thickness direction orthogonal to a surface of the insulating plate.
    Type: Application
    Filed: December 31, 2020
    Publication date: August 5, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Ryoichi KATO, Yoshinari IKEDA, Tatsuo NISHIZAWA, Eiji MOCHIZUKI
  • Patent number: 11075144
    Abstract: Provided is a cooler having high cooling efficiency and low pressure loss of fluid. A cooler includes: a flow-channel part at least including a plate-like fin (top plate) and a plate-like fin (bottom plate); and a continuous groove-like flow channel defined between the top plate and the bottom plate to flow fluid, the cooler being configured to cool semiconductor elements. When the flow-channel part is viewed from the direction parallel to the top plate and intersecting the flow channel, the flow channel has a corrugated shape so that a face of the flow channel closer to the top plate and a face of the flow channel closer to the bottom plate bend in a synchronized manner toward the top plate and the bottom plate.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: July 27, 2021
    Assignees: FUJI ELECTRIC CO., LTD., WASEDA UNIVERSITY
    Inventors: Ryoichi Kato, Hiromichi Gohara, Yoshinari Ikeda, Tomoyuki Miyashita, Yoshihiro Tateishi, Shunsuke Numata
  • Publication number: 20210202372
    Abstract: A capacitor includes a case including a capacitor element, a first connection terminal, a second connection terminal, and a second insulating sheet formed between the first connection terminal and the second connection terminal, and the first connection terminal, the second insulating sheet, and the second connection terminal extend to the outside from the case. A semiconductor module includes a multi-layer terminal portion in which a first power terminal, a first insulating sheet, and a second power terminal are sequentially stacked. The first power terminal includes a first bonding area electrically connected to the first connection terminal, and the second power terminal includes a second bonding area electrically connected to the second connection terminal. The first insulating sheet includes a terrace portion that extends in a direction from the second bonding area towards the first bonding area in a planar view.
    Type: Application
    Filed: November 30, 2020
    Publication date: July 1, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Ryoichi KATO, Yoshinari IKEDA, Yuma MURATA
  • Publication number: 20210102760
    Abstract: A heat sink includes: a base plate; a cover overlapping the base plate; a fin having a plate-like shape projecting from the base plate, the fin being located between the base plate and the cover; a first fin group composed of a plurality of the fins arranged with a gap therebetween in a first direction parallel to the base plate; and a second fin group composed of a plurality of the fins arranged with a gap therebetween in the first direction, and adjacent to the first fin group with a gap therebetween in a second direction parallel to an inflow direction of refrigerant. A longitudinal direction of the fin is along the second direction. A position in the first direction of the fin of the second fin group is displaced with respect to a position in the first direction of the fin of the first fin group.
    Type: Application
    Filed: December 16, 2020
    Publication date: April 8, 2021
    Inventors: Takumi NAKAMURA, Eiji ANZAI, Tomoyuki HIRAYAMA, Yutaka HIRANO, Ryoichi KATO, Hiromichi GOHARA, Kohei YAMAUCHI
  • Publication number: 20210066707
    Abstract: A lithium secondary battery comprising: a positive electrode and a negative electrode which each has a specific composition and specific properties; and a nonaqueous electrolyte which contains a cyclic siloxane compound represented by general formula (1), fluorosilane compound represented by general formula (2), compound represented by general formula (3), compound having an S—F bond in the molecule, nitric acid salt, nitrous acid salt, monofluorophosphoric acid salt, difluorophosphoric acid salt, acetic acid salt, or propionic acid salt in an amount of 10 ppm or more of the whole nonaqueous electrolyte. This lithium secondary battery has a high capacity, long life, and high output. [In general formula (1), R1 and R2 are an organic group having 1-12 carbon atoms and n is an integer of 3-10. In general formula (2), R3 to R5 are an organic group having 1-12 carbon atoms; x is an integer of 1-3; and p, q, and r each are an integer of 0-3, provided that 1?p+q+r?3.
    Type: Application
    Filed: September 11, 2020
    Publication date: March 4, 2021
    Applicant: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Hidekazu MIYAGI, Ryoichi Kato, Masakazu Yokomizo, Hiroyuki Uono, Hitoshi Matsumoto, Tomohiro Satou, Minoru Kotato, Takayuki Nakajima, Hitoshi Suzuki, Hiroyuki Oshima
  • Publication number: 20210066158
    Abstract: A semiconductor device, including a conductive plate having a front surface that includes a plurality of bonding regions and a plurality of non-bonding regions in peripheries of the bonding regions, a plurality of semiconductor elements mounted on the conductive plate in the bonding regions, and a resin encapsulating therein at least the plurality of semiconductor elements and the front surface of the conductive plate. The conductive plate has, at the front surface thereof in the non-bonding regions, a plurality of holes.
    Type: Application
    Filed: August 19, 2020
    Publication date: March 4, 2021
    Applicants: FUJI ELECTRIC CO., LTD., FURUKAWA ELECTRIC CO., LTD.
    Inventors: Ryoichi KATO, Hiromichi GOHARA, Yoshinari IKEDA, Yoshikazu TAKAHASHI, Kuniteru MIHARA, Isao TAKAHASHI
  • Patent number: 10916491
    Abstract: A semiconductor module includes a semiconductor element having one and the other surface, a lead terminal connected electrically and thermally to the semiconductor element, a first solder which bonds the lead terminal and the one surface of the semiconductor element together, a circuit layer over which the semiconductor element is disposed and a second solder which bonds the other surface of the semiconductor element and the circuit layer together. The inequality (A/B)<1 holds, where A and B are the tensile strength of the first and second solder, respectively. As a result, even if the lead terminal which thermally expands because of heat generated by the semiconductor element expands or contracts toward the semiconductor element, a stress applied by the lead terminal is absorbed and relaxed by the first solder. This prevents damage to the surface electrode of the semiconductor element by suppressing the occurrence of cracks.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: February 9, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Ryoichi Kato, Kohei Yamauchi, Hiromichi Gohara, Tatsuhiko Asai
  • Patent number: 10867980
    Abstract: Semiconductor equipment includes semiconductor modules sealed with a resin, each having first and second connection terminals exposed from the resin, a capacitor including third and fourth connection terminals, a cooler directly contacting the semiconductor modules and the capacitor, a busbar including a first busbar connecting the first connection terminal to the third connection terminal, a second busbar connecting the second connection terminal to the fourth connection terminal, and a first insulating layer sandwiched by the first and second busbars, main surfaces of the first and second busbars being parallel to each other, a control circuit board configured to control the semiconductor modules, and a heat transfer component including a main body connected to the cooler, and a second insulating layer arranged on the main body, the main body being in contact with the busbar and the control circuit via the second insulating layer.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: December 15, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Motohito Hori, Yoshinari Ikeda, Akira Hirao, Mai Saitou, Ryoichi Kato