Abstract: A n-type GaAs buffer layer 2, a n-type GaInP buffer layer 3, a n-type AlGaInP cladding layer 4, an undoped AlGaAs guide layer 5, an AlGaAs/GaAs multiquantum well (MQW) active layer 6, a first p-type AlGaInP cladding layer 7, a p-type GaInP etching stopper layer 8, a second p-type AlGaInP cladding layer 9, a C-doped AlGaAs layer (Zn-diffusion suppressing layer) 10, a p-type GaInP intermediate layer 11, and a p-type GaAs cap layer 12 are sequentially grown on a n-type GaAs substrate 1.

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: An arithmetic circuit, which is retained by each pixel in a conventional image sensor, is shared by each column. Signal processing circuits of different configurations are provided on signal transmission paths in an upward direction and a downward direction of a vertical signal line for extracting an image signal from each pixel, whereby image output processing and arithmetic processing are performed completely separately by the different circuit blocks. Thus, image quality of an actual image is improved and optimum design for arithmetic processing is made possible. Specifically, an I-V converter circuit unit, a CDS circuit unit and the like are provided on the image output side. A current mirror circuit unit, an analog memory array unit, a comparator unit, a bias circuit unit, a data latch unit, an output data bus unit and the like are provided on the arithmetic processing side.

Abstract: Disclosed is a solid-state imaging device which includes an imaging region including pixels arranged two-dimensionally, each of the pixels including a photoelectric conversion element and a plurality of pixel transistors for reading out signals outputted from the photoelectric conversion element, and wirings formed on stacked layers for driving each of the pixels. A shading part between the pixels is formed by combining first and second wirings selected from the wirings.

Abstract: An optotype presenting apparatus which presents an optotype for visual acuity test, the apparatus comprises: a display that is illuminated by a backlight and includes a light intensity changing device which changes backlight intensity; a background luminance selecting device which selects background luminance of the optotype among a plurality of preset levels, in which background luminance at each level corresponds to standard light intensity changing data in a changeable range determined by the light intensity changing device; and a correction device which corrects the standard light intensity changing data in the background luminance selecting device, the correction device including: an input device which inputs the background luminance measured by an illuminance meter, the measured background luminance being background luminance obtained when the light intensity changing device is operated based on the preset light intensity changing data; and a calculation device which determines correction light intensit

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: A plurality of pairs of segments to be weighted/added are selected non-linearly with respect to a time axis of audio data. A speed conversion is achieved by performing the weighting/addition on the selected pairs of segments. The non-linear selection is performed by (a) obtaining all possible pairs of segments constituting the audio data, (b) calculating a degree of similarity pertaining to each possible pair, (c) ranking the all possible pairs of segments according to the degrees of similarity, and (d) overlapping at least one of the all possible pairs of segments that holds the highest degree of similarity.

Abstract: An arithmetic circuit, which is retained by each pixel in a conventional image sensor, is shared by each column. Signal processing circuits of different configurations are provided on signal transmission paths in an upward direction and a downward direction of a vertical signal line for extracting an image signal from each pixel, whereby image output processing and arithmetic processing are performed completely separately by the different circuit blocks. Thus, image quality of an actual image is improved and optimum design for arithmetic processing is made possible. Specifically, an I-V converter circuit unit, a CDS circuit unit and the like are provided on the image output side. A current mirror circuit unit, an analog memory array unit, a comparator unit, a bias circuit unit, a data latch unit, an output data bus unit and the like are provided on the arithmetic processing side.

Abstract: A solid-state imaging device for preventing aging deterioration of image quality due to a thinning out reading mode in addition to a usual all pixel reading operation mode and maintaining a good image quality and a method for driving the same, including an imaging pixel portion 111 formed by arranging a plurality of pixels each including a photo-electric conversion element and a reading circuit of the photo-electric conversion element in a matrix, having an all pixel reading mode for reading pixel signals from all pixels of the imaging pixel portion 111 and a thinning out reading mode for intermittently selecting part of the pixels of the imaging pixel portion 111 for each pixel row or each pixel column or both of them to read out pixel signals, and having drive circuits 112 to 116 having a function of selecting the reading circuit of the imaging pixel portion 111 for each pixel row or each pixel column by a drive signal and receiving as input drive signals also with respect to the pixel rows or pixel columns

Abstract: A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.

Abstract: An image sensor that has a pixel array section in which pixels are arrayed in a two-dimensional manner in vertical and horizontal directions and that controls an exposure time of each pixel in a rolling shutter method is disclosed. The sensor includes control means for determining an electronic shutter occurrence number within one horizontal scanning period, which is the number of rows where electronic shutters are simultaneously performed in one horizontal scanning period, by an operation based on an address addition amount (P1, P2, P3, . . . , PN) when a vertical address movement amount of the pixel array section for every one horizontal scanning period in an exposure regulation shutter, which is an electronic shutter for regulating exposure, executed corresponding to electric charge reading in each pixel is expressed as repetition of the address addition amount (P1, P2, P3, . . . , PN).

Abstract: An epitaxial wafer for semiconductor light-emitting devices has an n-type substrate, on which are sequentially formed an n-type cladding layer, an active layer, a p-type cladding layer having Mg as a p-type dopant, and a p-type cap layer. The p-type cap layer has at least two Mg-doped and Zn-doped layers that are formed sequentially from the substrate side.

Abstract: A visual acuity testing apparatus capable of performing visual acuity testing under substantially uniform conditions even when a test distance and an installation distance vary has a projection optical unit including a disk whereon a chart is placed, an illumination light source, and variable projection lenses which are moved so as to change an image-forming position and an image size of an image of the chart, an input unit into which an installation distance between the screen and the visual acuity testing apparatus and a test distance between the screen and an examinee are inputted, a projection lens driving unit which moves the variable projection lenses based on the installation distance and the test distance, and a light intensity adjusting unit which adjusts light intensity based on the installation distance and the test distance so that brightness of the chart image falls within a predetermined reference range.

Abstract: A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.

Abstract: A solid-state image pickup device comprises a plurality of pixels arrayed in an XY matrix fashion, each pixel including a photoelectric-converting portion 1 for photoelectrically converting incident light into signal electric charges and accumulating therein the thus photoelectrically-converted signal electric charges, an accumulation region 3 for converting the thus accumulated signal electric charges into a voltage and a transfer gate 2 for transferring the signal electric charges accumulated in this photoelectric-converting portion 1 to the accumulation region 3, wherein an amount of saturation electric charges is increased by forming a difference in potential level under the transfer gate 2.

Abstract: An optotype presenting apparatus which presents an optotype for visual acuity test, the apparatus comprises: a display that is illuminated by a backlight and includes a light intensity changing device which changes backlight intensity; a background luminance selecting device which selects background luminance of the optotype among a plurality of preset levels, in which background luminance at each level corresponds to standard light intensity changing data in a changeable range determined by the light intensity changing device; and a correction device which corrects the standard light intensity changing data in the background luminance selecting device, the correction device including: an input device which inputs the background luminance measured by an illuminance meter, the measured background luminance being background luminance obtained when the light intensity changing device is operated based on the preset light intensity changing data; and a calculation device which determines correction light intensit

Abstract: There is provided a solid-state imaging device having a pixel array section in which pixels including photoelectric conversion elements are arranged in a matrix form, and sweeping out unnecessary charges by setting a predetermined number, two or more, of adjacent rows or a predetermined number, two or more, of adjacent columns, in the pixel array section, to a single group, and by applying a shutter pulse in units of groups before storing signal charges, and sequentially reading the signal charges in the units of groups. In the solid-state imaging device, a pre-shutter pulse is applied to pixels belonging to at least a single row or a single column within a succeeding group and adjacent to a preceding group, prior to the shutter pulse, before a reading timing for the preceding group, to sweep out unnecessary charges stored in the pixels.

Abstract: A solid-state imaging device includes: a pixel array unit wherein a unit pixel group with a portion of elements of a unit pixel being shared with a plurality of unit pixels is arrayed in a matrix form, the unit pixel having a detecting unit, a pixel signal generating unit, a transfer unit to transfer the charge, and an initializing unit to initialize the potential of the pixel signal generating unit; and a driving control unit; wherein the driving control unit controls blooming reduction potential which is the transfer control potential supplied to the transfer unit of the unit pixel to be thinned, so that the overflow charge at the detecting unit with the unit pixel to be thinned which has no shared relation with the unit pixel to be read transitions to a state readily transferable to the pixel signal generating unit side of the unit pixel to be thinned.

Abstract: Since the great number of elements constituting a unit pixel having an amplification function would hinder reduction of pixel size, unit pixel n,m arranged in a matrix form is comprised of a photodiode, a transfer switch for transferring charges stored in the photodiode, a floating diffusion for storing charges transferred by the transfer switch, a reset switch for resetting the floating diffusion, and an amplifying transistor for outputting a signal in accordance with the potential of the floating diffusion to a vertical signal line, and by affording vertical selection pulse ?Vn to the drain of the reset switch to control a reset potential thereof, pixels are selected in units of rows.